ipsec: optimize SA outbound sequence update
For SA outbound packets, rte_atomic64_add_return is used to generate SQN atomically. Use C11 atomics with RELAXED ordering for outbound SQN update instead of rte_atomic ops which enforce unnecessary barriers on aarch64. Signed-off-by: Phil Yang <phil.yang@arm.com> Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com> Reviewed-by: Gavin Hu <gavin.hu@arm.com> Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
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@ -128,10 +128,10 @@ esn_outb_update_sqn(struct rte_ipsec_sa *sa, uint32_t *num)
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n = *num;
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if (SQN_ATOMIC(sa))
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sqn = (uint64_t)rte_atomic64_add_return(&sa->sqn.outb.atom, n);
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sqn = __atomic_add_fetch(&sa->sqn.outb, n, __ATOMIC_RELAXED);
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else {
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sqn = sa->sqn.outb.raw + n;
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sa->sqn.outb.raw = sqn;
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sqn = sa->sqn.outb + n;
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sa->sqn.outb = sqn;
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}
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/* overflow */
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@ -283,7 +283,7 @@ esp_outb_init(struct rte_ipsec_sa *sa, uint32_t hlen)
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{
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uint8_t algo_type;
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sa->sqn.outb.raw = 1;
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sa->sqn.outb = 1;
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algo_type = sa->algo_type;
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@ -119,10 +119,7 @@ struct rte_ipsec_sa {
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* place from other frequently accesed data.
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*/
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union {
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union {
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rte_atomic64_t atom;
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uint64_t raw;
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} outb;
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uint64_t outb;
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struct {
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uint32_t rdidx; /* read index */
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uint32_t wridx; /* write index */
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