timer: relax barrier for status update
Volatile has no ordering semantics. The rte_timer structure defines timer status as a volatile variable and uses the rte_r/wmb barrier to guarantee inter-thread visibility. This patch optimized the volatile operation with c11 atomic operations and one-way barrier to save the performance penalty. According to the timer_perf_autotest benchmarking results, this patch can uplift 10%~16% timer appending performance, 3%~20% timer resetting performance and 45% timer callbacks scheduling performance on aarch64 and no loss in performance for x86. Suggested-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com> Signed-off-by: Phil Yang <phil.yang@arm.com> Reviewed-by: Gavin Hu <gavin.hu@arm.com> Acked-by: Erik Gabriel Carrillo <erik.g.carrillo@intel.com>
This commit is contained in:
Phil Yang
Thomas Monjalon
parent
9ca37645c7
commit
2f89dc2ed7
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@ -10,7 +10,6 @@
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#include <assert.h>
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#include <sys/queue.h>
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#include <rte_atomic.h>
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#include <rte_common.h>
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#include <rte_cycles.h>
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#include <rte_eal_memconfig.h>
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@ -218,7 +217,7 @@ rte_timer_init(struct rte_timer *tim)
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status.state = RTE_TIMER_STOP;
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status.owner = RTE_TIMER_NO_OWNER;
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tim->status.u32 = status.u32;
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__atomic_store_n(&tim->status.u32, status.u32, __ATOMIC_RELAXED);
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}
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/*
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@ -239,9 +238,9 @@ timer_set_config_state(struct rte_timer *tim,
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/* wait that the timer is in correct status before update,
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* and mark it as being configured */
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while (success == 0) {
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prev_status.u32 = tim->status.u32;
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prev_status.u32 = __atomic_load_n(&tim->status.u32, __ATOMIC_RELAXED);
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while (success == 0) {
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/* timer is running on another core
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* or ready to run on local core, exit
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*/
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@ -258,9 +257,15 @@ timer_set_config_state(struct rte_timer *tim,
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* mark it atomically as being configured */
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status.state = RTE_TIMER_CONFIG;
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status.owner = (int16_t)lcore_id;
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success = rte_atomic32_cmpset(&tim->status.u32,
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prev_status.u32,
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status.u32);
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/* CONFIG states are acting as locked states. If the
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* timer is in CONFIG state, the state cannot be changed
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* by other threads. So, we should use ACQUIRE here.
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*/
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success = __atomic_compare_exchange_n(&tim->status.u32,
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&prev_status.u32,
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status.u32, 0,
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__ATOMIC_ACQUIRE,
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__ATOMIC_RELAXED);
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}
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ret_prev_status->u32 = prev_status.u32;
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@ -279,20 +284,27 @@ timer_set_running_state(struct rte_timer *tim)
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/* wait that the timer is in correct status before update,
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* and mark it as running */
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while (success == 0) {
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prev_status.u32 = tim->status.u32;
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prev_status.u32 = __atomic_load_n(&tim->status.u32, __ATOMIC_RELAXED);
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while (success == 0) {
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/* timer is not pending anymore */
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if (prev_status.state != RTE_TIMER_PENDING)
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return -1;
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/* here, we know that timer is stopped or pending,
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* mark it atomically as being configured */
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/* we know that the timer will be pending at this point
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* mark it atomically as being running
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*/
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status.state = RTE_TIMER_RUNNING;
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status.owner = (int16_t)lcore_id;
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success = rte_atomic32_cmpset(&tim->status.u32,
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prev_status.u32,
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status.u32);
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/* RUNNING states are acting as locked states. If the
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* timer is in RUNNING state, the state cannot be changed
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* by other threads. So, we should use ACQUIRE here.
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*/
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success = __atomic_compare_exchange_n(&tim->status.u32,
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&prev_status.u32,
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status.u32, 0,
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__ATOMIC_ACQUIRE,
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__ATOMIC_RELAXED);
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}
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return 0;
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@ -520,10 +532,12 @@ __rte_timer_reset(struct rte_timer *tim, uint64_t expire,
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/* update state: as we are in CONFIG state, only us can modify
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* the state so we don't need to use cmpset() here */
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rte_wmb();
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status.state = RTE_TIMER_PENDING;
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status.owner = (int16_t)tim_lcore;
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tim->status.u32 = status.u32;
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/* The "RELEASE" ordering guarantees the memory operations above
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* the status update are observed before the update by all threads
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*/
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__atomic_store_n(&tim->status.u32, status.u32, __ATOMIC_RELEASE);
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if (tim_lcore != lcore_id || !local_is_locked)
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rte_spinlock_unlock(&priv_timer[tim_lcore].list_lock);
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@ -600,10 +614,12 @@ __rte_timer_stop(struct rte_timer *tim, int local_is_locked,
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}
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/* mark timer as stopped */
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rte_wmb();
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status.state = RTE_TIMER_STOP;
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status.owner = RTE_TIMER_NO_OWNER;
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tim->status.u32 = status.u32;
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/* The "RELEASE" ordering guarantees the memory operations above
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* the status update are observed before the update by all threads
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*/
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__atomic_store_n(&tim->status.u32, status.u32, __ATOMIC_RELEASE);
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return 0;
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}
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@ -637,7 +653,8 @@ rte_timer_stop_sync(struct rte_timer *tim)
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int
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rte_timer_pending(struct rte_timer *tim)
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{
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return tim->status.state == RTE_TIMER_PENDING;
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return __atomic_load_n(&tim->status.state,
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__ATOMIC_RELAXED) == RTE_TIMER_PENDING;
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}
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/* must be called periodically, run all timer that expired */
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@ -739,8 +756,12 @@ __rte_timer_manage(struct rte_timer_data *timer_data)
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/* remove from done list and mark timer as stopped */
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status.state = RTE_TIMER_STOP;
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status.owner = RTE_TIMER_NO_OWNER;
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rte_wmb();
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tim->status.u32 = status.u32;
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/* The "RELEASE" ordering guarantees the memory
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* operations above the status update are observed
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* before the update by all threads
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*/
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__atomic_store_n(&tim->status.u32, status.u32,
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__ATOMIC_RELEASE);
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}
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else {
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/* keep it in list and mark timer as pending */
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@ -748,8 +769,12 @@ __rte_timer_manage(struct rte_timer_data *timer_data)
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status.state = RTE_TIMER_PENDING;
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__TIMER_STAT_ADD(priv_timer, pending, 1);
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status.owner = (int16_t)lcore_id;
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rte_wmb();
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tim->status.u32 = status.u32;
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/* The "RELEASE" ordering guarantees the memory
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* operations above the status update are observed
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* before the update by all threads
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*/
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__atomic_store_n(&tim->status.u32, status.u32,
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__ATOMIC_RELEASE);
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__rte_timer_reset(tim, tim->expire + tim->period,
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tim->period, lcore_id, tim->f, tim->arg, 1,
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timer_data);
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@ -919,8 +944,12 @@ rte_timer_alt_manage(uint32_t timer_data_id,
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/* remove from done list and mark timer as stopped */
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status.state = RTE_TIMER_STOP;
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status.owner = RTE_TIMER_NO_OWNER;
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rte_wmb();
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tim->status.u32 = status.u32;
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/* The "RELEASE" ordering guarantees the memory
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* operations above the status update are observed
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* before the update by all threads
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*/
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__atomic_store_n(&tim->status.u32, status.u32,
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__ATOMIC_RELEASE);
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} else {
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/* keep it in list and mark timer as pending */
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rte_spinlock_lock(
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@ -928,8 +957,12 @@ rte_timer_alt_manage(uint32_t timer_data_id,
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status.state = RTE_TIMER_PENDING;
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__TIMER_STAT_ADD(data->priv_timer, pending, 1);
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status.owner = (int16_t)this_lcore;
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rte_wmb();
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tim->status.u32 = status.u32;
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/* The "RELEASE" ordering guarantees the memory
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* operations above the status update are observed
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* before the update by all threads
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*/
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__atomic_store_n(&tim->status.u32, status.u32,
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__ATOMIC_RELEASE);
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__rte_timer_reset(tim, tim->expire + tim->period,
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tim->period, this_lcore, tim->f, tim->arg, 1,
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data);
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