common/mlx5: introduce layer for multiple class drivers
Add generic mlx5 PCI PMD layer as part of existing common_mlx5 module. This enables multiple classes (net, regex, vdpa) PMDs to be supported at same time. Signed-off-by: Parav Pandit <parav@mellanox.com> Acked-by: Matan Azrad <matan@mellanox.com>
This commit is contained in:
Parav Pandit
Thomas Monjalon
parent
15008f562d
commit
8a41f4decc
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@ -124,10 +124,11 @@ New Features
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* Added support for VLAN push and pop flow actions.
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* **Updated Mellanox mlx5 driver.**
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* **Updated Mellanox mlx5 net driver and common layer.**
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Updated Mellanox mlx5 driver with new features and improvements, including:
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* Added mlx5 PCI layer to share a PCI device among multiple PMDs.
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* Added new PMD devarg ``reclaim_mem_mode``.
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* Added new devarg ``lacp_by_user``.
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* Added support for eCPRI protocol offloading.
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@ -8,8 +8,12 @@ DIRS-y += bus
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DEPDIRS-bus := common
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DIRS-y += mempool
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DEPDIRS-mempool := common bus
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ifeq ($(findstring y,$(CONFIG_RTE_LIBRTE_MLX5_PMD)$(CONFIG_RTE_LIBRTE_MLX5_VDPA_PMD)$(CONFIG_RTE_LIBRTE_MLX5_REGEX_PMD)),y)
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DIRS-y += common/mlx5
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DEPDIRS-common/mlx5 := bus
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endif
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DIRS-y += net
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DEPDIRS-net := common bus mempool
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DEPDIRS-net := common bus mempool common/mlx5
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DIRS-$(CONFIG_RTE_LIBRTE_BBDEV) += baseband
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DEPDIRS-baseband := common bus mempool
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DIRS-$(CONFIG_RTE_LIBRTE_CRYPTODEV) += crypto
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@ -19,9 +23,9 @@ DEPDIRS-common/qat := bus mempool
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DIRS-$(CONFIG_RTE_LIBRTE_COMPRESSDEV) += compress
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DEPDIRS-compress := bus mempool
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DIRS-$(CONFIG_RTE_LIBRTE_REGEXDEV) += regex
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DEPDIRS-regex := common bus
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DEPDIRS-regex := common bus common/mlx5
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DIRS-$(CONFIG_RTE_LIBRTE_VHOST) += vdpa
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DEPDIRS-vdpa := common bus mempool
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DEPDIRS-vdpa := common bus mempool common/mlx5
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DIRS-$(CONFIG_RTE_LIBRTE_EVENTDEV) += event
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DEPDIRS-event := common bus mempool net crypto
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DIRS-$(CONFIG_RTE_LIBRTE_RAWDEV) += raw
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@ -36,8 +36,4 @@ ifneq (,$(findstring y,$(IAVF-y)))
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DIRS-y += iavf
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endif
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ifeq ($(findstring y,$(CONFIG_RTE_LIBRTE_MLX5_PMD)$(CONFIG_RTE_LIBRTE_MLX5_VDPA_PMD)$(CONFIG_RTE_LIBRTE_MLX5_REGEX_PMD)),y)
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DIRS-y += mlx5
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endif
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include $(RTE_SDK)/mk/rte.subdir.mk
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@ -6,6 +6,6 @@ if is_windows
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endif
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std_deps = ['eal']
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drivers = ['cpt', 'dpaax', 'iavf', 'mlx5', 'mvep', 'octeontx', 'octeontx2', 'qat']
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drivers = ['cpt', 'dpaax', 'iavf', 'mvep', 'octeontx', 'octeontx2', 'qat']
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config_flag_fmt = 'RTE_LIBRTE_@0@_COMMON'
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driver_name_fmt = 'rte_common_@0@'
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@ -22,6 +22,7 @@ SRCS-y += linux/mlx5_common_verbs.c
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SRCS-y += mlx5_common_mp.c
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SRCS-y += mlx5_common_mr.c
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SRCS-y += mlx5_malloc.c
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SRCS-y += mlx5_common_pci.c
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ifeq ($(CONFIG_RTE_IBVERBS_LINK_DLOPEN),y)
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INSTALL-y-lib += $(LIB_GLUE)
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endif
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@ -51,6 +52,7 @@ LDLIBS += -libverbs -lmlx5
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endif
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LDLIBS += -lrte_eal -lrte_pci -lrte_kvargs -lrte_net
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LDLIBS += -lrte_bus_pci
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# A few warnings cannot be avoided in external headers.
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CFLAGS += -Wno-error=cast-qual -UPEDANTIC
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@ -1,19 +1,22 @@
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# SPDX-License-Identifier: BSD-3-Clause
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# Copyright 2019 Mellanox Technologies, Ltd
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if not (is_linux or is_windows)
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if not is_linux
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build = false
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reason = 'only supported on Linux and Windows'
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reason = 'only supported on Linux'
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subdir_done()
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endif
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deps += ['hash', 'pci', 'net', 'eal', 'kvargs']
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config_flag_fmt = 'RTE_LIBRTE_@0@_COMMON'
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driver_name_fmt = 'rte_common_@0@'
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deps += ['hash', 'pci', 'bus_pci', 'net', 'eal', 'kvargs']
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sources += files(
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'mlx5_devx_cmds.c',
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'mlx5_common.c',
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'mlx5_common_mp.c',
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'mlx5_common_mr.c',
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'mlx5_malloc.c',
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'mlx5_common_pci.c',
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)
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cflags_options = [
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@ -14,6 +14,7 @@
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#include "mlx5_common_os.h"
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#include "mlx5_common_utils.h"
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#include "mlx5_malloc.h"
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#include "mlx5_common_pci.h"
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int mlx5_common_logtype;
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@ -100,6 +101,7 @@ mlx5_common_init(void)
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return;
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mlx5_glue_constructor();
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mlx5_common_pci_init();
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mlx5_common_initialized = true;
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}
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540
drivers/common/mlx5/mlx5_common_pci.c
Normal file
540
drivers/common/mlx5/mlx5_common_pci.c
Normal file
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@ -0,0 +1,540 @@
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/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright 2020 Mellanox Technologies Ltd
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*/
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#include <stdlib.h>
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#include <rte_malloc.h>
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#include "mlx5_common_utils.h"
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#include "mlx5_common_pci.h"
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struct mlx5_pci_device {
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struct rte_pci_device *pci_dev;
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TAILQ_ENTRY(mlx5_pci_device) next;
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uint32_t classes_loaded;
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};
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/* Head of list of drivers. */
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static TAILQ_HEAD(mlx5_pci_bus_drv_head, mlx5_pci_driver) drv_list =
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TAILQ_HEAD_INITIALIZER(drv_list);
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/* Head of mlx5 pci devices. */
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static TAILQ_HEAD(mlx5_pci_devices_head, mlx5_pci_device) devices_list =
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TAILQ_HEAD_INITIALIZER(devices_list);
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static const struct {
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const char *name;
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unsigned int driver_class;
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} mlx5_classes[] = {
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{ .name = "vdpa", .driver_class = MLX5_CLASS_VDPA },
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{ .name = "net", .driver_class = MLX5_CLASS_NET },
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{ .name = "regex", .driver_class = MLX5_CLASS_REGEX },
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};
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static const unsigned int mlx5_class_combinations[] = {
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MLX5_CLASS_NET,
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MLX5_CLASS_VDPA,
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MLX5_CLASS_REGEX,
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MLX5_CLASS_NET | MLX5_CLASS_REGEX,
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MLX5_CLASS_VDPA | MLX5_CLASS_REGEX,
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/* New class combination should be added here. */
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};
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static int
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class_name_to_value(const char *class_name)
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{
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unsigned int i;
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for (i = 0; i < RTE_DIM(mlx5_classes); i++) {
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if (strcmp(class_name, mlx5_classes[i].name) == 0)
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return mlx5_classes[i].driver_class;
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}
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return -EINVAL;
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}
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static struct mlx5_pci_driver *
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driver_get(uint32_t class)
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{
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struct mlx5_pci_driver *driver;
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TAILQ_FOREACH(driver, &drv_list, next) {
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if (driver->driver_class == class)
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return driver;
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}
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return NULL;
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}
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static int
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bus_cmdline_options_handler(__rte_unused const char *key,
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const char *class_names, void *opaque)
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{
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int *ret = opaque;
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char *nstr_org;
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int class_val;
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char *found;
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char *nstr;
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*ret = 0;
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nstr = strdup(class_names);
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if (!nstr) {
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*ret = -ENOMEM;
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return *ret;
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}
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nstr_org = nstr;
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while (nstr) {
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/* Extract each individual class name. Multiple
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* class key,value is supplied as class=net:vdpa:foo:bar.
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*/
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found = strsep(&nstr, ":");
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if (!found)
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continue;
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/* Check if its a valid class. */
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class_val = class_name_to_value(found);
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if (class_val < 0) {
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*ret = -EINVAL;
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goto err;
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}
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*ret |= class_val;
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}
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err:
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free(nstr_org);
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if (*ret < 0)
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DRV_LOG(ERR, "Invalid mlx5 class options %s."
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" Maybe typo in device class argument setting?",
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class_names);
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return *ret;
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}
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static int
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parse_class_options(const struct rte_devargs *devargs)
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{
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const char *key = MLX5_CLASS_ARG_NAME;
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struct rte_kvargs *kvlist;
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int ret = 0;
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if (devargs == NULL)
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return 0;
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kvlist = rte_kvargs_parse(devargs->args, NULL);
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if (kvlist == NULL)
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return 0;
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if (rte_kvargs_count(kvlist, key))
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rte_kvargs_process(kvlist, key, bus_cmdline_options_handler,
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&ret);
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rte_kvargs_free(kvlist);
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return ret;
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}
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static bool
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mlx5_bus_match(const struct mlx5_pci_driver *drv,
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const struct rte_pci_device *pci_dev)
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{
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const struct rte_pci_id *id_table;
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for (id_table = drv->pci_driver.id_table; id_table->vendor_id != 0;
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id_table++) {
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/* Check if device's ids match the class driver's ids. */
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if (id_table->vendor_id != pci_dev->id.vendor_id &&
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id_table->vendor_id != PCI_ANY_ID)
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continue;
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if (id_table->device_id != pci_dev->id.device_id &&
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id_table->device_id != PCI_ANY_ID)
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continue;
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if (id_table->subsystem_vendor_id !=
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pci_dev->id.subsystem_vendor_id &&
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id_table->subsystem_vendor_id != PCI_ANY_ID)
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continue;
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if (id_table->subsystem_device_id !=
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pci_dev->id.subsystem_device_id &&
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id_table->subsystem_device_id != PCI_ANY_ID)
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continue;
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if (id_table->class_id != pci_dev->id.class_id &&
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id_table->class_id != RTE_CLASS_ANY_ID)
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continue;
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return true;
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}
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return false;
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}
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static int
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is_valid_class_combination(uint32_t user_classes)
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{
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unsigned int i;
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/* Verify if user specified valid supported combination. */
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for (i = 0; i < RTE_DIM(mlx5_class_combinations); i++) {
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if (mlx5_class_combinations[i] == user_classes)
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return 0;
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}
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/* Not found any valid class combination. */
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return -EINVAL;
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}
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static struct mlx5_pci_device *
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pci_to_mlx5_device(const struct rte_pci_device *pci_dev)
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{
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struct mlx5_pci_device *dev;
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TAILQ_FOREACH(dev, &devices_list, next) {
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if (dev->pci_dev == pci_dev)
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return dev;
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}
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return NULL;
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}
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static bool
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device_class_enabled(const struct mlx5_pci_device *device, uint32_t class)
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{
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return (device->classes_loaded & class) ? true : false;
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}
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static void
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dev_release(struct mlx5_pci_device *dev)
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{
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TAILQ_REMOVE(&devices_list, dev, next);
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rte_free(dev);
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}
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static int
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drivers_remove(struct mlx5_pci_device *dev, uint32_t enabled_classes)
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{
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struct mlx5_pci_driver *driver;
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int local_ret = -ENODEV;
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unsigned int i = 0;
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int ret = 0;
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enabled_classes &= dev->classes_loaded;
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while (enabled_classes) {
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driver = driver_get(RTE_BIT64(i));
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if (driver) {
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local_ret = driver->pci_driver.remove(dev->pci_dev);
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if (!local_ret)
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dev->classes_loaded &= ~RTE_BIT64(i);
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else if (ret == 0)
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ret = local_ret;
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}
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enabled_classes &= ~RTE_BIT64(i);
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i++;
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}
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if (local_ret)
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ret = local_ret;
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return ret;
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}
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static int
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drivers_probe(struct mlx5_pci_device *dev, struct rte_pci_driver *pci_drv,
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struct rte_pci_device *pci_dev, uint32_t user_classes)
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{
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struct mlx5_pci_driver *driver;
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uint32_t enabled_classes = 0;
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bool already_loaded;
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int ret;
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TAILQ_FOREACH(driver, &drv_list, next) {
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if ((driver->driver_class & user_classes) == 0)
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continue;
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if (!mlx5_bus_match(driver, pci_dev))
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continue;
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already_loaded = dev->classes_loaded & driver->driver_class;
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if (already_loaded &&
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!(driver->pci_driver.drv_flags & RTE_PCI_DRV_PROBE_AGAIN)) {
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DRV_LOG(ERR, "Device %s is already probed\n",
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pci_dev->device.name);
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ret = -EEXIST;
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goto probe_err;
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}
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ret = driver->pci_driver.probe(pci_drv, pci_dev);
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if (ret < 0) {
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DRV_LOG(ERR, "Failed to load driver = %s.\n",
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driver->pci_driver.driver.name);
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goto probe_err;
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}
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enabled_classes |= driver->driver_class;
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}
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dev->classes_loaded |= enabled_classes;
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return 0;
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probe_err:
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/* Only unload drivers which are enabled which were enabled
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* in this probe instance.
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*/
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drivers_remove(dev, enabled_classes);
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return ret;
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}
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/**
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* DPDK callback to register to probe multiple drivers for a PCI device.
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*
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* @param[in] pci_drv
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* PCI driver structure.
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* @param[in] dev
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* PCI device information.
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*
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* @return
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* 0 on success, a negative errno value otherwise and rte_errno is set.
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*/
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static int
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mlx5_common_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
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struct rte_pci_device *pci_dev)
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{
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struct mlx5_pci_device *dev;
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uint32_t user_classes = 0;
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bool new_device = false;
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int ret;
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ret = parse_class_options(pci_dev->device.devargs);
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if (ret < 0)
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return ret;
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user_classes = ret;
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if (user_classes) {
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/* Validate combination here. */
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ret = is_valid_class_combination(user_classes);
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if (ret) {
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DRV_LOG(ERR, "Unsupported mlx5 classes supplied.");
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return ret;
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}
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} else {
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/* Default to net class. */
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user_classes = MLX5_CLASS_NET;
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}
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dev = pci_to_mlx5_device(pci_dev);
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if (!dev) {
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dev = rte_zmalloc("mlx5_pci_device", sizeof(*dev), 0);
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if (!dev)
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return -ENOMEM;
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dev->pci_dev = pci_dev;
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TAILQ_INSERT_HEAD(&devices_list, dev, next);
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new_device = true;
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}
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ret = drivers_probe(dev, pci_drv, pci_dev, user_classes);
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if (ret)
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goto class_err;
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return 0;
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class_err:
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if (new_device)
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dev_release(dev);
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return ret;
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}
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/**
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* DPDK callback to remove one or more drivers for a PCI device.
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*
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* This function removes all drivers probed for a given PCI device.
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*
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* @param[in] pci_dev
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* Pointer to the PCI device.
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*
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* @return
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* 0 on success, the function cannot fail.
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*/
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static int
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mlx5_common_pci_remove(struct rte_pci_device *pci_dev)
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{
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struct mlx5_pci_device *dev;
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int ret;
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dev = pci_to_mlx5_device(pci_dev);
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||||
if (!dev)
|
||||
return -ENODEV;
|
||||
/* Matching device found, cleanup and unload drivers. */
|
||||
ret = drivers_remove(dev, dev->classes_loaded);
|
||||
if (!ret)
|
||||
dev_release(dev);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int
|
||||
mlx5_common_pci_dma_map(struct rte_pci_device *pci_dev, void *addr,
|
||||
uint64_t iova, size_t len)
|
||||
{
|
||||
struct mlx5_pci_driver *driver = NULL;
|
||||
struct mlx5_pci_driver *temp;
|
||||
struct mlx5_pci_device *dev;
|
||||
int ret = -EINVAL;
|
||||
|
||||
dev = pci_to_mlx5_device(pci_dev);
|
||||
if (!dev)
|
||||
return -ENODEV;
|
||||
TAILQ_FOREACH(driver, &drv_list, next) {
|
||||
if (device_class_enabled(dev, driver->driver_class) &&
|
||||
driver->pci_driver.dma_map) {
|
||||
ret = driver->pci_driver.dma_map(pci_dev, addr,
|
||||
iova, len);
|
||||
if (ret)
|
||||
goto map_err;
|
||||
}
|
||||
}
|
||||
return ret;
|
||||
map_err:
|
||||
TAILQ_FOREACH(temp, &drv_list, next) {
|
||||
if (temp == driver)
|
||||
break;
|
||||
if (device_class_enabled(dev, temp->driver_class) &&
|
||||
temp->pci_driver.dma_map && temp->pci_driver.dma_unmap)
|
||||
temp->pci_driver.dma_unmap(pci_dev, addr, iova, len);
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int
|
||||
mlx5_common_pci_dma_unmap(struct rte_pci_device *pci_dev, void *addr,
|
||||
uint64_t iova, size_t len)
|
||||
{
|
||||
struct mlx5_pci_driver *driver;
|
||||
struct mlx5_pci_device *dev;
|
||||
int local_ret = -EINVAL;
|
||||
int ret;
|
||||
|
||||
dev = pci_to_mlx5_device(pci_dev);
|
||||
if (!dev)
|
||||
return -ENODEV;
|
||||
ret = 0;
|
||||
/* There is no unmap error recovery in current implementation. */
|
||||
TAILQ_FOREACH_REVERSE(driver, &drv_list, mlx5_pci_bus_drv_head, next) {
|
||||
if (device_class_enabled(dev, driver->driver_class) &&
|
||||
driver->pci_driver.dma_unmap) {
|
||||
local_ret = driver->pci_driver.dma_unmap(pci_dev, addr,
|
||||
iova, len);
|
||||
if (local_ret && (ret == 0))
|
||||
ret = local_ret;
|
||||
}
|
||||
}
|
||||
if (local_ret)
|
||||
ret = local_ret;
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* PCI ID table is build dynamically based on registered mlx5 drivers. */
|
||||
static struct rte_pci_id *mlx5_pci_id_table;
|
||||
|
||||
static struct rte_pci_driver mlx5_pci_driver = {
|
||||
.driver = {
|
||||
.name = "mlx5_pci",
|
||||
},
|
||||
.probe = mlx5_common_pci_probe,
|
||||
.remove = mlx5_common_pci_remove,
|
||||
.dma_map = mlx5_common_pci_dma_map,
|
||||
.dma_unmap = mlx5_common_pci_dma_unmap,
|
||||
};
|
||||
|
||||
static int
|
||||
pci_id_table_size_get(const struct rte_pci_id *id_table)
|
||||
{
|
||||
int table_size = 0;
|
||||
|
||||
for (; id_table->vendor_id != 0; id_table++)
|
||||
table_size++;
|
||||
return table_size;
|
||||
}
|
||||
|
||||
static bool
|
||||
pci_id_exists(const struct rte_pci_id *id, const struct rte_pci_id *table,
|
||||
int next_idx)
|
||||
{
|
||||
int current_size = next_idx - 1;
|
||||
int i;
|
||||
|
||||
for (i = 0; i < current_size; i++) {
|
||||
if (id->device_id == table[i].device_id &&
|
||||
id->vendor_id == table[i].vendor_id &&
|
||||
id->subsystem_vendor_id == table[i].subsystem_vendor_id &&
|
||||
id->subsystem_device_id == table[i].subsystem_device_id)
|
||||
return true;
|
||||
}
|
||||
return false;
|
||||
}
|
||||
|
||||
static void
|
||||
pci_id_insert(struct rte_pci_id *new_table, int *next_idx,
|
||||
const struct rte_pci_id *id_table)
|
||||
{
|
||||
/* Traverse the id_table, check if entry exists in new_table;
|
||||
* Add non duplicate entries to new table.
|
||||
*/
|
||||
for (; id_table->vendor_id != 0; id_table++) {
|
||||
if (!pci_id_exists(id_table, new_table, *next_idx)) {
|
||||
/* New entry; add to the table. */
|
||||
new_table[*next_idx] = *id_table;
|
||||
(*next_idx)++;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static int
|
||||
pci_ids_table_update(const struct rte_pci_id *driver_id_table)
|
||||
{
|
||||
const struct rte_pci_id *id_iter;
|
||||
struct rte_pci_id *updated_table;
|
||||
struct rte_pci_id *old_table;
|
||||
int num_ids = 0;
|
||||
int i = 0;
|
||||
|
||||
old_table = mlx5_pci_id_table;
|
||||
if (old_table)
|
||||
num_ids = pci_id_table_size_get(old_table);
|
||||
num_ids += pci_id_table_size_get(driver_id_table);
|
||||
/* Increase size by one for the termination entry of vendor_id = 0. */
|
||||
num_ids += 1;
|
||||
updated_table = calloc(num_ids, sizeof(*updated_table));
|
||||
if (!updated_table)
|
||||
return -ENOMEM;
|
||||
if (TAILQ_EMPTY(&drv_list)) {
|
||||
/* Copy the first driver's ID table. */
|
||||
for (id_iter = driver_id_table; id_iter->vendor_id != 0;
|
||||
id_iter++, i++)
|
||||
updated_table[i] = *id_iter;
|
||||
} else {
|
||||
/* First copy existing table entries. */
|
||||
for (id_iter = old_table; id_iter->vendor_id != 0;
|
||||
id_iter++, i++)
|
||||
updated_table[i] = *id_iter;
|
||||
/* New id to be added at the end of current ID table. */
|
||||
pci_id_insert(updated_table, &i, driver_id_table);
|
||||
}
|
||||
/* Terminate table with empty entry. */
|
||||
updated_table[i].vendor_id = 0;
|
||||
mlx5_pci_driver.id_table = updated_table;
|
||||
mlx5_pci_id_table = updated_table;
|
||||
if (old_table)
|
||||
free(old_table);
|
||||
return 0;
|
||||
}
|
||||
|
||||
void
|
||||
mlx5_pci_driver_register(struct mlx5_pci_driver *driver)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ret = pci_ids_table_update(driver->pci_driver.id_table);
|
||||
if (ret)
|
||||
return;
|
||||
mlx5_pci_driver.drv_flags |= driver->pci_driver.drv_flags;
|
||||
TAILQ_INSERT_TAIL(&drv_list, driver, next);
|
||||
}
|
||||
|
||||
void mlx5_common_pci_init(void)
|
||||
{
|
||||
const struct rte_pci_id empty_table[] = {
|
||||
{
|
||||
.vendor_id = 0
|
||||
},
|
||||
};
|
||||
|
||||
/* All mlx5 PMDs constructor runs at same priority. So any of the PMD
|
||||
* including this one can register the PCI table first. If any other
|
||||
* PMD(s) have registered the PCI ID table, No need to register an empty
|
||||
* default one.
|
||||
*/
|
||||
if (mlx5_pci_id_table == NULL && pci_ids_table_update(empty_table))
|
||||
return;
|
||||
rte_pci_register(&mlx5_pci_driver);
|
||||
}
|
||||
|
||||
RTE_FINI(mlx5_common_pci_finish)
|
||||
{
|
||||
if (mlx5_pci_id_table != NULL) {
|
||||
/* Constructor doesn't register with PCI bus if it failed
|
||||
* to build the table.
|
||||
*/
|
||||
rte_pci_unregister(&mlx5_pci_driver);
|
||||
free(mlx5_pci_id_table);
|
||||
}
|
||||
}
|
||||
RTE_PMD_EXPORT_NAME(mlx5_common_pci, __COUNTER__);
|
||||
77
drivers/common/mlx5/mlx5_common_pci.h
Normal file
77
drivers/common/mlx5/mlx5_common_pci.h
Normal file
|
|
@ -0,0 +1,77 @@
|
|||
/* SPDX-License-Identifier: BSD-3-Clause
|
||||
* Copyright 2020 Mellanox Technologies, Ltd
|
||||
*/
|
||||
|
||||
#ifndef _MLX5_COMMON_PCI_H_
|
||||
#define _MLX5_COMMON_PCI_H_
|
||||
|
||||
/**
|
||||
* @file
|
||||
*
|
||||
* RTE Mellanox PCI Driver Interface
|
||||
* Mellanox ConnectX PCI device supports multiple class (net/vdpa/regex)
|
||||
* devices. This layer enables creating such multiple class of devices on a
|
||||
* single PCI device by allowing to bind multiple class specific device
|
||||
* driver to attach to mlx5_pci driver.
|
||||
*
|
||||
* ----------- ------------ -------------
|
||||
* | mlx5 | | mlx5 | | mlx5 |
|
||||
* | net pmd | | vdpa pmd | | regex pmd |
|
||||
* ----------- ------------ -------------
|
||||
* \ | /
|
||||
* \ | /
|
||||
* \ -------------- /
|
||||
* \______| mlx5 |_____ /
|
||||
* | pci common |
|
||||
* --------------
|
||||
* |
|
||||
* -----------
|
||||
* | mlx5 |
|
||||
* | pci dev |
|
||||
* -----------
|
||||
*
|
||||
* - mlx5 pci driver binds to mlx5 PCI devices defined by PCI
|
||||
* ID table of all related mlx5 PCI devices.
|
||||
* - mlx5 class driver such as net, vdpa, regex PMD defines its
|
||||
* specific PCI ID table and mlx5 bus driver probes matching
|
||||
* class drivers.
|
||||
* - mlx5 pci bus driver is cental place that validates supported
|
||||
* class combinations.
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif /* __cplusplus */
|
||||
|
||||
#include <rte_pci.h>
|
||||
#include <rte_bus_pci.h>
|
||||
|
||||
#include <mlx5_common.h>
|
||||
|
||||
void mlx5_common_pci_init(void);
|
||||
|
||||
/**
|
||||
* A structure describing a mlx5 pci driver.
|
||||
*/
|
||||
struct mlx5_pci_driver {
|
||||
struct rte_pci_driver pci_driver; /**< Inherit core pci driver. */
|
||||
uint32_t driver_class; /**< Class of this driver, enum mlx5_class */
|
||||
TAILQ_ENTRY(mlx5_pci_driver) next;
|
||||
};
|
||||
|
||||
/**
|
||||
* Register a mlx5_pci device driver.
|
||||
*
|
||||
* @param driver
|
||||
* A pointer to a mlx5_pci_driver structure describing the driver
|
||||
* to be registered.
|
||||
*/
|
||||
__rte_internal
|
||||
void
|
||||
mlx5_pci_driver_register(struct mlx5_pci_driver *driver);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif /* __cplusplus */
|
||||
|
||||
#endif /* _MLX5_COMMON_PCI_H_ */
|
||||
|
|
@ -91,5 +91,7 @@ INTERNAL {
|
|||
mlx5_malloc;
|
||||
mlx5_realloc;
|
||||
mlx5_free;
|
||||
|
||||
mlx5_pci_driver_register;
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -5,6 +5,7 @@
|
|||
subdirs = [
|
||||
'common',
|
||||
'bus',
|
||||
'common/mlx5', # depends on bus.
|
||||
'mempool', # depends on common and bus.
|
||||
'net', # depends on common, bus, mempool
|
||||
'raw', # depends on common, bus and net.
|
||||
|
|
|
|||
Loading…
Reference in a new issue