5550889d65
Add ffu to support offload flow into HW. It supports forward, mirror, push VLAN, pop VLAN. It also supports flowset for a group flow definition. The config file can configure debug log, port speed, epl port mapping dpdk port, flowset. All these configuration will be used by switch management. Statistics includes epl port, ffu rule, dpdk port, and error. All these statistics data are read from HW. Modify switch header file to support getting logical port and glort and device info. Signed-off-by: Xiaojun Liu <xiaojun.liu@silicom.co.il>
177 lines
5.3 KiB
C
177 lines
5.3 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright 2019 Silicom Ltd. Connectivity Solutions
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*/
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#ifndef _FM10K_CONFIG_H_
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#define _FM10K_CONFIG_H_
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#include <stdint.h>
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#include "fm10k_switch.h"
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/* General configuration */
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#define FM10K_CONFIG_TYPE_NULL 0
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#define FM10K_CONFIG_BIND_PF_NUMBER 1
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#define FM10K_CONFIG_EXT_PORT_SPEED 2
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/* Internal redirect configuration */
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#define FM10K_CONFIG_DPDK_PORT_MAP_PF 10
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#define FM10K_CONFIG_EXT_PORT_MAP_PF 11
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/* Debug configuration */
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#define FM10K_CONFIG_DEBUG_START 50
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#define FM10K_CONFIG_DEBUG_ENABLE (FM10K_CONFIG_DEBUG_START + 0)
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#define FM10K_CONFIG_DEBUG_CONFIG (FM10K_CONFIG_DEBUG_START + 1)
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#define FM10K_CONFIG_DEBUG_FFU_INIT (FM10K_CONFIG_DEBUG_START + 2)
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#define FM10K_CONFIG_DEBUG_FFU_REG (FM10K_CONFIG_DEBUG_START + 3)
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#define FM10K_CONFIG_DEBUG_FFU_RULE (FM10K_CONFIG_DEBUG_START + 4)
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#define FM10K_CONFIG_DEBUG_STATS_PORT (FM10K_CONFIG_DEBUG_START + 5)
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#define FM10K_CONFIG_DEBUG_STATS_QUEUE (FM10K_CONFIG_DEBUG_START + 6)
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#define FM10K_CONFIG_DEBUG_STATS_FFU (FM10K_CONFIG_DEBUG_START + 7)
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#define FM10K_CONFIG_DEBUG_STATS_MORE (FM10K_CONFIG_DEBUG_START + 8)
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#define FM10K_CONFIG_DEBUG_STATS_INTERVAL (FM10K_CONFIG_DEBUG_START + 9)
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/* external redirect configuration */
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#define FM10K_CONFIG_FLOWSET_START 80
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#define FM10K_CONFIG_FLOWSET_STOP 81
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#define FM10K_CONFIG_FLOWSET_ENABLE 82
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#define FM10K_CONFIG_FLOW_COND_START 100
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#define FM10K_CONFIG_FLOW_COND_SRC_EXT_PORT \
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(FM10K_CONFIG_FLOW_COND_START + 0)
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#define FM10K_CONFIG_FLOW_COND_SRC_DPDK_PORT \
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(FM10K_CONFIG_FLOW_COND_START + 1)
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#define FM10K_CONFIG_FLOW_COND_VLAN \
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(FM10K_CONFIG_FLOW_COND_START + 2)
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#define FM10K_CONFIG_FLOW_COND_END \
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(FM10K_CONFIG_FLOW_COND_START + 2)
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#define FM10K_CONFIG_FLOW_ACT_START 200
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#define FM10K_CONFIG_FLOW_ACT_FW_EXT_PORT \
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(FM10K_CONFIG_FLOW_ACT_START + 0)
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#define FM10K_CONFIG_FLOW_ACT_FW_DPDK_PORT \
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(FM10K_CONFIG_FLOW_ACT_START + 1)
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#define FM10K_CONFIG_FLOW_ACT_FW_VALN \
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(FM10K_CONFIG_FLOW_ACT_START + 2)
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#define FM10K_CONFIG_FLOW_ACT_END \
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(FM10K_CONFIG_FLOW_ACT_START + 2)
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#define FM10K_CONFIG_FLOW_NONE_PORT 0
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#define FM10K_CONFIG_FLOW_EXT_PORT 1
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#define FM10K_CONFIG_FLOW_DPDK_PORT 2
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#define FM10K_CONFIG_VALUE_NULL 0
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#define FM10K_CONFIG_VALUE_INT 1
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#define FM10K_CONFIG_VALUE_STR 2
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/* SWITCH config */
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#define FM10K_CONFIG_PORT_MAP_NULL 0
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#define FM10K_CONFIG_PORT_MAP_PF 1
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#define FM10K_CONFIG_PORT_MAP_PFS 2
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#define FM10K_CONFIG_PORT_MAP_PFSS 3
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/* DPDK port */
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#define FM10K_CONFIG_DPDK_NULL 0
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#define FM10K_CONFIG_DPDK_PF 1
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#define FM10K_CONFIG_DPDK_VF 2
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#define FM10K_CONFIG_DPDK_MAX 3
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struct fm10k_cfg_port_pf_map {
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uint8_t type;
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uint8_t map_no[2];
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};
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/* Configuration read from file */
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struct fm10k_cfg_config_item {
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uint8_t type;
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uint8_t val_type;
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uint16_t key_param;
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const char *describe;
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union {
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int64_t int64;
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char *str;
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} val;
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};
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struct fm10k_hw;
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struct fm10k_dpdk_port {
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uint8_t type;
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struct fm10k_hw *hw;
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void *rte_dev;
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void *flow_list;
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uint16_t pf_no;
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uint8_t tx_queue_num;
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uint8_t rx_queue_num;
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};
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/* Flow configuration */
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struct fm10k_cfg_port {
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uint8_t port_type;
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uint8_t port_no;
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uint16_t vlan_id;
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};
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struct fm10k_cfg_flow {
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/* set by configuration */
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struct fm10k_cfg_flow *prev;
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struct fm10k_cfg_flow *next;
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uint8_t flow_no; /* only configured flow has this NO. */
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struct fm10k_cfg_port src_port;
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struct fm10k_cfg_port fw_port[2];
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/* set by ffu rule add */
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uint16_t rule_id;
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};
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#define FM10K_CONFIG_FLOWSET_NAME_MAX 256
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struct fm10k_cfg_flowset {
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char name[FM10K_CONFIG_FLOWSET_NAME_MAX];
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struct fm10k_cfg_flow flow_head;
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struct fm10k_cfg_flowset *next;
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};
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/* Configuration */
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struct fm10k_dpdk_cfg {
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uint8_t pf_num; /* configure by conf */
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uint8_t pf_bind; /* initialize by dpdk */
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uint8_t pf_max; /* set by card type */
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uint8_t ext_port_num; /* configure by conf */
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uint8_t ext_port_speed; /* configure by conf */
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uint32_t debug_cfg; /* configure by conf */
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uint32_t stats_interval;/* configure by conf */
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struct fm10k_hw *master_hw; /* initialize by dpdk */
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struct fm10k_hw *pf_hw[FM10K_SW_PEP_PORTS_MAX]; /* initialize by dpdk */
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/* initialize by dpdk */
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struct fm10k_dpdk_port ports[FM10K_SW_LOGICAL_PORTS_MAX];
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/* configure by conf or default*/
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struct fm10k_cfg_port_pf_map dpdk_port_map[FM10K_SW_LOGICAL_PORTS_MAX];
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/* configure by conf */
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struct fm10k_cfg_port_pf_map ext_port_map[FM10K_SW_EXT_PORTS_MAX];
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struct fm10k_cfg_config_item *config_list; /* configure by conf */
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struct fm10k_cfg_flowset flowset_head; /* transfer from conf file */
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struct fm10k_cfg_flowset *current;
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};
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static inline bool
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fm10k_config_check_debug(struct fm10k_dpdk_cfg *cfg, uint16_t dbg)
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{
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return cfg->debug_cfg & 1 << (dbg - FM10K_CONFIG_DEBUG_START) &&
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cfg->debug_cfg & 1;
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}
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struct fm10k_cfg_flowset *fm10k_config_flowset_get(const char *name);
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struct fm10k_cfg_flowset *fm10k_config_flowset_current_get(void);
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void fm10k_config_flowset_current_set(struct fm10k_cfg_flowset *new);
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void fm10k_config_flow_list_add_tail(struct fm10k_cfg_flowset *flowset,
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struct fm10k_cfg_flow *flow);
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void fm10k_config_flow_list_delete(struct fm10k_cfg_flow *flow);
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bool fm10k_config_flow_list_end(struct fm10k_cfg_flow *list,
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struct fm10k_cfg_flow *flow);
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void fm10k_config_cfg_flowset_show(void);
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struct fm10k_hw *fm10k_config_hw_get(int port_no);
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int fm10k_config_init(struct fm10k_switch *sw, struct fm10k_hw *hw);
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#endif /* _FM10K_CONFIG_H */
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