a1b6cda16a
The arch-specific directories arm, ppc and x86 in common/include/arch/ are moved as include/ sub-directories of respective arch directories: - arm/include/ - ppc/include/ - x86/include/ Signed-off-by: Thomas Monjalon <thomas@monjalon.net> Reviewed-by: Gavin Hu <gavin.hu@arm.com> Reviewed-by: David Christensen <drc@linux.vnet.ibm.com> Acked-by: David Marchand <david.marchand@redhat.com>
63 lines
1.3 KiB
C
63 lines
1.3 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(c) 2012,2013 Intel Corporation
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*/
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#ifndef _RTE_RTM_H_
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#define _RTE_RTM_H_ 1
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/* Official RTM intrinsics interface matching gcc/icc, but works
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on older gcc compatible compilers and binutils. */
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#include <rte_common.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define RTE_XBEGIN_STARTED (~0u)
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#define RTE_XABORT_EXPLICIT (1 << 0)
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#define RTE_XABORT_RETRY (1 << 1)
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#define RTE_XABORT_CONFLICT (1 << 2)
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#define RTE_XABORT_CAPACITY (1 << 3)
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#define RTE_XABORT_DEBUG (1 << 4)
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#define RTE_XABORT_NESTED (1 << 5)
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#define RTE_XABORT_CODE(x) (((x) >> 24) & 0xff)
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static __attribute__((__always_inline__)) inline
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unsigned int rte_xbegin(void)
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{
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unsigned int ret = RTE_XBEGIN_STARTED;
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asm volatile(".byte 0xc7,0xf8 ; .long 0" : "+a" (ret) :: "memory");
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return ret;
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}
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static __attribute__((__always_inline__)) inline
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void rte_xend(void)
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{
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asm volatile(".byte 0x0f,0x01,0xd5" ::: "memory");
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}
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/* not an inline function to workaround a clang bug with -O0 */
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#define rte_xabort(status) do { \
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asm volatile(".byte 0xc6,0xf8,%P0" :: "i" (status) : "memory"); \
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} while (0)
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static __attribute__((__always_inline__)) inline
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int rte_xtest(void)
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{
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unsigned char out;
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asm volatile(".byte 0x0f,0x01,0xd6 ; setnz %0" :
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"=r" (out) :: "memory");
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return out;
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}
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#ifdef __cplusplus
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}
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#endif
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#endif /* _RTE_RTM_H_ */
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