Rewritten SPI_CTRL using a bitfield instead of raw values for ease of documentation
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3
.gitignore
vendored
Normal file
3
.gitignore
vendored
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@ -0,0 +1,3 @@
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/fm10k-dump
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/*.o
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/.idea
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4
Makefile
4
Makefile
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@ -2,10 +2,10 @@
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default: fm10k-dump
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fm10k-dump.o: fm10k-dump.c
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gcc -c fm10k-dump.c -o fm10k-dump.o
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gcc -c fm10k-dump.c -o fm10k-dump.o -Wall -Wno-packed-bitfield-compat
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fm10k-dump: fm10k-dump.o
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gcc fm10k-dump.o -o fm10k-dump
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gcc fm10k-dump.o -o fm10k-dump -Wall
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clean:
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-rm -f fm10k-dump
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94
fm10k-dump.c
94
fm10k-dump.c
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@ -53,7 +53,31 @@
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#define FM10K_SPI_FREQ_KHZ 50000
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#define FM10K_SPI_HEADER_COMMAND_READ_BYTES 0x3
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/* Test for GCC >= 4.4.0, see https://gcc.gnu.org/gcc-4.4/changes.html : Packed bit-fields of type char were not properly bit-packed on many targets prior to GCC 4.4 */
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#if __GNUC__ > 4 || (__GNUC__ == 4 && (__GNUC_MINOR__ >= 4))
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typedef union {
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struct {
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uint16_t Freq : 10; // Actual speed is PCIE_REFCLK/(2*(1+Freq))
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uint8_t Enable : 1;
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uint8_t Command : 4; // 0b00 = reset
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uint8_t HeaderSize : 2; // 0b00 = 4 bytes
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uint8_t DataSize : 2; // 0b00 = 4 bytes
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uint8_t DataShiftMethod : 2; // 0b00 = SINGLE, 0b01 = DUAL, 0b10 = QUAD, 0b11 = Reserved
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uint8_t Busy : 1; // volatile ReadOnly
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uint8_t Selected : 1; // volatile ReadOnly
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uint8_t DirIO2 : 1; // 0b0 = Input, 0b1 = Output
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uint8_t DirIO3 : 1; // 0b0 = Input, 0b1 = Output
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uint8_t PinIO2 : 1; // volatile ReadWrite
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uint8_t PinIO3 : 1; // volatile ReadWrite
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uint8_t Reserved : 5;
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} __attribute__((packed)) fields;
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uint32_t value;
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} SPI_CTRL;
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#else
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#error "Packed bit-fields of type char were not properly bit-packed on many targets prior to GCC 4.4, upgrade to GCC >= 4.4."
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#endif
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void ReadRegister32(uintptr_t mem, uint32_t addr, uint32_t* value) {
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*value = *(((uint32_t*)mem) + addr);
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@ -63,10 +87,13 @@ void WriteRegister32(uintptr_t mem, uint32_t addr, uint32_t value) {
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*(uint32_t volatile*)(((uint32_t*)mem) + addr) = value;
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//If returning instantly this will caused missed writes. nanosleep wait of 1 nsec was too much. Busy wait works
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#pragma GCC diagnostic push
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#pragma GCC diagnostic ignored "-Wunused-but-set-variable"
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volatile uint32_t dummy;
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for(uint32_t i = 0; i < 100; ++i){
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dummy = i;
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}
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#pragma GCC diagnostic pop
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}
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uint32_t get_interval_diff(struct timeval *begin, struct timeval *end) {
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@ -86,17 +113,18 @@ uint32_t get_interval_diff(struct timeval *begin, struct timeval *end) {
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return (diff.tv_sec * 1000 + diff.tv_usec / 1000);
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}
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uint32_t fm10k_uio_spi_SetCtrlReg(uintptr_t mem, uint32_t value){
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uint32_t spiCtrl;
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uint32_t fm10k_uio_spi_SetCtrlReg(uintptr_t mem, SPI_CTRL value){
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struct timeval startTime;
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uint8_t isTimeout = 0;
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SPI_CTRL spiCtrl;
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spiCtrl.value = 0;
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WriteRegister32(mem, FM10K_REGISTER_SPI_CTRL, value);
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WriteRegister32(mem, FM10K_REGISTER_SPI_CTRL, value.value);
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gettimeofday(&startTime, NULL);
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do{
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if(isTimeout){
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printf("Timeout waiting for SPI_CTRL Busy. 0x%02x\n", spiCtrl);
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printf("Timeout waiting for SPI_CTRL.Busy 0x%02x\n", spiCtrl.value);
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return 1;
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}
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@ -104,39 +132,46 @@ uint32_t fm10k_uio_spi_SetCtrlReg(uintptr_t mem, uint32_t value){
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isTimeout = 1;
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}
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ReadRegister32(mem, FM10K_REGISTER_SPI_CTRL, &spiCtrl);
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ReadRegister32(mem, FM10K_REGISTER_SPI_CTRL, &spiCtrl.value);
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} while ((spiCtrl >> 21) & 1); //While "Busy"
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} while (spiCtrl.fields.Busy);
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/* write back SPI_CTRL with command = 0 */
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spiCtrl &= 0xffff87ff;
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WriteRegister32(mem, FM10K_REGISTER_SPI_CTRL, spiCtrl);
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spiCtrl.fields.Command = 0;
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WriteRegister32(mem, FM10K_REGISTER_SPI_CTRL, spiCtrl.value);
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return 0;
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}
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void fm10k_uio_spi_Enable(uintptr_t mem){
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//ENABLE SPI
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uint32_t spiCtrl = 0;
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ReadRegister32(mem, FM10K_REGISTER_SPI_CTRL, &spiCtrl);
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SPI_CTRL spiCtrl;
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ReadRegister32(mem, FM10K_REGISTER_SPI_CTRL, &spiCtrl.value);
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/* keep current freq setting and set SPI Enable */
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spiCtrl &= 0x3ff;
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spiCtrl |= 1<<10;
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WriteRegister32(mem, FM10K_REGISTER_SPI_CTRL, spiCtrl);
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SPI_CTRL newSpiCtrl;
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newSpiCtrl.value = 0;
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newSpiCtrl.fields.Freq = spiCtrl.fields.Freq;
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newSpiCtrl.fields.Enable = 1;
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WriteRegister32(mem, FM10K_REGISTER_SPI_CTRL, newSpiCtrl.value);
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}
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void fm10k_uio_spi_Disable(uintptr_t mem){
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//DISABLE SPI
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uint32_t spiCtrl = 0;
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ReadRegister32(mem, FM10K_REGISTER_SPI_CTRL, &spiCtrl);
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/* keep current freq setting and set SPI Disable */
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spiCtrl &= 0x3ff;
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WriteRegister32(mem, FM10K_REGISTER_SPI_CTRL, spiCtrl);
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SPI_CTRL spiCtrl;
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ReadRegister32(mem, FM10K_REGISTER_SPI_CTRL, &spiCtrl.value);
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/* keep current freq setting and set SPI Enable = 0 */
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SPI_CTRL newSpiCtrl;
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newSpiCtrl.value = 0;
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newSpiCtrl.fields.Freq = spiCtrl.fields.Freq;
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WriteRegister32(mem, FM10K_REGISTER_SPI_CTRL, newSpiCtrl.value);
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}
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uint32_t fm10k_uio_spi_ReadFlash(uintptr_t mem, uint32_t address, uint8_t* data, int32_t len){
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uint32_t spiCtrl;
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SPI_CTRL currentSpiCtrl;
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SPI_CTRL spiCtrl;
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spiCtrl.value = 0;
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uint32_t rxData;
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uint32_t header;
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int32_t freq;
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@ -146,32 +181,32 @@ uint32_t fm10k_uio_spi_ReadFlash(uintptr_t mem, uint32_t address, uint8_t* data,
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fm10k_uio_spi_Enable(mem);
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ReadRegister32(mem, FM10K_REGISTER_SPI_CTRL, &spiCtrl);
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ReadRegister32(mem, FM10K_REGISTER_SPI_CTRL, ¤tSpiCtrl.value);
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if(FM10K_SPI_FREQ_KHZ > 0){
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freq = ((100000 / (int)FM10K_SPI_FREQ_KHZ) / 2) - 1;
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if (freq < 0){
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freq = 0;
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}
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spiCtrl ^= ((spiCtrl >> 0) ^ freq) & ((2 << 9) - 1); //Set Freq
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spiCtrl.fields.Freq = freq;
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}
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spiCtrl &= 0x7ff;
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spiCtrl.fields.Enable = currentSpiCtrl.fields.Enable;
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/* header: command (1 byte: READ_BYTES) + address (3 bytes) */
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header = (0x3 << 24) | (address & 0xffffff);
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header = (FM10K_SPI_HEADER_COMMAND_READ_BYTES << 24) | (address & 0xffffff);
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WriteRegister32(mem, FM10K_REGISTER_SPI_HEADER, header);
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/* first loop only: set send header flag. Following loops: shift only data. */
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spiCtrl |= (0x1 << 11);
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spiCtrl.fields.Command |= 0b0001;
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cnt = 0;
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while (cnt < len){
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/* determine the number of data bytes to read [1..4] */
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numRead = (len - cnt) > 3 ? 4 : (len - cnt);
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/* set 'shift data' flag and number of data bytes */
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spiCtrl |= ((0x4 << 11) | ((numRead & 0x03) << 17));
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spiCtrl.fields.Command |= 0b0100;
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spiCtrl.fields.DataSize = numRead & 0b11;
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if(fm10k_uio_spi_SetCtrlReg(mem, spiCtrl)){
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return 1;
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@ -186,11 +221,12 @@ uint32_t fm10k_uio_spi_ReadFlash(uintptr_t mem, uint32_t address, uint8_t* data,
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data[cnt++] = (rxData >> (numRead * 8)) & 0xff;
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}
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spiCtrl &= 0x7ff;
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spiCtrl.fields.Command = 0b0000;
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spiCtrl.fields.DataSize = 0b0000;
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}
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/* release CS */
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spiCtrl |= (0x8 << 11);
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spiCtrl.fields.Command = 0b1000;
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if(fm10k_uio_spi_SetCtrlReg(mem, spiCtrl)){
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return 1;
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}
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@ -233,7 +269,7 @@ int main(int argc, char** argv){
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unsigned int mbToRead = 1;
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if(argc > 3){
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sscanf(argv[3], "%u", &mbToRead);
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mbToRead = strtoul(argv[3], NULL, 10);
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}
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if(mbToRead > 128){
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