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37b1644120
Author | SHA1 | Date | |
---|---|---|---|
DataHoarder | 37b1644120 | ||
DataHoarder | 702209cbe6 |
2
COPYING
2
COPYING
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@ -1,5 +1,5 @@
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|||
Copyright (c) 2014 - 2015, Intel Corporation
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Copyright (c) 2020, FM10K-Documentation Contributors
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Copyright (c) 2021, FM10K-Documentation Contributors
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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@ -6,7 +6,7 @@
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* Usage: ./fm10k-dump <output.bin> [readSizeInMegabits=8]
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*
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* Copyright (c) 2014 - 2015, Intel Corporation
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* Copyright (c) 2020, FM10K-Documentation Contributors
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* Copyright (c) 2021, FM10K-Documentation Contributors
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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@ -53,14 +53,14 @@ int main(int argc, char **argv) {
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}
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FM10K_PCI_MAPPED_DEVICE map;
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FM10K_PCI_DEVICES devices = fm10k_pci_findDevices();
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FM10K_PCI_DEVICES devices = fm10k_pci_findDevices();
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if(fm10k_pci_findDevice(&devices, &map)){
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printf("Unable to find FM10K device with BAR4 port access, or could not take SPI lock. Check bifurcation settings?\n");
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return 1;
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}
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if (fm10k_pci_findDevice(&devices, &map)) {
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printf("Unable to find FM10K device with BAR4 port access, or could not take SPI lock. Check bifurcation settings?\n");
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return 1;
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}
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printf("FM10K device found at %s :: Vendor 0x%04x :: Class 0x%04x\n", map.device->bar4Path, map.device->vendor, map.device->class);
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printf("FM10K device found at %s :: Vendor 0x%04x :: Class 0x%04x\n", map.device->bar4Path, map.device->vendor, map.device->class);
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SPI_COMMAND_READ_MANUFACTURER_RESULT manufacturerInfo = fm10k_mem_spi_ReadManufacturerData((uintptr_t) map.map);
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if (manufacturerInfo.value == 0) {
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@ -129,7 +129,7 @@ int main(int argc, char **argv) {
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fm10k_mem_ReleasePlatformLock((uintptr_t) map.map);
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fm10k_pci_unmapDevice(&map);
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fm10k_pci_unmapDevice(&map);
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printf("Read %u bytes\n", bootImageSize);
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@ -6,7 +6,7 @@
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* Usage: ./fm10k-flash <input.bin> <backup.bin>
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*
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* Copyright (c) 2014 - 2015, Intel Corporation
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* Copyright (c) 2020, FM10K-Documentation Contributors
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* Copyright (c) 2021, FM10K-Documentation Contributors
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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@ -39,7 +39,6 @@
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#include <unistd.h>
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int main(int argc, char **argv) {
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FILE *fdBackup;
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FILE *fdInput;
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@ -76,15 +75,15 @@ int main(int argc, char **argv) {
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return 1;
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}
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FM10K_PCI_MAPPED_DEVICE map;
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FM10K_PCI_DEVICES devices = fm10k_pci_findDevices();
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FM10K_PCI_MAPPED_DEVICE map;
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FM10K_PCI_DEVICES devices = fm10k_pci_findDevices();
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if(fm10k_pci_findDevice(&devices, &map)){
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printf("Unable to find FM10K device with BAR4 port access, or could not take SPI lock. Check bifurcation settings?\n");
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return 1;
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}
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if (fm10k_pci_findDevice(&devices, &map)) {
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printf("Unable to find FM10K device with BAR4 port access, or could not take SPI lock. Check bifurcation settings?\n");
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return 1;
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}
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printf("FM10K device found at %s :: Vendor 0x%04x :: Class 0x%04x\n", map.device->bar4Path, map.device->vendor, map.device->class);
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printf("FM10K device found at %s :: Vendor 0x%04x :: Class 0x%04x\n", map.device->bar4Path, map.device->vendor, map.device->class);
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SPI_COMMAND_READ_MANUFACTURER_RESULT manufacturerInfo = fm10k_mem_spi_ReadManufacturerData((uintptr_t) map.map);
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if (manufacturerInfo.value == 0) {
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@ -238,7 +237,7 @@ int main(int argc, char **argv) {
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fm10k_mem_ReleasePlatformLock((uintptr_t) map.map);
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fm10k_pci_unmapDevice(&map);
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fm10k_pci_unmapDevice(&map);
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free(value);
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143
src/fm10k.c
143
src/fm10k.c
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@ -3,7 +3,7 @@
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* Creation Date: December 20, 2020
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*
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* Copyright (c) 2014 - 2015, Intel Corporation
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* Copyright (c) 2020, FM10K-Documentation Contributors
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* Copyright (c) 2021, FM10K-Documentation Contributors
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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@ -46,11 +46,11 @@ KNOWN_FLASH_DEVICE KNOWN_FLASH_DEVICE_LIST[] = {
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};
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void ReadRegister32(uintptr_t mem, uint32_t addr, uint32_t *value) {
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*value = *(((volatile uint32_t *) mem) + addr);
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*value = *(((volatile uint32_t *) mem) + addr);
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}
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void WriteRegister32(uintptr_t mem, uint32_t addr, uint32_t value) {
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*(((volatile uint32_t *) mem) + addr) = value;
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*(((volatile uint32_t *) mem) + addr) = value;
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//If returning instantly this will caused missed writes. nanosleep wait of 1 nsec was too much. Busy wait works
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#pragma GCC diagnostic push
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@ -430,43 +430,43 @@ const KNOWN_FLASH_DEVICE *getKnownFlashFromManufacturerData(SPI_COMMAND_READ_MAN
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return NULL;
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}
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uint8_t fm10k_mem_spi_LockTake(uintptr_t mem){
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uint8_t fm10k_mem_spi_LockTake(uintptr_t mem) {
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uint32_t maxTries = 64;
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API_SPI_LOCK_STATE spiLock;
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do{
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do {
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ReadRegister32(mem, FM10K_API_SPI_LOCK_STATE, &spiLock.value);
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if(!spiLock.fields.LockTaken){
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if (!spiLock.fields.LockTaken) {
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spiLock.fields.LockTaken = 1;
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spiLock.fields.LockOwner = 0; //Switch API
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WriteRegister32(mem, FM10K_API_SPI_LOCK_STATE, spiLock.value);
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nanosleep(&(struct timespec){0, 50000}, NULL); //Delay to observe if lock was actually taken by us
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nanosleep(&(struct timespec) {0, 50000}, NULL); //Delay to observe if lock was actually taken by us
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ReadRegister32(mem, FM10K_API_SPI_LOCK_STATE, &spiLock.value);
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if(spiLock.fields.LockTaken && spiLock.fields.LockOwner == 0){
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if (spiLock.fields.LockTaken && spiLock.fields.LockOwner == 0) {
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printf("Taken SPI Lock\n");
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return 0;
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}
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}else if(spiLock.fields.LockOwner == 0){ //Are we taking a lock again, with same owner?
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} else if (spiLock.fields.LockOwner == 0) { //Are we taking a lock again, with same owner?
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printf("WARNING: SPI Lock was already taken by us, maybe other process was using it?\n");
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return 0;
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}
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nanosleep(&(struct timespec){0, 1000}, NULL);
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nanosleep(&(struct timespec) {0, 1000}, NULL);
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} while (--maxTries);
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return 1;
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}
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void fm10k_mem_spi_LockRelease(uintptr_t mem){
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void fm10k_mem_spi_LockRelease(uintptr_t mem) {
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API_SPI_LOCK_STATE spiLock;
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ReadRegister32(mem, FM10K_API_SPI_LOCK_STATE, &spiLock.value);
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if(!spiLock.fields.LockTaken) {
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if (!spiLock.fields.LockTaken) {
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printf("WARNING: SPI Lock was already released\n");
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return;
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}
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if(spiLock.fields.LockOwner != 0){
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if (spiLock.fields.LockOwner != 0) {
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printf("WARNING: SPI Lock Owner unexpected: %u\n", spiLock.fields.LockOwner);
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return;
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}
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@ -479,7 +479,7 @@ void fm10k_mem_spi_LockRelease(uintptr_t mem){
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uint32_t bsm_interruptMask[2] = {0, 0};
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void fm10k_mem_bsm_DisableInterrupts(uintptr_t mem){
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void fm10k_mem_bsm_DisableInterrupts(uintptr_t mem) {
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//Save old registers
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ReadRegister32(mem, FM10K_REGISTER_INTERRUPT_MASK_BSM(0), bsm_interruptMask);
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ReadRegister32(mem, FM10K_REGISTER_INTERRUPT_MASK_BSM(1), bsm_interruptMask + 1);
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@ -487,90 +487,90 @@ void fm10k_mem_bsm_DisableInterrupts(uintptr_t mem){
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WriteRegister32(mem, FM10K_REGISTER_INTERRUPT_MASK_BSM(1), 0xFFFFFFFF);
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}
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void fm10k_mem_bsm_RestoreInterrupts(uintptr_t mem){
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void fm10k_mem_bsm_RestoreInterrupts(uintptr_t mem) {
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WriteRegister32(mem, FM10K_REGISTER_INTERRUPT_MASK_BSM(0), bsm_interruptMask[0]);
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WriteRegister32(mem, FM10K_REGISTER_INTERRUPT_MASK_BSM(1), bsm_interruptMask[1]);
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}
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uint8_t fm10k_mem_TakePlatformLock(uintptr_t mem){
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if(fm10k_mem_spi_LockTake(mem)){
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uint8_t fm10k_mem_TakePlatformLock(uintptr_t mem) {
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if (fm10k_mem_spi_LockTake(mem)) {
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return 1;
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}
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fm10k_mem_bsm_DisableInterrupts(mem);
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return 0;
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}
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void fm10k_mem_ReleasePlatformLock(uintptr_t mem){
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void fm10k_mem_ReleasePlatformLock(uintptr_t mem) {
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fm10k_mem_spi_LockRelease(mem);
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fm10k_mem_bsm_RestoreInterrupts(mem);
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}
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int fm10k_pci_unmapDevice(FM10K_PCI_MAPPED_DEVICE* map){
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if(map->map != NULL && map->map != MAP_FAILED){
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if(munmap(map->map, FM10K_BAR4_SIZE) != 0){
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return 1;
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}
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map->map = NULL;
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}
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int fm10k_pci_unmapDevice(FM10K_PCI_MAPPED_DEVICE *map) {
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if (map->map != NULL && map->map != MAP_FAILED) {
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if (munmap(map->map, FM10K_BAR4_SIZE) != 0) {
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return 1;
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}
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map->map = NULL;
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}
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if (map->fd > 0) {
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if(close(map->fd) != 0){
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return 1;
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}
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map->fd = 0;
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}
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if (map->fd > 0) {
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if (close(map->fd) != 0) {
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return 1;
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}
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map->fd = 0;
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}
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return 0;
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return 0;
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}
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int fm10k_pci_mapDevice(const FM10K_PCI_DEVICE* device, FM10K_PCI_MAPPED_DEVICE* map){
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int fdBAR4;
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fdBAR4 = open(device->bar4Path, O_RDWR);
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if (fdBAR4 <= 0) {
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printf("Unable to open BAR4 resource %s to read NVM\n", device->bar4Path);
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return 1;
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}
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int fm10k_pci_mapDevice(const FM10K_PCI_DEVICE *device, FM10K_PCI_MAPPED_DEVICE *map) {
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int fdBAR4;
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fdBAR4 = open(device->bar4Path, O_RDWR);
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if (fdBAR4 <= 0) {
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printf("Unable to open BAR4 resource %s to read NVM\n", device->bar4Path);
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return 1;
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}
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void *memmapAddr;
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memmapAddr = mmap(NULL, FM10K_BAR4_SIZE, PROT_READ | PROT_WRITE, MAP_SHARED, fdBAR4, 0);
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if (memmapAddr == MAP_FAILED) {
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printf("Unable to map BAR4 resource %s to read NVM\n", device->bar4Path);
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close(fdBAR4);
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return 1;
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}
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void *memmapAddr;
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memmapAddr = mmap(NULL, FM10K_BAR4_SIZE, PROT_READ | PROT_WRITE, MAP_SHARED, fdBAR4, 0);
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if (memmapAddr == MAP_FAILED) {
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printf("Unable to map BAR4 resource %s to read NVM\n", device->bar4Path);
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close(fdBAR4);
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return 1;
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}
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map->device = device;
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map->fd = fdBAR4;
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map->map = memmapAddr;
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map->device = device;
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map->fd = fdBAR4;
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map->map = memmapAddr;
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if(fm10k_mem_TakePlatformLock((uintptr_t) map->map)){
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//Error taking lock
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fm10k_pci_unmapDevice(map);
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return 1;
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}
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if (fm10k_mem_TakePlatformLock((uintptr_t) map->map)) {
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//Error taking lock
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fm10k_pci_unmapDevice(map);
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return 1;
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}
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return 0;
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return 0;
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}
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int fm10k_pci_findDevice(const FM10K_PCI_DEVICES* devices, FM10K_PCI_MAPPED_DEVICE* map) {
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if(devices->count == 0){
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return 1;
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}
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int fm10k_pci_findDevice(const FM10K_PCI_DEVICES *devices, FM10K_PCI_MAPPED_DEVICE *map) {
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if (devices->count == 0) {
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return 1;
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}
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for(uint32_t i = 0; i < devices->count; ++i){
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if(fm10k_pci_mapDevice(&devices->devices[i], map) == 0){
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return 0;
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}
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}
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for (uint32_t i = 0; i < devices->count; ++i) {
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if (fm10k_pci_mapDevice(&devices->devices[i], map) == 0) {
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return 0;
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}
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}
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return 1;
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return 1;
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}
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FM10K_PCI_DEVICES fm10k_pci_findDevices() {
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DIR *folder;
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char fileName[PATH_MAX];
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FM10K_PCI_DEVICES devices;
|
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devices.count = 0;
|
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devices.count = 0;
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folder = opendir("/sys/bus/pci/devices");
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if (folder == NULL) {
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|
@ -600,16 +600,17 @@ FM10K_PCI_DEVICES fm10k_pci_findDevices() {
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size_t classBytesRead = getdelim(&classBytesBuffer, &classBytesLen, '\0',
|
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classBytesPointer);
|
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if (classBytesRead != -1) {
|
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unsigned int class = (unsigned int) strtoul(classBytesBuffer, NULL, 0);
|
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unsigned int class = (unsigned int) strtoul(classBytesBuffer, NULL, 0);
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if (class == 0x15a4 || class == 0x15d0 || class == 0x15d5) { //FM10000 devices
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sprintf(fileName, "/sys/bus/pci/devices/%s/resource4", entry->d_name);
|
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if (access(fileName, F_OK) == 0) {
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devices.devices[devices.count].vendor = vendor;
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devices.devices[devices.count].class = class;
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devices.devices[devices.count].vendor = vendor;
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devices.devices[devices.count].class = class;
|
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sprintf(devices.devices[devices.count].bar4Path, "/sys/bus/pci/devices/%s/resource4", entry->d_name);
|
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++devices.count;
|
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sprintf(devices.devices[devices.count].bar4Path, "/sys/bus/pci/devices/%s/resource4",
|
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entry->d_name);
|
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++devices.count;
|
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}
|
||||
}
|
||||
}
|
||||
|
|
88
src/fm10k.h
88
src/fm10k.h
|
@ -3,7 +3,7 @@
|
|||
* Creation Date: December 20, 2020
|
||||
*
|
||||
* Copyright (c) 2014 - 2015, Intel Corporation
|
||||
* Copyright (c) 2020, FM10K-Documentation Contributors
|
||||
* Copyright (c) 2021, FM10K-Documentation Contributors
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
|
@ -68,49 +68,49 @@
|
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#endif
|
||||
|
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typedef union {
|
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uint32_t value;
|
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struct {
|
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uint8_t LockTaken : 1; //Whether lock is currently taken by anyone
|
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uint8_t LockOwner : 2; //Who owns the lock. Switch API = 0, QV tools = 1, Board Manager = 2, RESERVED = 3
|
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uint32_t Reserved : 29;
|
||||
} __attribute__((packed)) fields;
|
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uint32_t value;
|
||||
struct {
|
||||
uint8_t LockTaken: 1; //Whether lock is currently taken by anyone
|
||||
uint8_t LockOwner: 2; //Who owns the lock. Switch API = 0, QV tools = 1, Board Manager = 2, RESERVED = 3
|
||||
uint32_t Reserved: 29;
|
||||
} __attribute__((packed)) fields;
|
||||
} API_SPI_LOCK_STATE;
|
||||
|
||||
typedef union {
|
||||
uint32_t value;
|
||||
struct {
|
||||
uint16_t Freq: 10; // Actual speed is PCIE_REFCLK/(2*(1+Freq))
|
||||
uint8_t Enable: 1;
|
||||
uint8_t Command: 4; // 0b00 = reset
|
||||
uint8_t HeaderSize: 2; // 0b00 = 4 bytes
|
||||
uint8_t DataSize: 2; // 0b00 = 4 bytes
|
||||
uint8_t DataShiftMethod: 2; // 0b00 = SINGLE, 0b01 = DUAL, 0b10 = QUAD, 0b11 = Reserved
|
||||
uint8_t Busy: 1; // volatile ReadOnly
|
||||
uint8_t Selected: 1; // volatile ReadOnly
|
||||
uint8_t DirIO2: 1; // 0b0 = Input, 0b1 = Output
|
||||
uint8_t DirIO3: 1; // 0b0 = Input, 0b1 = Output
|
||||
uint8_t PinIO2: 1; // volatile ReadWrite
|
||||
uint8_t PinIO3: 1; // volatile ReadWrite
|
||||
uint8_t Reserved: 5;
|
||||
} __attribute__((packed)) fields;
|
||||
uint32_t value;
|
||||
struct {
|
||||
uint16_t Freq: 10; // Actual speed is PCIE_REFCLK/(2*(1+Freq))
|
||||
uint8_t Enable: 1;
|
||||
uint8_t Command: 4; // 0b00 = reset
|
||||
uint8_t HeaderSize: 2; // 0b00 = 4 bytes
|
||||
uint8_t DataSize: 2; // 0b00 = 4 bytes
|
||||
uint8_t DataShiftMethod: 2; // 0b00 = SINGLE, 0b01 = DUAL, 0b10 = QUAD, 0b11 = Reserved
|
||||
uint8_t Busy: 1; // volatile ReadOnly
|
||||
uint8_t Selected: 1; // volatile ReadOnly
|
||||
uint8_t DirIO2: 1; // 0b0 = Input, 0b1 = Output
|
||||
uint8_t DirIO3: 1; // 0b0 = Input, 0b1 = Output
|
||||
uint8_t PinIO2: 1; // volatile ReadWrite
|
||||
uint8_t PinIO3: 1; // volatile ReadWrite
|
||||
uint8_t Reserved: 5;
|
||||
} __attribute__((packed)) fields;
|
||||
} SPI_CTRL;
|
||||
|
||||
typedef union {
|
||||
uint32_t value;
|
||||
struct {
|
||||
uint8_t manufacturerId: 8;
|
||||
uint8_t densityCode: 5;
|
||||
uint8_t familyCode: 3;
|
||||
uint8_t productVariant: 5;
|
||||
uint8_t subCode: 3;
|
||||
uint8_t Reserved: 8;
|
||||
} __attribute__((packed)) fields;
|
||||
uint32_t value;
|
||||
struct {
|
||||
uint8_t manufacturerId: 8;
|
||||
uint8_t densityCode: 5;
|
||||
uint8_t familyCode: 3;
|
||||
uint8_t productVariant: 5;
|
||||
uint8_t subCode: 3;
|
||||
uint8_t Reserved: 8;
|
||||
} __attribute__((packed)) fields;
|
||||
} SPI_COMMAND_READ_MANUFACTURER_RESULT;
|
||||
|
||||
typedef struct {
|
||||
SPI_COMMAND_READ_MANUFACTURER_RESULT data;
|
||||
char name[64];
|
||||
uint32_t sizeInMbit;
|
||||
SPI_COMMAND_READ_MANUFACTURER_RESULT data;
|
||||
char name[64];
|
||||
uint32_t sizeInMbit;
|
||||
} KNOWN_FLASH_DEVICE;
|
||||
|
||||
#if defined(__TINYC__)
|
||||
|
@ -163,14 +163,14 @@ uint32_t fm10k_mem_spi_WriteFlash(uintptr_t mem, uint32_t address, const uint8_t
|
|||
#define FM10K_PCI_DEVICE_MAX 16
|
||||
|
||||
typedef struct {
|
||||
uint16_t vendor;
|
||||
uint16_t class;
|
||||
char bar4Path[PATH_MAX];
|
||||
uint16_t vendor;
|
||||
uint16_t class;
|
||||
char bar4Path[PATH_MAX];
|
||||
} FM10K_PCI_DEVICE;
|
||||
|
||||
typedef struct {
|
||||
const FM10K_PCI_DEVICE* device;
|
||||
void* map;
|
||||
const FM10K_PCI_DEVICE *device;
|
||||
void *map;
|
||||
int fd;
|
||||
} FM10K_PCI_MAPPED_DEVICE;
|
||||
|
||||
|
@ -181,7 +181,9 @@ typedef struct {
|
|||
|
||||
FM10K_PCI_DEVICES fm10k_pci_findDevices();
|
||||
|
||||
int fm10k_pci_findDevice(const FM10K_PCI_DEVICES* devices, FM10K_PCI_MAPPED_DEVICE* map);
|
||||
int fm10k_pci_mapDevice(const FM10K_PCI_DEVICE* device, FM10K_PCI_MAPPED_DEVICE* map);
|
||||
int fm10k_pci_unmapDevice(FM10K_PCI_MAPPED_DEVICE* map);
|
||||
int fm10k_pci_findDevice(const FM10K_PCI_DEVICES *devices, FM10K_PCI_MAPPED_DEVICE *map);
|
||||
|
||||
int fm10k_pci_mapDevice(const FM10K_PCI_DEVICE *device, FM10K_PCI_MAPPED_DEVICE *map);
|
||||
|
||||
int fm10k_pci_unmapDevice(FM10K_PCI_MAPPED_DEVICE *map);
|
||||
|
||||
|
|
10
src/test.c
10
src/test.c
|
@ -5,7 +5,7 @@
|
|||
* Compile: make test-bin
|
||||
* Usage: ./test
|
||||
*
|
||||
* Copyright (c) 2020, FM10K-Documentation Contributors
|
||||
* Copyright (c) 2021, FM10K-Documentation Contributors
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
|
@ -41,15 +41,17 @@ int main(int argc, char **argv) {
|
|||
uint32_t testsFailed = 0;
|
||||
{
|
||||
SPI_CTRL s;
|
||||
TEST((uint32_t)sizeof(s.fields), (uint32_t)sizeof(s.value), "SPI_CTRL packed misalignment. size struct %u, size value %u");
|
||||
TEST((uint32_t) sizeof(s.fields), (uint32_t) sizeof(s.value), "SPI_CTRL packed misalignment. size struct %u, size value %u");
|
||||
}
|
||||
{
|
||||
SPI_COMMAND_READ_MANUFACTURER_RESULT s;
|
||||
TEST((uint32_t)sizeof(s.fields), (uint32_t)sizeof(s.value), "SPI_COMMAND_READ_MANUFACTURER_RESULT packed misalignment. size struct %u, size value %u");
|
||||
TEST((uint32_t) sizeof(s.fields), (uint32_t) sizeof(s.value),
|
||||
"SPI_COMMAND_READ_MANUFACTURER_RESULT packed misalignment. size struct %u, size value %u");
|
||||
}
|
||||
{
|
||||
API_SPI_LOCK_STATE s;
|
||||
TEST((uint32_t)sizeof(s.fields), (uint32_t)sizeof(s.value), "API_SPI_LOCK_STATE packed misalignment. size struct %u, size value %u");
|
||||
TEST((uint32_t) sizeof(s.fields), (uint32_t) sizeof(s.value),
|
||||
"API_SPI_LOCK_STATE packed misalignment. size struct %u, size value %u");
|
||||
}
|
||||
|
||||
printf("\nTests run, failed %u/%u\n", testsFailed, tests);
|
||||
|
|
Loading…
Reference in a new issue