/***************************************************************************** * File: fm10k.h * Creation Date: December 20, 2020 * * Copyright (c) 2014 - 2015, Intel Corporation * Copyright (c) 2020, FM10K-Documentation Contributors * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: * * * Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of the copyright holders nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *****************************************************************************/ #pragma once #include #include #include #define FM10K_BAR4_SIZE 0x0000000004000000 #define FM10K_BAR4_OFFSET 0 //From Datasheet, 11.25.1 MGMT Map, Table 11-37 #define FM10K_REGISTER_BASE 0 #define FM10K_REGISTER_SPI_TX_DATA ((0xC26) + (FM10K_REGISTER_BASE)) #define FM10K_REGISTER_SPI_RX_DATA ((0xC27) + (FM10K_REGISTER_BASE)) #define FM10K_REGISTER_SPI_HEADER ((0xC28) + (FM10K_REGISTER_BASE)) #define FM10K_REGISTER_SPI_CTRL ((0xC29) + (FM10K_REGISTER_BASE)) #define FM10K_SPI_FREQ_KHZ 50000 #define FM10K_SPI_HEADER_COMMAND_PAGE_PROGRAM 0x02 #define FM10K_SPI_HEADER_COMMAND_READ_BYTES 0x03 #define FM10K_SPI_HEADER_COMMAND_READ_MODIFY_WRITE_512 0x58 #define FM10K_SPI_HEADER_COMMAND_READ_MANUFACTURER_INFORMATION 0x9F /* Test for GCC >= 4.4.0, see https://gcc.gnu.org/gcc-4.4/changes.html : Packed bit-fields of type char were not properly bit-packed on many targets prior to GCC 4.4 */ #if __GNUC__ > 4 || (__GNUC__ == 4 && (__GNUC_MINOR__ >= 4)) || __clang__ || __TINYC__ typedef union { uint32_t value; struct { uint16_t Freq: 10; // Actual speed is PCIE_REFCLK/(2*(1+Freq)) uint8_t Enable: 1; uint8_t Command: 4; // 0b00 = reset uint8_t HeaderSize: 2; // 0b00 = 4 bytes uint8_t DataSize: 2; // 0b00 = 4 bytes uint8_t DataShiftMethod: 2; // 0b00 = SINGLE, 0b01 = DUAL, 0b10 = QUAD, 0b11 = Reserved uint8_t Busy: 1; // volatile ReadOnly uint8_t Selected: 1; // volatile ReadOnly uint8_t DirIO2: 1; // 0b0 = Input, 0b1 = Output uint8_t DirIO3: 1; // 0b0 = Input, 0b1 = Output uint8_t PinIO2: 1; // volatile ReadWrite uint8_t PinIO3: 1; // volatile ReadWrite uint8_t Reserved: 5; } __attribute__((packed)) fields; } SPI_CTRL; typedef union { uint32_t value; struct { uint8_t manufacturerId: 8; uint8_t densityCode: 5; uint8_t familyCode: 3; uint8_t productVariant: 5; uint8_t subCode: 3; uint8_t RESERVED: 8; } __attribute__((packed)) fields; } SPI_COMMAND_READ_MANUFACTURER_RESULT; typedef struct { SPI_COMMAND_READ_MANUFACTURER_RESULT data; char name[64]; uint32_t sizeInMbit; } KNOWN_FLASH_DEVICE; #else #error "Packed bit-fields of type char were not properly bit-packed on many targets prior to GCC 4.4, upgrade to GCC >= 4.4." #endif void ReadRegister32(uintptr_t mem, uint32_t addr, uint32_t *value); void WriteRegister32(uintptr_t mem, uint32_t addr, uint32_t value); uint32_t get_interval_diff(struct timeval *begin, struct timeval *end); uint32_t fm10k_mem_spi_SetCtrlReg(uintptr_t mem, SPI_CTRL value); void fm10k_mem_spi_Enable(uintptr_t mem); void fm10k_mem_spi_Disable(uintptr_t mem); //Error if result.value is 0x00 SPI_COMMAND_READ_MANUFACTURER_RESULT fm10k_mem_spi_ReadManufacturerData(uintptr_t mem); const KNOWN_FLASH_DEVICE *getKnownFlashFromManufacturerData(SPI_COMMAND_READ_MANUFACTURER_RESULT data); uint32_t fm10k_mem_spi_EnableSectorProtection(uintptr_t mem); uint32_t fm10k_mem_spi_DisableSectorProtection(uintptr_t mem); uint32_t fm10k_mem_spi_ReadFlash(uintptr_t mem, uint32_t address, uint8_t *data, uint32_t len); uint32_t fm10k_mem_spi_WriteFlash(uintptr_t mem, uint32_t address, const uint8_t *data, uint32_t len); typedef struct { uint16_t vendor; uint16_t class; char bar4Path[PATH_MAX]; } FM10K_PCI_DEVICE; FM10K_PCI_DEVICE fm10k_pci_findDevice();