diff --git a/.drone.yml b/.drone.yml index 2892a58..9b3303b 100644 --- a/.drone.yml +++ b/.drone.yml @@ -13,5 +13,6 @@ steps: commands: - apt update - DEBIAN_FRONTEND=noninteractive apt install -y clang cmake + - ./build-ies.sh - ./build.sh ... \ No newline at end of file diff --git a/.gitmodules b/.gitmodules new file mode 100644 index 0000000..8a851f8 --- /dev/null +++ b/.gitmodules @@ -0,0 +1,3 @@ +[submodule "deps/IES"] + path = deps/IES + url = https://git.gammaspectra.live/Sillycom/IES diff --git a/CMakeLists.txt b/CMakeLists.txt index 8ce3335..63867ff 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -3,7 +3,29 @@ project(fsm) set(CMAKE_CXX_STANDARD 14) -include_directories(${fsm_SOURCE_DIR}/src) +set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -D_FM_ARCH_64 -DFM_SUPPORT_FM10000 -D_GNU_SOURCE") +set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -D_FM_ARCH_64 -DFM_SUPPORT_FM10000 -D_GNU_SOURCE") +set(CMAKE_LD_FLAGS "${CMAKE_LD_FLAGS} -Wl,--no-as-needed") -add_executable(fsmd src/fsmd.cpp src/device/PCIEDevice.cpp src/fm10k/FM10K.cpp src/fm10k/Functions.cpp) +include_directories(src) + +include_directories(deps/IES/build/include) +include_directories(deps/IES/build/include/alos) +include_directories(deps/IES/build/include/alos/linux) +include_directories(deps/IES/build/include/std/intel) +include_directories(deps/IES/build/include/common) +include_directories(deps/IES/build/include/platforms) +include_directories(deps/IES/build/include/platforms/libertyTrail) + +find_library(libFocalpointSDK NAMES FocalpointSDK PATHS ${PROJECT_SOURCE_DIR}/deps/IES/build/lib NO_DEFAULT_PATH REQUIRED) +find_library(libLTStdPlatform NAMES LTStdPlatform PATHS ${PROJECT_SOURCE_DIR}/deps/IES/build/lib NO_DEFAULT_PATH REQUIRED) + +add_library(libFocalPointSDK SHARED IMPORTED) +add_library(libLTStdPlatform SHARED IMPORTED) +set_target_properties(libFocalPointSDK PROPERTIES IMPORTED_LOCATION deps/IES/build/lib/libFocalpointSDK.la) +set_target_properties(libLTStdPlatform PROPERTIES IMPORTED_LOCATION deps/IES/build/lib/libLTStdPlatform.la) + +add_executable(fsmd src/fsmd.cpp src/device/PCIEDevice.cpp src/fm10k/FM10K.cpp src/fm10k/Functions.cpp src/fm10k/Port.cpp src/fm10k/IES.cpp) add_executable(fsm src/fsm.cpp) + +target_link_libraries(fsmd ${libFocalpointSDK} ${libLTStdPlatform} dl) \ No newline at end of file diff --git a/build-ies.sh b/build-ies.sh new file mode 100755 index 0000000..9d5f325 --- /dev/null +++ b/build-ies.sh @@ -0,0 +1,18 @@ +#!/bin/bash +set -ex + +pushd "${0%/*}" + +pushd deps/IES +if [[ -d "build" ]]; then + rm -r build +fi +mkdir build +export CC=clang +export CXX=clang++ +export CFLAGS="-ggdb -O1" +export CXXFLAGS="-ggdb -O1" +./autogen.sh +./configure --enable-static --enable-shared --prefix "$(pwd)/build" +make -j$(nproc) +make install \ No newline at end of file diff --git a/build.sh b/build.sh index 431804a..eb260db 100755 --- a/build.sh +++ b/build.sh @@ -2,13 +2,15 @@ set -ex pushd "${0%/*}" -rm -rvf build +if [[ -d "build" ]]; then + rm -r build +fi mkdir build pushd build export CC=clang export CXX=clang++ -export CFLAGS="-ggdb -O0 -march=x86-64 -mtune=generic" -export CXXFLAGS="-ggdb -O0 -march=x86-64 -mtune=generic" +export CFLAGS="-ggdb -O0" +export CXXFLAGS="-ggdb -O0" cmake .. make -j$(nproc) \ No newline at end of file diff --git a/deps/IES b/deps/IES new file mode 160000 index 0000000..5fa6e3b --- /dev/null +++ b/deps/IES @@ -0,0 +1 @@ +Subproject commit 5fa6e3b8bff15be7edea55eea8bee7c17d28b5ca diff --git a/src/device/PCIEDevice.h b/src/device/PCIEDevice.h index 8a11d90..a4b8cd7 100644 --- a/src/device/PCIEDevice.h +++ b/src/device/PCIEDevice.h @@ -54,6 +54,15 @@ public: static std::vector find(); + std::string getDevicePath() const{ + auto found = m_path.find_last_of('/'); + if(found != std::string::npos){ + return m_path.substr(0, found); + } + + return {}; + } + const auto& getPath() const{ return m_path; } diff --git a/src/fm10k/FM10K.h b/src/fm10k/FM10K.h index 1fddb06..f3a1f51 100644 --- a/src/fm10k/FM10K.h +++ b/src/fm10k/FM10K.h @@ -5,9 +5,11 @@ #include #include #include +#include #include "device/Device.h" #include "registers/MGMT.h" #include "Constants.h" +#include "Port.h" #define FM10K_GET_REGISTER(i, t) i.getType(t::ADDRESS) #define FM10K_MAP_REGISTER(i, t) i.mapType(t::ADDRESS) @@ -100,18 +102,29 @@ namespace FM10K{ const HardwareInformation& getHardwareInformation() const; std::string getHardwareInformationString() const; - static void wait(uint32_t microseconds) ; - static void wait_ns(uint32_t nanoseconds) ; + static void wait(uint32_t microseconds); + static void wait_ns(uint32_t nanoseconds); + + Port& addPort(uint32_t logicalPort, uint32_t physicalPort){ + m_ports.emplace_back(m_ports.size(), logicalPort, physicalPort); + return m_ports.back(); + } + + Port* getPort(uint32_t portIndex){ + return portIndex < m_ports.size() ? &m_ports.back() : nullptr; + } bool initializationSequence() const; bool isPEPEnabled(uint8_t pep) const; - + protected: private: std::unique_ptr m_device; HardwareInformation m_hwInfo{}; + std::vector m_ports; + void* m_ies = nullptr; }; } diff --git a/src/fm10k/IES.cpp b/src/fm10k/IES.cpp new file mode 100644 index 0000000..5a42db2 --- /dev/null +++ b/src/fm10k/IES.cpp @@ -0,0 +1,187 @@ +#include "IES.h" + +#include + +#include "IES_SDK.h" + +#include "IES_CONFIGURATIONS.h" + +namespace FM10K{ + namespace IES_Static{ + static bool IES_INITIALIZED = false; + + static fm_semaphore semaphore; + + static fm_int sw = 0; + + using TlvType = FM10K::IES::TlvType; + } +} + +std::unique_ptr FM10K::IES::instance = nullptr; + +bool FM10K::IES::init() { + if(IES_Static::IES_INITIALIZED){ + return true; + } + + /*if(fmOSInitialize() != FM_OK){ + std::abort(); + } + + if(fmSetLoggingType(FM_LOG_TYPE_CONSOLE, 0, nullptr) != FM_OK){ + std::abort(); + }*/ + + fmCreateSemaphore("seq", FM_SEM_BINARY, &IES_Static::semaphore, 0); + + if(fmInitialize(eventHandler) != FM_OK){ + std::abort(); + } + + + fm_timestamp wait = {3, 0}; + fmCaptureSemaphore(&IES_Static::semaphore, &wait); + + if(fmSetSwitchState(IES_Static::sw, true) != FM_OK){ + std::abort(); + } + + IES_Static::IES_INITIALIZED = true; + + return true; +} + +void FM10K::IES::eventHandler(int event, int sw, void *ptr) { + if(!instance){ + return; + } + + switch (event) { + case FM_EVENT_SWITCH_INSERTED: + getInstance().handleSwitchInsertedEvent(sw); + break; + + case FM_EVENT_PORT: + if(ptr){ + getInstance().handlePortEvent(sw, *static_cast(ptr)); + } + break; + + case FM_EVENT_PKT_RECV: + printf("packet received\n"); + break; + } +} + +FM10K::IES &FM10K::IES::getInstance() { + if(!instance){ + instance = std::unique_ptr(new IES()); + } + return *instance; +} + +void FM10K::IES::handleSwitchInsertedEvent(int sw) { + + printf("Switch #%d inserted!\n", sw); + if (sw == IES_Static::sw){ + fmReleaseSemaphore(&IES_Static::semaphore); + } +} + +void FM10K::IES::handlePortEvent(int sw, _fm_eventPort& portEvent) { + printf("port event: port %d is %s\n", portEvent.port, (portEvent.linkStatus ? "up" : "down")); +} + +bool FM10K::IES::replaceConfigEntry(const std::string &key, FM10K::IES::TlvType type, const std::string &value) { + if(m_initialized){ + return false; + } + + if(type == TlvType::Null){ + m_configuration.erase(key); + }else{ + m_configuration[key] = {type, value}; + } + + return true; +} + +bool FM10K::IES::addConfigEntry(const std::string &key, FM10K::IES::TlvType type, const std::string &value) { + if(m_initialized){ + return false; + } + if(m_configuration.find(key) != m_configuration.end()){ + return false; + } + + m_configuration[key] = {type, value}; + return true; +} + +bool FM10K::IES::addConfigEntry(const std::string &key, const std::string &value) { + return addConfigEntry(key, TlvType::Text, value); +} + +bool FM10K::IES::addConfigEntry(const std::string &key, int32_t value) { + return addConfigEntry(key, TlvType::Integer, std::to_string(value)); +} + +bool FM10K::IES::addConfigEntry(const std::string &key, uint32_t value) { + return addConfigEntry(key, TlvType::UnsignedInteger, std::to_string(value)); +} + +bool FM10K::IES::addConfigEntry(const std::string &key, uint64_t value) { + return addConfigEntry(key, TlvType::UnsignedInteger64, std::to_string(value)); +} + +bool FM10K::IES::addConfigEntry(const std::string &key, bool value) { + return addConfigEntry(key, TlvType::Boolean, value ? "true" : "false"); +} + +std::string FM10K::IES::getPlatformConfiguration() const { + std::string output; + output.reserve(1024 * 8); //Reserve 8 KiB by default + output += "# Autogenerated file. Do not edit, changes WILL NOT be preserved.\n\n"; + + for(auto& it : m_configuration){ + output += it.first; + output += " "; + switch (it.second.first) { + case TlvType::Text: + output += "text"; + break; + case TlvType::Integer: + case TlvType::UnsignedInteger: + case TlvType::UnsignedInteger64: + output += "int"; + break; + case TlvType::Boolean: + output += "bool"; + break; + case TlvType::Null: + break; + } + output += " "; + output += it.second.second; + output += "\n"; + } + + return output; +} + +bool FM10K::IES::loadKnownConfiguration(const std::string &key) { + if(IES_Static::knownConfigurations.find(key) == IES_Static::knownConfigurations.end()){ + return false; + } + + for(auto& it : IES_Static::knownConfigurations.at(key)){ + if(!addConfigEntry(it.first, it.second.first, it.second.second)){ + return false; + } + } + + return true; +} + +FM10K::IES::IES() = default; diff --git a/src/fm10k/IES.h b/src/fm10k/IES.h new file mode 100644 index 0000000..4d37e48 --- /dev/null +++ b/src/fm10k/IES.h @@ -0,0 +1,60 @@ +#pragma once + + +#include +#include + +struct _fm_eventPort; + + +namespace FM10K { + + class IES { + public: + static IES& getInstance(); + + bool isInitialized() const{ + return m_initialized; + } + + enum class TlvType{ + Text, + Integer, + UnsignedInteger, + UnsignedInteger64, + Boolean, + Null + }; + + bool addConfigEntry(const std::string& key, const std::string& value); + bool addConfigEntry(const std::string& key, int32_t value); + bool addConfigEntry(const std::string& key, uint32_t value); + bool addConfigEntry(const std::string& key, uint64_t value); + bool addConfigEntry(const std::string& key, bool value); + + bool addConfigEntry(const std::string& key, TlvType type, const std::string& value); + + bool replaceConfigEntry(const std::string& key, TlvType type, const std::string& value); + + bool loadKnownConfiguration(const std::string& key); + + std::string getPlatformConfiguration() const; + + private: + IES(); + + std::map> m_configuration{}; + bool m_initialized = false; + + + static std::unique_ptr instance; + static bool init(); + + void handleSwitchInsertedEvent(int sw); + void handlePortEvent(int sw, struct _fm_eventPort&); + + static void eventHandler(int event, int sw, void *ptr); + }; +} + + diff --git a/src/fm10k/IES_CONFIGURATIONS.h b/src/fm10k/IES_CONFIGURATIONS.h new file mode 100644 index 0000000..f64dae9 --- /dev/null +++ b/src/fm10k/IES_CONFIGURATIONS.h @@ -0,0 +1,318 @@ + + +#include "IES.h" + +#include + +#include "IES_SDK.h" + +#define SPEED_100G "100000" +#define SPEED_50G "50000" +#define SPEED_40G "40000" +#define SPEED_25G "25000" +#define SPEED_10G "10000" + +namespace FM10K { + namespace IES_Static { + using TlvType = FM10K::IES::TlvType; + static std::unordered_map>> knownConfigurations = { + {"FM10840_B0_AUTO_100G", { + {"api.platform.config.numSwitches", {TlvType::Integer, "1"}}, + + {"api.platform.config.platformName", {TlvType::Text, "rrc_2x100gm"}}, + + + {"api.platform.config.switch.0.switchNumber", {TlvType::Integer, "0"}}, + + {"api.platform.config.switch.0.uioDevName", {TlvType::Text, "/dev/uio0"}}, //TODO: delete this if not in use + + {"api.platform.config.switch.0.resource4DevName", {TlvType::Text, ""}}, //TODO: delete this if not in use + + + {"api.platform.config.switch.0.msiEnabled", {TlvType::Boolean, "true"}}, + + + {"api.platform.config.switch.0.ledPollPeriodMsec", {TlvType::Integer, "200"}}, + {"api.platform.config.switch.0.ledBlinkMode", {TlvType::Text, "HW_ASSISTED"}}, + + {"api.platform.config.switch.0.i2cClkDivider", {TlvType::Integer, "52"}}, + {"api.platform.config.switch.0.i2cResetGpio", {TlvType::Integer, "5"}}, + + + {"api.platform.config.switch.0.xcvrPollPeriodMsec", {TlvType::Integer, "1000"}}, + + + {"api.platform.config.switch.0.numPorts", {TlvType::Integer, "7"}}, + + + {"api.platform.config.switch.0.cpuPort", {TlvType::Integer, "6"}}, + {"api.platform.config.switch.0.bootCfg.mgmtPep", {TlvType::Integer, "6"}}, + {"api.platform.config.switch.0.bootCfg.pep.0.mode", {TlvType::Boolean, "0"}}, + {"api.platform.config.switch.0.bootCfg.pep.2.mode", {TlvType::Boolean, "0"}}, + {"api.platform.config.switch.0.bootCfg.pep.4.mode", {TlvType::Boolean, "0"}}, + {"api.platform.config.switch.0.bootCfg.pep.6.mode", {TlvType::Boolean, "0"}}, + + {"api.platform.config.switch.0.bootCfg.pep.0.enable", {TlvType::Boolean, "1"}}, + {"api.platform.config.switch.0.bootCfg.pep.2.enable", {TlvType::Boolean, "1"}}, + {"api.platform.config.switch.0.bootCfg.pep.4.enable", {TlvType::Boolean, "1"}}, + {"api.platform.config.switch.0.bootCfg.pep.6.enable", {TlvType::Boolean, "1"}}, + {"api.platform.config.switch.0.bootCfg.pep.8.enable", {TlvType::Boolean, "0"}}, + + {"api.platform.config.switch.0.bootCfg.pep.6.bar4Allowed", {TlvType::Boolean, "1"}}, + + + {"api.platform.config.switch.0.portIndex.0.portMapping", {TlvType::Text, "\"LOG = 0 PCIE=8\""}}, + + + {"api.platform.config.switch.0.portIndex.1.lane.0.portMapping", + {TlvType::Text, "\"LOG=1 EPL=1 LANE=0\""}}, + {"api.platform.config.switch.0.portIndex.1.lane.1.portMapping", + {TlvType::Text, "\"LOG=1 EPL=1 LANE=1\""}}, + {"api.platform.config.switch.0.portIndex.1.lane.2.portMapping", + {TlvType::Text, "\"LOG=1 EPL=1 LANE=2\""}}, + {"api.platform.config.switch.0.portIndex.1.lane.3.portMapping", + {TlvType::Text, "\"LOG=1 EPL=1 LANE=3\""}}, + + + {"api.platform.config.switch.0.portIndex.2.lane.0.portMapping", + {TlvType::Text, "\"LOG=2 EPL=7 LANE=0\""}}, + {"api.platform.config.switch.0.portIndex.2.lane.1.portMapping", + {TlvType::Text, "\"LOG=2 EPL=7 LANE=1\""}}, + {"api.platform.config.switch.0.portIndex.2.lane.2.portMapping", + {TlvType::Text, "\"LOG=2 EPL=7 LANE=2\""}}, + {"api.platform.config.switch.0.portIndex.2.lane.3.portMapping", + {TlvType::Text, "\"LOG=2 EPL=7 LANE=3\""}}, + + + {"api.platform.config.switch.0.portIndex.3.portMapping", {TlvType::Text, "\"LOG=3 PCIE=0\""}}, + {"api.platform.config.switch.0.portIndex.4.portMapping", {TlvType::Text, "\"LOG=4 PCIE=2\""}}, + {"api.platform.config.switch.0.portIndex.5.portMapping", {TlvType::Text, "\"LOG=5 PCIE=4\""}}, + {"api.platform.config.switch.0.portIndex.6.portMapping", {TlvType::Text, "\"LOG=6 PCIE=6\""}}, + + + {"api.platform.config.switch.0.port.default.interfaceType", {TlvType::Text, "NONE"}}, + + {"api.platform.config.switch.0.portIndex.1.interfaceType", {TlvType::Text, "QSFP_LANE0"}}, + {"api.platform.config.switch.0.portIndex.2.interfaceType", {TlvType::Text, "QSFP_LANE0"}}, + + + {"api.platform.config.switch.0.portIndex.1.speed", {TlvType::Integer, SPEED_100G}}, + + {"api.platform.config.switch.0.portIndex.2.speed", {TlvType::Integer, SPEED_100G}}, + + {"api.platform.config.switch.0.portIndex.3.speed", {TlvType::Integer, SPEED_50G}}, + {"api.platform.config.switch.0.portIndex.4.speed", {TlvType::Integer, SPEED_50G}}, + {"api.platform.config.switch.0.portIndex.5.speed", {TlvType::Integer, SPEED_50G}}, + {"api.platform.config.switch.0.portIndex.6.speed", {TlvType::Integer, SPEED_50G}}, + + + {"api.platform.config.switch.0.port.default.ethernetMode", {TlvType::Text, "DISABLED"}}, + + + {"api.platform.config.switch.0.portIndex.1.ethernetMode", {TlvType::Text, "AUTODETECT"}}, + {"api.platform.config.switch.0.portIndex.2.ethernetMode", {TlvType::Text, "AUTODETECT"}}, + + + {"api.platform.config.switch.0.port.default.capability", {TlvType::Text, "NONE"}}, + + + {"api.platform.config.switch.0.portIndex.1.capability", + {TlvType::Text, "LAG,ROUTE,10G,25G,40G,100G,SW_LED"}}, + {"api.platform.config.switch.0.portIndex.2.capability", + {TlvType::Text, "LAG,ROUTE,10G,25G,40G,100G,SW_LED"}}, + + + {"api.platform.config.switch.0.port.default.lanePolarity", {TlvType::Text, "INVERT_NONE"}}, + + + {"api.platform.config.switch.0.port.default.preCursorCopper", {TlvType::Integer, "0"}}, + + + {"api.platform.config.switch.0.sharedLibraryName", {TlvType::Text, "libLTStdPlatform.so"}}, + + + {"api.platform.config.switch.0.sharedLibrary.disable", + {TlvType::Text, "GetPortIntrPending,EnablePortIntr"}}, + + + {"api.platform.lib.config.bus0.i2cDevName", {TlvType::Text, "switchI2C"}}, + + + {"api.platform.lib.config.pcaMux.0.model", {TlvType::Text, "PCA9545"}}, + {"api.platform.lib.config.pcaMux.0.addr", {TlvType::Integer, "0x58"}}, + {"api.platform.lib.config.pcaMux.0.bus", {TlvType::Integer, "0"}}, + + + {"api.platform.lib.config.pcaIo.count", {TlvType::Integer, "6"}}, + + + {"api.platform.lib.config.pcaIo.0.model", {TlvType::Text, "PCA9538"}}, + {"api.platform.lib.config.pcaIo.0.bus", {TlvType::Integer, "0"}}, + {"api.platform.lib.config.pcaIo.0.addr", {TlvType::Integer, "0x60"}}, + + {"api.platform.lib.config.pcaIo.1.model", {TlvType::Text, "PCA9538"}}, + {"api.platform.lib.config.pcaIo.1.bus", {TlvType::Integer, "0"}}, + {"api.platform.lib.config.pcaIo.1.addr", {TlvType::Integer, "0x61"}}, + + {"api.platform.lib.config.pcaIo.2.model", {TlvType::Text, "PCA9538"}}, + {"api.platform.lib.config.pcaIo.2.bus", {TlvType::Integer, "0"}}, + {"api.platform.lib.config.pcaIo.2.addr", {TlvType::Integer, "0x62"}}, + + {"api.platform.lib.config.pcaIo.3.model", {TlvType::Text, "PCA9538"}}, + {"api.platform.lib.config.pcaIo.3.bus", {TlvType::Integer, "0"}}, + {"api.platform.lib.config.pcaIo.3.addr", {TlvType::Integer, "0x64"}}, + + {"api.platform.lib.config.pcaIo.4.model", {TlvType::Text, "PCA9538"}}, + {"api.platform.lib.config.pcaIo.4.bus", {TlvType::Integer, "0"}}, + {"api.platform.lib.config.pcaIo.4.addr", {TlvType::Integer, "0x65"}}, + + {"api.platform.lib.config.pcaIo.5.model", {TlvType::Text, "PCA9538"}}, + {"api.platform.lib.config.pcaIo.5.bus", {TlvType::Integer, "0"}}, + {"api.platform.lib.config.pcaIo.5.addr", {TlvType::Integer, "0x66"}}, + + + {"api.platform.lib.config.xcvrState.default.modPrsL.pin", {TlvType::Integer, "2"}}, + {"api.platform.lib.config.xcvrState.default.intL.pin", {TlvType::Integer, "1"}}, + {"api.platform.lib.config.xcvrState.default.resetL.pin", {TlvType::Integer, "3"}}, + {"api.platform.lib.config.xcvrState.default.lpMode.pin", {TlvType::Integer, "0"}}, + + + {"api.platform.config.switch.0.portIndex.1.hwResourceId", {TlvType::Integer, "0"}}, + {"api.platform.config.switch.0.portIndex.2.hwResourceId", {TlvType::Integer, "1"}}, + + + {"api.platform.lib.config.hwResourceId.0.interfaceType", {TlvType::Text, "QSFP"}}, + {"api.platform.lib.config.hwResourceId.0.xcvrI2C.busSelType", {TlvType::Text, "PCAMUX"}}, + + {"api.platform.lib.config.hwResourceId.0.xcvrI2C.pcaMux.index", {TlvType::Integer, "0"}}, + {"api.platform.lib.config.hwResourceId.0.xcvrI2C.pcaMux.value", {TlvType::Integer, "1"}}, + + {"api.platform.lib.config.hwResourceId.0.xcvrState.pcaIo.index", {TlvType::Integer, "0"}}, + {"api.platform.lib.config.hwResourceId.0.xcvrState.pcaIo.basePin", {TlvType::Integer, "0"}}, + + {"api.platform.lib.config.hwResourceId.0.xcvrState.pcaIo.modPrsL.pin", {TlvType::Integer, "0"}}, + {"api.platform.lib.config.hwResourceId.0.xcvrState.pcaIo.intL.pin", {TlvType::Integer, "1"}}, + {"api.platform.lib.config.hwResourceId.0.xcvrState.pcaIo.resetL.pin", {TlvType::Integer, "4"}}, + {"api.platform.lib.config.hwResourceId.0.xcvrState.pcaIo.lpMode.pin", {TlvType::Integer, "5"}}, + + {"api.platform.lib.config.hwResourceId.0.portLed.0.type", {TlvType::Text, "PCA"}}, + {"api.platform.lib.config.hwResourceId.0.portLed.0.pcaIo.index", {TlvType::Integer, "2"}}, + {"api.platform.lib.config.hwResourceId.0.portLed.0.0.pcaIo.pin", {TlvType::Integer, "0"}}, + {"api.platform.lib.config.hwResourceId.0.portLed.0.0.pcaIo.usage", {TlvType::Text, "LINK,10G"}}, + {"api.platform.lib.config.hwResourceId.0.portLed.0.1.pcaIo.pin", {TlvType::Integer, "1"}}, + {"api.platform.lib.config.hwResourceId.0.portLed.0.1.pcaIo.usage", {TlvType::Text, "LINK,40G"}}, + {"api.platform.lib.config.hwResourceId.0.portLed.0.2.pcaIo.pin", {TlvType::Integer, "2"}}, + {"api.platform.lib.config.hwResourceId.0.portLed.0.2.pcaIo.usage", {TlvType::Text, "LINK,25G"}}, + {"api.platform.lib.config.hwResourceId.0.portLed.0.3.pcaIo.pin", {TlvType::Integer, "3"}}, + {"api.platform.lib.config.hwResourceId.0.portLed.0.3.pcaIo.usage", + {TlvType::Text, "LINK,100G"}}, + + {"api.platform.lib.config.hwResourceId.0.portLed.1.type", {TlvType::Text, "PCA"}}, + {"api.platform.lib.config.hwResourceId.0.portLed.1.pcaIo.index", {TlvType::Integer, "2"}}, + {"api.platform.lib.config.hwResourceId.0.portLed.1.0.pcaIo.pin", {TlvType::Integer, "4"}}, + {"api.platform.lib.config.hwResourceId.0.portLed.1.0.pcaIo.usage", {TlvType::Text, "LINK,10G"}}, + {"api.platform.lib.config.hwResourceId.0.portLed.1.1.pcaIo.pin", {TlvType::Integer, "5"}}, + {"api.platform.lib.config.hwResourceId.0.portLed.1.1.pcaIo.usage", {TlvType::Text, "LINK,25G"}}, + + {"api.platform.lib.config.hwResourceId.0.portLed.2.type", {TlvType::Text, "PCA"}}, + {"api.platform.lib.config.hwResourceId.0.portLed.2.pcaIo.index", {TlvType::Integer, "2"}}, + {"api.platform.lib.config.hwResourceId.0.portLed.2.0.pcaIo.pin", {TlvType::Integer, "6"}}, + {"api.platform.lib.config.hwResourceId.0.portLed.2.0.pcaIo.usage", {TlvType::Text, "LINK,10G"}}, + {"api.platform.lib.config.hwResourceId.0.portLed.2.1.pcaIo.pin", {TlvType::Integer, "7"}}, + {"api.platform.lib.config.hwResourceId.0.portLed.2.1.pcaIo.usage", {TlvType::Text, "LINK,25G"}}, + + {"api.platform.lib.config.hwResourceId.0.portLed.3.type", {TlvType::Text, "PCA"}}, + {"api.platform.lib.config.hwResourceId.0.portLed.3.pcaIo.index", {TlvType::Integer, "4"}}, + {"api.platform.lib.config.hwResourceId.0.portLed.3.0.pcaIo.pin", {TlvType::Integer, "0"}}, + {"api.platform.lib.config.hwResourceId.0.portLed.3.0.pcaIo.usage", {TlvType::Text, "LINK,10G"}}, + {"api.platform.lib.config.hwResourceId.0.portLed.3.1.pcaIo.pin", {TlvType::Integer, "1"}}, + {"api.platform.lib.config.hwResourceId.0.portLed.3.1.pcaIo.usage", {TlvType::Text, "LINK,25G"}}, + + + {"api.platform.lib.config.hwResourceId.1.interfaceType", {TlvType::Text, "QSFP"}}, + {"api.platform.lib.config.hwResourceId.1.xcvrI2C.busSelType", {TlvType::Text, "PCAMUX"}}, + + {"api.platform.lib.config.hwResourceId.1.xcvrI2C.pcaMux.index", {TlvType::Integer, "0"}}, + {"api.platform.lib.config.hwResourceId.1.xcvrI2C.pcaMux.value", {TlvType::Integer, "2"}}, + + {"api.platform.lib.config.hwResourceId.1.xcvrState.pcaIo.index", {TlvType::Integer, "1"}}, + {"api.platform.lib.config.hwResourceId.1.xcvrState.pcaIo.basePin", {TlvType::Integer, "0"}}, + + {"api.platform.lib.config.hwResourceId.1.xcvrState.pcaIo.modPrsL.pin", {TlvType::Integer, "0"}}, + {"api.platform.lib.config.hwResourceId.1.xcvrState.pcaIo.intL.pin", {TlvType::Integer, "1"}}, + {"api.platform.lib.config.hwResourceId.1.xcvrState.pcaIo.resetL.pin", {TlvType::Integer, "4"}}, + {"api.platform.lib.config.hwResourceId.1.xcvrState.pcaIo.lpMode.pin", {TlvType::Integer, "5"}}, + + {"api.platform.lib.config.hwResourceId.1.portLed.0.type", {TlvType::Text, "PCA"}}, + {"api.platform.lib.config.hwResourceId.1.portLed.0.pcaIo.index", {TlvType::Integer, "5"}}, + {"api.platform.lib.config.hwResourceId.1.portLed.0.0.pcaIo.pin", {TlvType::Integer, "0"}}, + {"api.platform.lib.config.hwResourceId.1.portLed.0.0.pcaIo.usage", {TlvType::Text, "LINK,10G"}}, + {"api.platform.lib.config.hwResourceId.1.portLed.0.1.pcaIo.pin", {TlvType::Integer, "1"}}, + {"api.platform.lib.config.hwResourceId.1.portLed.0.1.pcaIo.usage", {TlvType::Text, "LINK,40G"}}, + {"api.platform.lib.config.hwResourceId.1.portLed.0.2.pcaIo.pin", {TlvType::Integer, "2"}}, + {"api.platform.lib.config.hwResourceId.1.portLed.0.2.pcaIo.usage", {TlvType::Text, "LINK,25G"}}, + {"api.platform.lib.config.hwResourceId.1.portLed.0.3.pcaIo.pin", {TlvType::Integer, "3"}}, + {"api.platform.lib.config.hwResourceId.1.portLed.0.3.pcaIo.usage", {TlvType::Text, "LINK,100G"}}, + + {"api.platform.lib.config.hwResourceId.1.portLed.1.type", {TlvType::Text, "PCA"}}, + {"api.platform.lib.config.hwResourceId.1.portLed.1.pcaIo.index", {TlvType::Integer, "5"}}, + {"api.platform.lib.config.hwResourceId.1.portLed.1.0.pcaIo.pin", {TlvType::Integer, "4"}}, + {"api.platform.lib.config.hwResourceId.1.portLed.1.0.pcaIo.usage", {TlvType::Text, "LINK,10G"}}, + {"api.platform.lib.config.hwResourceId.1.portLed.1.1.pcaIo.pin", {TlvType::Integer, "5"}}, + {"api.platform.lib.config.hwResourceId.1.portLed.1.1.pcaIo.usage", {TlvType::Text, "LINK,25G"}}, + + {"api.platform.lib.config.hwResourceId.1.portLed.2.type", {TlvType::Text, "PCA"}}, + {"api.platform.lib.config.hwResourceId.1.portLed.2.pcaIo.index", {TlvType::Integer, "5"}}, + {"api.platform.lib.config.hwResourceId.1.portLed.2.0.pcaIo.pin", {TlvType::Integer, "6"}}, + {"api.platform.lib.config.hwResourceId.1.portLed.2.0.pcaIo.usage", {TlvType::Text, "LINK,10G"}}, + {"api.platform.lib.config.hwResourceId.1.portLed.2.1.pcaIo.pin", {TlvType::Integer, "7"}}, + {"api.platform.lib.config.hwResourceId.1.portLed.2.1.pcaIo.usage", {TlvType::Text, "LINK,25G"}}, + + {"api.platform.lib.config.hwResourceId.1.portLed.3.type", {TlvType::Text, "PCA"}}, + {"api.platform.lib.config.hwResourceId.1.portLed.3.pcaIo.index", {TlvType::Integer, "4"}}, + {"api.platform.lib.config.hwResourceId.1.portLed.3.0.pcaIo.pin", {TlvType::Integer, "2"}}, + {"api.platform.lib.config.hwResourceId.1.portLed.3.0.pcaIo.usage", {TlvType::Text, "LINK,10G"}}, + {"api.platform.lib.config.hwResourceId.1.portLed.3.1.pcaIo.pin", {TlvType::Integer, "3"}}, + {"api.platform.lib.config.hwResourceId.1.portLed.3.1.pcaIo.usage", {TlvType::Text, "LINK,25G"}}, + + {"api.platform.lib.config.hwResourceId.2.type", {TlvType::Text, "VRM"}}, + {"api.platform.lib.config.hwResourceId.2.vrm.busSelType", {TlvType::Text, "PCAMUX"}}, + {"api.platform.lib.config.hwResourceId.2.vrm.bus", {TlvType::Integer, "0"}}, + {"api.platform.lib.config.hwResourceId.2.vrm.model", {TlvType::Text, "IR"}}, + {"api.platform.lib.config.hwResourceId.2.vrm.addr", {TlvType::Integer, "0x08"}}, + {"api.platform.lib.config.hwResourceId.2.vrm.pcaMux.index", {TlvType::Integer, "0"}}, + {"api.platform.lib.config.hwResourceId.2.vrm.pcaMux.value", {TlvType::Integer, "0x04"}}, + + {"api.platform.config.switch.0.VDDS.hwResourceId", {TlvType::Integer, "2"}}, + {"api.platform.lib.config.hwResourceId.3.type", {TlvType::Text, "VRM"}}, + {"api.platform.lib.config.hwResourceId.3.vrm.busSelType", {TlvType::Text, "PCAMUX"}}, + {"api.platform.lib.config.hwResourceId.3.vrm.bus", {TlvType::Integer, "0"}}, + {"api.platform.lib.config.hwResourceId.3.vrm.model", {TlvType::Text, "IR"}}, + {"api.platform.lib.config.hwResourceId.3.vrm.addr", {TlvType::Integer, "0x08"}}, + {"api.platform.lib.config.hwResourceId.3.vrm.pcaMux.index", {TlvType::Integer, "0"}}, + {"api.platform.lib.config.hwResourceId.3.vrm.pcaMux.value", {TlvType::Integer, "0x04"}}, + + {"api.platform.config.switch.0.VDDF.hwResourceId", {TlvType::Integer, "259"}}, + }} + }; + } +} + + + + + + + + + + + + + +#undef SPEED_100G +#undef SPEED_50G +#undef SPEED_40G +#undef SPEED_25G +#undef SPEED_10G + diff --git a/src/fm10k/IES_SDK.h b/src/fm10k/IES_SDK.h new file mode 100644 index 0000000..f0ac9d2 --- /dev/null +++ b/src/fm10k/IES_SDK.h @@ -0,0 +1,12 @@ +#pragma once + +#ifdef __cplusplus +extern "C"{ +#endif + +#include "fm_sdk.h" +#include "fm_sdk_fm10000_int.h" + +#ifdef __cplusplus +} +#endif \ No newline at end of file diff --git a/src/fm10k/Port.cpp b/src/fm10k/Port.cpp new file mode 100644 index 0000000..bad3b47 --- /dev/null +++ b/src/fm10k/Port.cpp @@ -0,0 +1 @@ +#include "Port.h" diff --git a/src/fm10k/Port.h b/src/fm10k/Port.h new file mode 100644 index 0000000..5bddebe --- /dev/null +++ b/src/fm10k/Port.h @@ -0,0 +1,106 @@ +#pragma once + + +#include +#include + +class Port { +public: + Port(uint32_t index, uint32_t logicalPort, uint32_t physicalPort) : m_portIndex(index), m_logicalPort(logicalPort), m_physicalPort(physicalPort){ + + } + + uint32_t getPortIndex() const{ + return m_portIndex; + } + + uint32_t getLogicalPort() const{ + return m_logicalPort; + } + + uint32_t getPhysicalPort() const{ + return m_physicalPort; + } + + enum class PortType { + None, + EPL, + PCIE, + TUNNEL, + LOOPBACK, + FIBM + }; + + enum class InterfaceType { + None = 0, + SFPP = 1, + QSFP_LANE0 = 2, + QSFP_LANE1 = 3, + QSFP_LANE2 = 4, + QSFP_LANE3 = 5, + QSFP_PCIE = 6, + }; + + enum class EthernetMode { + /** Port is disabled on the specified MAC. No lanes will be used. + * A port must be put in this state when another port sharing the + * same MAC is using a 4-lane mode. */ + Disabled = 0, + + /** AN-73: Auto-negotiation Clause 73. */ + AN_73, + + + /** 10GBASE-CR (SFP+): 10G, 1 lane, 64b/66b encoding. */ + ETH_10GBASE_CR, + /** 10GBASE-SR (SFP+, SFI): 10G, 1 lane, 64b/66b encoding. */ + ETH_10GBASE_SR, + + /** 25GBASE-SR (SFP+, SFI): 25G, 1 lane, 64/66b encoding. */ + ETH_25GBASE_SR, + /** 25GBASE-CR: 25G, 1 lane, 64/66b encoding. + * This mode is read-only, i.e., it can be set only through Clause-73 + * autonegotiation. */ + ETH_25GBASE_CR, + + /** 40GBASE-CR4 (QSFP 5M Direct Attach): 40G, 4 lane, 64b/66b encoding. + * This mode is read-only, i.e., it can be set only through Clause-73 + * autonegotiation. */ + ETH_40GBASE_CR4, + /** 40GBASE-SR4 (QSFP PMD Service Interface): 40G, 4 lane, 64b/66b + * encoding. */ + ETH_40GBASE_SR4, + + /** 100GBASE-SR4 (QSFP PMD Service Interface): 100G, 4 lane, 64b/66b + * encoding. */ + ETH_100GBASE_SR4, + /** 40GBASE-CR4: 100G, 4 lanes, 64b/66b encoding. This mode is read-only, + * i.e., it can be set only through Clause-73 autonegotiation. */ + ETH_100GBASE_CR4 + + }; + + EthernetMode m_ethernetMode = EthernetMode::Disabled; + + + PortType m_portType = PortType::None; + InterfaceType m_interfaceType = InterfaceType::None; + + /* EPL number associated to this port */ + uint32_t m_eplNumber; + /* PEP number associated to this port */ + uint32_t m_pepNumber; + /* TUNNEL number associated to this port */ + uint32_t m_tunnelNumber; + /* LOOPBACK number associated to this port */ + uint32_t m_loopbackNumber; + /* LANE number associated to this port */ + std::array m_lane; + +private: + uint32_t m_portIndex; + uint32_t m_logicalPort; + uint32_t m_physicalPort; +}; + + diff --git a/src/fsmd.cpp b/src/fsmd.cpp index 5a6f74d..f896e44 100644 --- a/src/fsmd.cpp +++ b/src/fsmd.cpp @@ -39,11 +39,17 @@ int main() { std::cout << "trying to initialize: "; + auto& port = fm10k.addPort(1, 1); + port.m_portType = Port::PortType::EPL; + port.m_interfaceType = Port::InterfaceType::QSFP_LANE0; + if(fm10k.initializationSequence()){ std::cout << "success" << std::endl; }else{ std::cout << "fail" << std::endl; } + + break; } return 0; }