FM10K/rrc-open-firmware
FM10K/rrc-open-firmware
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Use shift offset, fix interrupt offsets

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This commit is contained in:
DataHoarder 2021-08-03 02:54:47 +02:00
parent 6b825704d8
commit 36c67c879c
2 changed files with 43 additions and 43 deletions
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30
src/entrypoint.asm
View file

@ -68,8 +68,8 @@ entrypoint:
MOV R0, bootCfg_GPIO_PIN14_DRIVE
BNE R0, 0x1, 0x1, @.skipGPIO_PIN14_DRIVE
SET GPIO_DATA, 0x00000000, 0x00004000 ; Drive PIN 14
SET GPIO_CFG, 0x40004000, 0x40004000; Set PIN 14 to Dir = Output, OpenDrain = NormalOutput
SET GPIO_DATA, 0x00000000, 1 <14 ; Drive PIN 14
SET GPIO_CFG, 0x10001 <14, 0x10001 <14 ; Set PIN 14 to Dir = Output, OpenDrain = NormalOutput
.skipGPIO_PIN14_DRIVE:
@ -92,61 +92,61 @@ entrypoint:
MOV BSM_ADDR_OFFSET_1, 0x000000 ; PCIe base address for PEP
MOV R0, 0x000007ff ; PCIE_IB settings, All enabled
SET R0, 0x00000000, 0x00000008 ; Mask PCIE_IP.VPD_Request = 0
SET R0, 0x00000000, 0x00000080 ; Mask PCIE_IP.OutOfReset = 0
SET R0, 0x00000000, 0x00000040 ; Mask PCIE_IP.DataPathReset = 0
SET R0, 0x00000000, 0x00000020 ; Mask PCIE_IP.PFLR = 0
SET R0, 0x00000000, 1 <3 ; Mask PCIE_IP.VPD_Request = 0
SET R0, 0x00000000, 1 <7 ; Mask PCIE_IP.OutOfReset = 0
SET R0, 0x00000000, 1 <6 ; Mask PCIE_IP.DataPathReset = 0
SET R0, 0x00000000, 1 <5 ; Mask PCIE_IP.PFLR = 0
; TODO: move this to pcie.asm and make it a function
BNE DEVICE_CFG, 0x00000080, 0x00000080, @.skip_PEP0_masking; Is PCIeEnable != 1
BNE DEVICE_CFG, 1 <7, 1 <7, @.skip_PEP0_masking; Is PCIeEnable != 1
SET SOFT_RESET 0x00002000, 0x00002000 ; Set PEP PCIeActive = 1
MOV~10 PCIE_IB, R0 ; Copy interrupt settings
SET SOFT_RESET 0x00000000, 0x00002000 ; Set PEP PCIeActive = 0
.skip_PEP0_masking: ADD BSM_ADDR_OFFSET_1, BSM_ADDR_OFFSET_1, 0x100000
BNE DEVICE_CFG, 0x0080, 0x0080, @.skip_PEP1_masking; Is PCIeEnable != 1
BNE DEVICE_CFG, 1 <8, 1 <8, @.skip_PEP1_masking; Is PCIeEnable != 1
SET SOFT_RESET 0x00004000, 0x00004000 ; Set PEP PCIeActive = 1
MOV~10 PCIE_IB, R0 ; Copy interrupt settings
SET SOFT_RESET 0x00000000, 0x00004000 ; Set PEP PCIeActive = 0
.skip_PEP1_masking: ADD BSM_ADDR_OFFSET_1, BSM_ADDR_OFFSET_1, 0x100000
BNE DEVICE_CFG, 0x00000100, 0x00000100, @.skip_PEP2_masking; Is PCIeEnable != 1
BNE DEVICE_CFG, 1 <9, 1 <9, @.skip_PEP2_masking; Is PCIeEnable != 1
SET SOFT_RESET 0x00008000, 0x00008000 ; Set PEP PCIeActive = 1
MOV~10 PCIE_IB, R0 ; Copy interrupt settings
SET SOFT_RESET 0x00000000, 0x00008000 ; Set PEP PCIeActive = 0
.skip_PEP2_masking: ADD BSM_ADDR_OFFSET_1, BSM_ADDR_OFFSET_1, 0x100000
BNE DEVICE_CFG, 0x00000200, 0x00000200, @.skip_PEP3_masking; Is PCIeEnable != 1
BNE DEVICE_CFG, 1 <10, 1 <10, @.skip_PEP3_masking; Is PCIeEnable != 1
SET SOFT_RESET 0x00010000, 0x00010000 ; Set PEP PCIeActive = 1
MOV~10 PCIE_IB, R0 ; Copy interrupt settings
SET SOFT_RESET 0x00000000, 0x00010000 ; Set PEP PCIeActive = 0
.skip_PEP3_masking: ADD BSM_ADDR_OFFSET_1, BSM_ADDR_OFFSET_1, 0x100000
BNE DEVICE_CFG, 0x00000400, 0x00000400, @.skip_PEP4_masking; Is PCIeEnable != 1
BNE DEVICE_CFG, 1 <11, 1 <11, @.skip_PEP4_masking; Is PCIeEnable != 1
SET SOFT_RESET 0x00020000, 0x00020000 ; Set PEP PCIeActive = 1
MOV~10 PCIE_IB, R0 ; Copy interrupt settings
SET SOFT_RESET 0x00000000, 0x00020000 ; Set PEP PCIeActive = 0
.skip_PEP4_masking: ADD BSM_ADDR_OFFSET_1, BSM_ADDR_OFFSET_1, 0x100000
BNE DEVICE_CFG, 0x00000800, 0x00000800, @.skip_PEP5_masking; Is PCIeEnable != 1
BNE DEVICE_CFG, 1 <12, 1 <12, @.skip_PEP5_masking; Is PCIeEnable != 1
SET SOFT_RESET 0x00040000, 0x00040000 ; Set PEP PCIeActive = 1
MOV~10 PCIE_IB, R0 ; Copy interrupt settings
SET SOFT_RESET 0x00000000, 0x00040000 ; Set PEP PCIeActive = 0
.skip_PEP5_masking: ADD BSM_ADDR_OFFSET_1, BSM_ADDR_OFFSET_1, 0x100000
BNE DEVICE_CFG, 0x00001000, 0x00001000, @.skip_PEP6_masking; Is PCIeEnable != 1
BNE DEVICE_CFG, 1 <13, 1 <13, @.skip_PEP6_masking; Is PCIeEnable != 1
SET SOFT_RESET 0x00080000, 0x00080000 ; Set PEP PCIeActive = 1
MOV~10 PCIE_IB, R0 ; Copy interrupt settings
SET SOFT_RESET 0x00000000, 0x00080000 ; Set PEP PCIeActive = 0
.skip_PEP6_masking: ADD BSM_ADDR_OFFSET_1, BSM_ADDR_OFFSET_1, 0x100000
BNE DEVICE_CFG, 0x00002000, 0x00002000, @.skip_PEP7_masking; Is PCIeEnable != 1
BNE DEVICE_CFG, 1 <14, 1 <14, @.skip_PEP7_masking; Is PCIeEnable != 1
SET SOFT_RESET 0x00100000, 0x00100000 ; Set PEP PCIeActive = 1
MOV~10 PCIE_IB, R0 ; Copy interrupt settings
SET SOFT_RESET 0x00000000, 0x00100000 ; Set PEP PCIeActive = 0
.skip_PEP7_masking: ADD BSM_ADDR_OFFSET_1, BSM_ADDR_OFFSET_1, 0x100000
BNE DEVICE_CFG, 0x00004000, 0x00004000, @.skip_PEP8_masking; Is PCIeEnable != 1
BNE DEVICE_CFG, 1 <15, 1 <15, @.skip_PEP8_masking; Is PCIeEnable != 1
SET SOFT_RESET 0x00200000, 0x00200000 ; Set PEP PCIeActive = 1
MOV~10 PCIE_IB, R0 ; Copy interrupt settings
SET SOFT_RESET 0x00000000, 0x00200000 ; Set PEP PCIeActive = 0

56
src/pcie.asm
View file

@ -26,60 +26,60 @@
; FASTCALL void(bool pep0, bool pep2, bool pep4, bool pep6)
init_setPcieSplitMode:
SET DEVICE_CFG, 0, 0xf ; Reset PCIe modes PCIeMode[0..3]
BEQ P0, 0, 0x1, @.continue0 ; PEP0
SET DEVICE_CFG, 0x1, 0x1 ; Set PCIeMode[0] = 1 (4x4x4x4)
SET DEVICE_CFG, 0, 0xf ; Reset PCIe modes PCIeMode[0..3]
BEQ P0, 0, 0x1, @.continue0 ; PEP0
SET DEVICE_CFG, 0x1, 1 ; Set PCIeMode[0] = 1 (4x4x4x4)
.continue0:
BEQ P1, 0, 0x1, @.continue2 ; PEP2
SET DEVICE_CFG, 0x2, 0x2 ; Set PCIeMode[1] = 1 (4x4x4x4)
BEQ P1, 0, 0x1, @.continue2 ; PEP2
SET DEVICE_CFG, 0x2, 1 <1 ; Set PCIeMode[1] = 1 (4x4x4x4)
.continue2:
BEQ~2 P2, 0, 0x1, @.continue4 ; access POPP 1 PEP4
SET DEVICE_CFG, 0x4, 0x4 ; Set PCIeMode[2] = 1 (4x4x4x4)
BEQ~2 P2, 0, 0x1, @.continue4 ; access POPP 1 PEP4
SET DEVICE_CFG, 0x4, 1 <2 ; Set PCIeMode[2] = 1 (4x4x4x4)
.continue4:
BEQ~2 P3, 0, 0x1, @.continue6 ; access POPP 2 PEP6
SET DEVICE_CFG, 0x8, 0x8 ; Set PCIeMode[3] = 1 (4x4x4x4)
BEQ~2 P3, 0, 0x1, @.continue6 ; access POPP 2 PEP6
SET DEVICE_CFG, 0x8, 1 <3 ; Set PCIeMode[3] = 1 (4x4x4x4)
.continue6:
RET
; FASTCALL void(bool pep0, bool pep1, bool pep2, bool pep3, bool pep4, bool pep5, bool pep6, bool pep7, bool pep8)
init_setPciePEPEnabled:
BEQ P0, 1, 0x1, @.continue0 ; PEP0
SET DEVICE_CFG, 0, 0x0080 ; Set PCIEnable[0] = 0, default 1
SET DEVICE_CFG, 0, 1 <7 ; Set PCIEnable[0] = 0, default 1
.continue0:
BEQ P1, 1, 0x1, @.continue1 ; PEP1
SET DEVICE_CFG, 0, 0x0100 ; Set PCIEnable[1] = 0, default 1
SET DEVICE_CFG, 0, 1 <8 ; Set PCIEnable[1] = 0, default 1
.continue1:
BEQ~2 P2, 1, 0x1, @.continue2 ; PEP2
SET DEVICE_CFG, 0, 0x0200 ; Set PCIEnable[2] = 0, default 1
BEQ~2 P2, 1, 0x1, @.continue2 ; PEP2
SET DEVICE_CFG, 0, 1 <9 ; Set PCIEnable[2] = 0, default 1
.continue2:
BEQ~2 P3, 1, 0x1, @.continue3 ; PEP3
SET DEVICE_CFG, 0, 0x0400 ; Set PCIEnable[3] = 0, default 1
BEQ~2 P3, 1, 0x1, @.continue3 ; PEP3
SET DEVICE_CFG, 0, 1 <10 ; Set PCIEnable[3] = 0, default 1
.continue3:
BEQ~2 P4, 1, 0x1, @.continue4 ; PEP4
SET DEVICE_CFG, 0, 0x0800 ; Set PCIEnable[4] = 0, default 1
BEQ~2 P4, 1, 0x1, @.continue4 ; PEP4
SET DEVICE_CFG, 0, 1 <11 ; Set PCIEnable[4] = 0, default 1
.continue4:
BEQ~2 P5, 1, 0x1, @.continue5 ; PEP5
SET DEVICE_CFG, 0, 0x1000 ; Set PCIEnable[5] = 0, default 1
BEQ~2 P5, 1, 0x1, @.continue5 ; PEP5
SET DEVICE_CFG, 0, 1 <12 ; Set PCIEnable[5] = 0, default 1
.continue5:
BEQ~2 P6, 1, 0x1, @.continue6 ; PEP6
SET DEVICE_CFG, 0, 0x2000 ; Set PCIEnable[6] = 0, default 1
BEQ~2 P6, 1, 0x1, @.continue6 ; PEP6
SET DEVICE_CFG, 0, 1 <13 ; Set PCIEnable[6] = 0, default 1
.continue6:
BEQ~2 P7, 1, 0x1, @.continue7 ; PEP7
SET DEVICE_CFG, 0, 0x4000 ; Set PCIEnable[7] = 0, default 1
BEQ~2 P7, 1, 0x1, @.continue7 ; PEP7
SET DEVICE_CFG, 0, 1 <14 ; Set PCIEnable[7] = 0, default 1
.continue7:
BEQ~2 P8, 1, 0x1, @.continue8 ; PEP8
SET DEVICE_CFG, 0, 0x8000 ; Set PCIEnable[8] = 0, default 1
BEQ~2 P8, 1, 0x1, @.continue8 ; PEP8
SET DEVICE_CFG, 0, 1 <15 ; Set PCIEnable[8] = 0, default 1
.continue8:
RET
@ -153,16 +153,16 @@ execute_SBus_PCIE_Command:
BEQ~2 P2, 1, 0x1, @.doRead ; Check if we are doing a write or read op
; Do write
SET R0, 0x21 <16, 0xff0000 ; Set WRITE Op 0x21
SET R0, 0x21 <16, 0xff <16 ; Set WRITE Op 0x21
MOV R1, 0x04000000 ; Success value for write ResultCode
JUMP @.executeCommand
.doRead:
; Do read
SET R0, 0x22 <16, 0xff0000 ; Set READ Op 0x22
SET R0, 0x22 <16, 0xff <16 ; Set READ Op 0x22
MOV R1, 0x10000000 ; Success value for read ResultCode
.executeCommand:
MOV SBUS_PCIE_COMMAND, R0 ; Write command and operators
SET SBUS_PCIE_COMMAND, 0x01000000, 0x01000000 ; Set Execute = 1 to start the command. Should automatically set Busy = 1 as well
SET SBUS_PCIE_COMMAND, 1 <24, 1 <24 ; Set Execute = 1 to start the command. Should automatically set Busy = 1 as well
PNE SBUS_PCIE_COMMAND, 0, 0x02000000, 65535, 1, @.failCommand ; Poll until Busy = 0
AND R0, SBUS_PCIE_COMMAND, 0x1c000000 ; Get ResultCode
SUB R0, R0, R1 ; Compare ResultCode to expected