FM10K/rrc-open-firmware
FM10K/rrc-open-firmware
1
0
Fork 0
Code Issues Pull requests Releases Activity

Improved init_PCIE_EACH_SERDES_SPICO to do full init in a single loop

Browse source
This commit is contained in:
DataHoarder 2021-01-04 05:55:22 +01:00
parent 7cd116b2c8
commit eefee10ef3
1 changed files with 20 additions and 35 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

55
src/pcie.asm
View file

@ -435,66 +435,51 @@ init_PCIE_EACH_SERDES_SPICO:
MOV R0, 2 ; Current SERDES device index
MOV R1, 0x00e00ff0 ; Current data to write
MOV R2, 0x000000d0 ; Current data to write to odd (PCS)
.do:
FASTCALL @execute_SBus_PCIE_Command, 0xfd, R0, 0, R1 ; Execute command
BNE RRET, 1, 0x1, @.failCommand ; Command failed
ADD R0, R0, 2 ; Increase index for next spico
BEQ, R0, 1, 0x1 .commandOddPcs; Is it odd (PCS)?
FASTCALL @execute_SBus_PCIE_Command, 0xfd, R0, 0, R1 ; Execute command
BNE RRET, 1, 0x1, @.failCommand ; Command failed
JUMP .nextItem
.commandOddPcs:
; Do odd number init (PCS)
FASTCALL @execute_SBus_PCIE_Command, 0x24, R0, 0, R2 ; Execute command
BNE RRET, 1, 0x1, @.failCommand ; Command failed
.nextItem:
ADD R0, R0, 1 ; Increase index for next spico
.check0: BNE, R0, 0x0a, 0xFFFFFFFF, @.check1
BEQ DEVICE_CFG, 0, 0x01, @.check1 ; PEP0 is 8x8x
MOV R1, 0x00e10ff0
MOV R2, 0x000000d1
.check1: BNE, R0, 0x12, 0xFFFFFFFF, @.check2
MOV R1, 0x00e20ff0
MOV R2, 0x000000d2
.check2: BNE, R0, 0x1a, 0xFFFFFFFF, @.check3
BEQ DEVICE_CFG, 0, 0x02, @.check3 ; PEP2 is 8x8x
MOV R1, 0x00e30ff0
MOV R2, 0x000000d3
.check3: BNE, R0, 0x22, 0xFFFFFFFF, @.check4
MOV R1, 0x00e40ff0
MOV R2, 0x000000d4
.check4: BNE, R0, 0x3a, 0xFFFFFFFF, @.check5
BEQ DEVICE_CFG, 0, 0x04, @.check5 ; PEP4 is 8x8x
MOV R1, 0x00e50ff0
MOV R2, 0x000000d5
.check5: BNE, R0, 0x32, 0xFFFFFFFF, @.check6
MOV R1, 0x00e60ff0
MOV R2, 0x000000d6
.check6: BNE, R0, 0x4a, 0xFFFFFFFF, @.continue
BEQ DEVICE_CFG, 0, 0x08, @.continue ; PEP6 is 8x8x
MOV R1, 0x00e70ff0
MOV R2, 0x000000d7
.continue:
BNE R0, platform_SERDES_SPICO_COUNT, 0xFFFFFFFF, @.do
MOV R0, 3 ; Current SERDES device index, odd, for PCS access
MOV R1, 0x000000d0 ; Current data to write
.do2:
FASTCALL @execute_SBus_PCIE_Command, 0x24, R0, 0, R1 ; Execute command
BNE RRET, 1, 0x1, @.failCommand ; Command failed
ADD R0, R0, 2 ; Increase index for next spico
.check20: BNE, R0, 0x0b, 0xFFFFFFFF, @.check21
BEQ DEVICE_CFG, 0, 0x01, @.check21 ; PEP0 is 8x8x
MOV R1, 0x000000d1
.check21: BNE, R0, 0x13, 0xFFFFFFFF, @.check22
MOV R1, 0x000000d2
.check22: BNE, R0, 0x1b, 0xFFFFFFFF, @.check23
BEQ DEVICE_CFG, 0, 0x02, @.check23 ; PEP2 is 8x8x
MOV R1, 0x000000d3
.check23: BNE, R0, 0x23, 0xFFFFFFFF, @.check24
MOV R1, 0x000000d4
.check24: BNE, R0, 0x3b, 0xFFFFFFFF, @.check25
BEQ DEVICE_CFG, 0, 0x04, @.check25 ; PEP4 is 8x8x
MOV R1, 0x000000d5
.check25: BNE, R0, 0x33, 0xFFFFFFFF, @.check26
MOV R1, 0x000000d6
.check26: BNE, R0, 0x4b, 0xFFFFFFFF, @.continue2
BEQ DEVICE_CFG, 0, 0x08, @.continue2 ; PEP6 is 8x8x
MOV R1, 0x000000d7
.continue2:
BNE R0, platform_SERDES_SPICO_COUNT +1, 0xFFFFFFFF, @.do2
BNE R0, platform_SERDES_SPICO_COUNT + 1, 0xFFFFFFFF, @.do
MOV RRET, 1 ; Success
MOV api_SERDES_OOR_STATUS_PASS_1, 0