320 lines
10 KiB
C++
320 lines
10 KiB
C++
/*****************************************************************************
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* Copyright (c) 2020, rrcSmall FM10K-Documentation Contributors
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* * Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* * Neither the name of the copyright holder nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*****************************************************************************/
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#pragma once
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#include <utility>
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#include <vector>
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#include <cstdint>
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#include <unordered_map>
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class ImageFormat{
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public:
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class AnalysisState{
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public:
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std::unordered_map<uint32_t, uint32_t> memory;
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uint32_t previous;
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uint32_t current;
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AnalysisState(uint32_t initial) : current(initial), previous(0){
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}
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AnalysisState(const AnalysisState& oldState) : current(oldState.current), previous(oldState.previous), memory(oldState.memory){
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}
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bool operator==(const AnalysisState &other) const{
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return current == other.current && memory == other.memory;
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}
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void setRegister(uint32_t addr, uint32_t value){
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memory[addr] = value;
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}
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uint32_t getRegister(uint32_t addr) const{
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return memory.find(addr) == memory.end() ? 0 : memory.at(addr);
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}
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uint32_t getAddressOffset(uint8_t offsetEntry) const;
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};
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class Instruction{
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public:
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Instruction(){
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}
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Instruction(const Instruction& instruction) : address(instruction.address), endAddress(instruction.endAddress), command(instruction.command), parameters(instruction.parameters){
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}
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enum class KnownRegisters : uint32_t {
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FATAL_CODE = 0x0,
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LAST_FATAL_CODE = 0x1,
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SOFT_RESET = 0x3,
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DEVICE_CFG = 0x4,
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RESET_CFG = 0x5,
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WATCHDOG_CFG = 0x6,
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MGMT_SCRATCH_0 = 0x8,
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MGMT_SCRATCH_1 = MGMT_SCRATCH_0 + 1,
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VITAL_PRODUCT_DATA = 0x304,
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GLOBAL_INTERRUPT_DETECT = 0x400,
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INTERRUPT_MASK_BSM = 0x442,
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CHIP_VERSION = 0x452,
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BSM_SCRATCH_START = 0x800,
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BSM_SCRATCH_END = BSM_SCRATCH_START + 0x400 - 1,
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BSM_ARGS = 0x000C01,
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BSM_ADDR_OFFSET_0 = 0x000C04,
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BSM_ADDR_OFFSET_1 = BSM_ADDR_OFFSET_0 + 1,
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BSM_ADDR_OFFSET_2 = BSM_ADDR_OFFSET_0 + 2,
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BSM_ADDR_OFFSET_3 = BSM_ADDR_OFFSET_0 + 3,
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BSM_COUNTER_0 = 0x000C08,
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BSM_COUNTER_1 = BSM_COUNTER_0 + 1,
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BIST_CTRL = 0x000C10,
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REI_CTRL = 0x000C12,
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REI_STAT = 0x000C13,
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GPIO_CFG = 0x000C15,
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GPIO_DATA = 0x000C16,
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GPIO_IP = 0x000C17,
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GPIO_IM = 0x000C18,
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PLL_PCIE_CTRL = 0x2241,
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PLL_PCIE_STAT = 0x2242,
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SBUS_PCIE_CFG = 0x2243,
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SBUS_PCIE_COMMAND = 0x2244,
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SBUS_PCIE_REQUEST = 0x2245,
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SBUS_PCIE_RESPONSE = 0x2246,
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SBUS_PCIE_SPICO_IN = 0x2247,
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SBUS_PCIE_SPICO_OUT = 0x2248,
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SBUS_PCIE_IP = 0x2249,
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SBUS_PCIE_IM = 0x224a,
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PCIE_XPLL_CTRL = 0x3000,
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PCIE_CLK_CTRL = 0x3001,
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PCIE_CLK_CTRL_2 = 0x3002,
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PCIE_CLKMON_RATIO_CFG = 0x3003,
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PCIE_CLKMON_TOLERANCE_CFG = 0x3004,
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PCIE_CLKMON_DEADLINES_CFG = 0x3005,
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PCIE_CLK_STAT = 0x3006,
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PCIE_CLK_IP = 0x3007,
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PCIE_CLK_IM = 0x3008,
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PCIE_WARM_RESET_DELAY = 0x3009,
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PORTS_MGMT_BASE_ADDRESS = 0xE8000,
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PLL_EPL_CTRL = PORTS_MGMT_BASE_ADDRESS + 0x0,
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PLL_EPL_STAT = PORTS_MGMT_BASE_ADDRESS + 0x1,
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PLL_FABRIC_CTRL = PORTS_MGMT_BASE_ADDRESS + 0x2,
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PLL_FABRIC_STAT = PORTS_MGMT_BASE_ADDRESS + 0x3,
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PLL_FABRIC_LOCK = PORTS_MGMT_BASE_ADDRESS + 0x4,
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SBUS_EPL_CFG = PORTS_MGMT_BASE_ADDRESS + 0x5,
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SBUS_EPL_COMMAND = PORTS_MGMT_BASE_ADDRESS + 0x6,
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SBUS_EPL_REQUEST = PORTS_MGMT_BASE_ADDRESS + 0x7,
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SBUS_EPL_RESPONSE = PORTS_MGMT_BASE_ADDRESS + 0x8,
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SBUS_EPL_SPICO_IN = PORTS_MGMT_BASE_ADDRESS + 0x9,
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SBUS_EPL_SPICO_OUT = PORTS_MGMT_BASE_ADDRESS + 0xa,
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SBUS_EPL_IP = PORTS_MGMT_BASE_ADDRESS + 0xb,
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SBUS_EPL_IM = PORTS_MGMT_BASE_ADDRESS + 0xc,
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PM_CLKOBS_CTRL = PORTS_MGMT_BASE_ADDRESS + 0x12,
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PCIE_PF_BASE_ADDRESS = 0x100000,
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NOP = 0xFFFFFFFF
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};
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static std::string getAddressRegisterName(uint32_t addr){
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return getRegisterName(static_cast<KnownRegisters>(addr));
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}
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static std::string getRegisterName(KnownRegisters addr);
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enum class Command : uint8_t {
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WRITE = 0,
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COPY,
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LOAD,
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INIT,
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CALC,
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CALC_IMM,
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BRANCH,
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POLL,
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LOOP,
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JUMP,
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RETURN,
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SET,
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WAIT,
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END,
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NOP = 0xFF
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};
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uint32_t address;
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uint32_t endAddress;
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uint32_t command;
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std::vector<uint32_t> parameters;
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static Instruction fromBytes(uint32_t offset, const std::vector<uint8_t>& bytes);
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Instruction(uint32_t address, uint32_t command, std::vector<uint32_t> parameters) : address(address), command(command), parameters(std::move(parameters)), endAddress(0){
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}
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std::string toString() const;
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std::vector<uint32_t> getPossibleBranches() const;
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std::vector<std::pair<uint32_t, std::unordered_map<uint32_t, uint32_t>>> execute(AnalysisState& state) const;
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Command getCommand() const{
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if(((command >> 6) & 0b11) == 0b00){
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return Command::WRITE;
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}else if(((command >> 6) & 0b11) == 0b01){
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return Command::COPY;
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}else if(((command >> 3) & 0b11111) == 0b11000){
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return Command::LOAD;
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}else if(((command >> 3) & 0b11111) == 0b11001){
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return Command::INIT;
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}else if(((command >> 5) & 0b111) == 0b100){
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return Command::CALC;
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}else if(((command >> 5) & 0b111) == 0b101){
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return Command::CALC_IMM;
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}else if(((command >> 3) & 0b11111) == 0b11010){
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return Command::BRANCH;
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}else if(((command >> 3) & 0b11111) == 0b11011){
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return Command::POLL;
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}else if(((command >> 1) & 0b1111111) == 0b1110000){
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return Command::LOOP;
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}else if(command == 0b11101000){
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return Command::JUMP;
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}else if(((command >> 2) & 0b111111) == 0b111100){
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return Command::RETURN;
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}else if(((command >> 2) & 0b111111) == 0b111110){
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return Command::SET;
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}else if(command == 0xFE){
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return Command::WAIT;
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}else if(command == 0xFF){
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return Command::END;
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}
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return Command::NOP;
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}
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};
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enum class HeaderSpeed : uint8_t {
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SPEED_390_KHZ = 0,
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SPEED_780_KHZ,
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SPEED_1560_KHZ,
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SPEED_3125_KHZ,
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SPEED_6250_KHZ,
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SPEED_12500_KHZ,
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SPEED_25000_KHZ,
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SPEED_50000_KHZ
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};
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enum class HeaderMode : uint8_t {
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MODE_SINGLE = 0,
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MODE_DUAL,
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MODE_QUAD,
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MODE_SINGLE_FAST
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};
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static ImageFormat fromBytes(const std::vector<uint8_t>& image, bool prefetchInitialZone = false);
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void decodeInstructionsAt(const std::vector<uint32_t>& offset);
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void decodeAnalyzeInstructionsAt(uint32_t offset);
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const Instruction* findInstructionByAddress(uint32_t addr){
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for(const auto& instruction : instructions){
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if((instruction.endAddress == 0 && addr == instruction.address ) || (instruction.endAddress != 0 && addr >= instruction.address && addr < instruction.endAddress)){
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return &instruction;
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}
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}
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return nullptr;
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}
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ImageFormat(){
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}
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const auto& getHeader() const{
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return header;
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}
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const auto& getInstructions() const{
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return instructions;
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}
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const auto& getBaseImage() const{
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return baseImage;
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}
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const auto& getBootConfig() const{
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return bootConfig;
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}
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private:
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struct {
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uint8_t reserved : 3;
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ImageFormat::HeaderSpeed speed : 3;
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ImageFormat::HeaderMode mode : 2;
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uint32_t baseAddress : 24;
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} header;
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static const int CFG_HEADER = 0x4 << 2;
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static const int CFG_LENGTH = 16;
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struct {
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uint8_t length : 8;
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uint32_t base : 24;
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} cfgHeader;
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struct {
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uint8_t fileFormat : 8;
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uint8_t version : 8;
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uint16_t length : 16;
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} cfg;
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std::vector<std::string> bootConfig;
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std::vector<Instruction> instructions;
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std::vector<uint8_t> baseImage;
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}; |