51 lines
1.8 KiB
NASM
51 lines
1.8 KiB
NASM
; Definition of registers found on FM10000 official images for comunication back with driver/manager
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; Based on Intel datasheet and BSD-3 code.
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.reserve api_SPI_LOCK_STATE, 0x000
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.reserve api_PCIE_SBUS_LOCK_STATE, 0x001
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.reserve api_SOFT_RESET_LOCK_STATE, 0x002
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.reserve api_RECOVERY_STATUS_VECTOR, 0x003
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.reserve api_PEP_MAC_BASE, 0x00a
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.reserve api_CUSTOM_MAC_BASE, 0x064
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.reserve api_BSM_STATUS, 0x190
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.reserve api_EEPROM_IMAGE_VERSION, 0x191
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.reserve api_MASTER_FW_VERSION, 0x192
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.reserve api_SERDES_FW_VERSION, 0x193
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.reserve api_SERDES_STATUS_1, 0x194
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.reserve api_SERDES_STATUS_2, 0x195
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.reserve api_SERDES_STATUS_3, 0x196
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.reserve api_SERDES_STATUS_4, 0x197
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.reserve api_PCIE_MASTER_STATUS, 0x198
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.reserve api_PCIE_SERDES_STATUS, 0x199
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.reserve api_DE_COLD_RESET_STATUS, 0x1ae
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.reserve api_SBUS_RESET_STATUS, 0x1af
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.reserve api_MEMORY_REPAIR_STATUS, 0x1b0
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.reserve api_MEMORY_INIT_STATUS, 0x1b1
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.reserve api_PCIE_PCS_DIS_STATUS, 0x1b2
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.reserve api_PCIE_MASTER_FW_DL_STATUS, 0x1b3
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.reserve api_PCIE_FW_CHECK_STATUS, 0x1b4
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.reserve api_PCIE_SERDES_FW_DL_STATUS, 0x1b5
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.reserve api_PCIE_SERDES_INIT_STATUS, 0x1b6
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.reserve api_PCIE_PCS_EN_STATUS, 0x1b7
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.reserve api_PCIE_DE_WARM_RESET_STATUS, 0x1b8
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.reserve api_PCIE_ISR_STATUS_0, 0x1b9
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.reserve api_PCIE_ISR_STATUS_1, 0x1ba
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.reserve api_PCIE_ISR_STATUS_2, 0x1bb
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.reserve api_PCIE_ISR_STATUS_3, 0x1bc
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.reserve api_PCIE_ISR_STATUS_4, 0x1bd
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.reserve api_PCIE_ISR_STATUS_5, 0x1be
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.reserve api_PCIE_ISR_STATUS_6, 0x1bf
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.reserve api_PCIE_ISR_STATUS_7, 0x1c0
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.reserve api_PCIE_ISR_STATUS_8, 0x1c1
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.reserve api_SERDES_OOR_STATUS_PASS_1, 0x1c2
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.reserve api_SERDES_OOR_STATUS_PASS_2, 0x1c3
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.reserve api_SW_LOCK_ERR_STATUS, 0x1c4
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.reserve api_PCIE_EN_REFCLK_STATUS, 0x1c5
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.reserve api_RE_RESET_MASK_STATUS_1, 0x1c6
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.reserve api_RE_RESET_MASK_STATUS_2, 0x1c7
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.reserve api_RE_RESET_ERR_STATUS, 0x1c8 |