General cleanup, improve load32 and dataset execution
This commit is contained in:
parent
244cff31f9
commit
1bb1da8bbc
SSH key fingerprint:
SHA256:OLTRf6Fl87G52SiR7sWLGNzlJt4WOX+tfI2yxo0z7xk
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@ -30,7 +30,6 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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package aes
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import (
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"encoding/binary"
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"git.gammaspectra.live/P2Pool/go-randomx/v2/keys"
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"unsafe"
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)
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@ -48,20 +47,20 @@ import (
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//
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// Hashing throughput: >20 GiB/s per CPU core with hardware AES
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func HashAes1Rx4(input []byte, output *[64]byte) {
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if len(input)%64 != 0 {
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panic("unsupported")
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}
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// states are copied
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states := keys.AesHash1R_State
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var in [4][4]uint32
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for input_ptr := 0; input_ptr < len(input); input_ptr += 64 {
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for i := 0; i < 63; i += 4 { // load 64 bytes
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in[i/16][(i%16)/4] = binary.LittleEndian.Uint32(input[input_ptr+i:])
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}
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in := (*[4][4]uint32)(unsafe.Pointer(unsafe.SliceData(input[input_ptr:])))
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soft_aesenc(&states[0], &in[0])
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soft_aesdec(&states[1], &in[1])
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soft_aesenc(&states[2], &in[2])
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soft_aesdec(&states[3], &in[3])
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}
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soft_aesenc(&states[0], &keys.AesHash1R_XKeys[0])
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@ -74,11 +73,7 @@ func HashAes1Rx4(input []byte, output *[64]byte) {
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soft_aesenc(&states[2], &keys.AesHash1R_XKeys[1])
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soft_aesdec(&states[3], &keys.AesHash1R_XKeys[1])
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// write back to state
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for i := 0; i < 63; i += 4 {
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binary.LittleEndian.PutUint32(output[i:], states[i/16][(i%16)/4])
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}
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copy(output[:], (*[64]byte)(unsafe.Pointer(&states))[:])
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}
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// FillAes1Rx4
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@ -110,15 +105,17 @@ func FillAes1Rx4(state *[64]byte, output []byte) {
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}
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// FillAes4Rx4 used to generate final program
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func FillAes4Rx4(state *[64]byte, output []byte) {
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var states [4][4]uint32
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for i := 0; i < 63; i += 4 {
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states[i/16][(i%16)/4] = binary.LittleEndian.Uint32(state[i:])
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func FillAes4Rx4(state [64]byte, output []byte) {
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if len(output)%len(state) != 0 {
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panic("unsupported")
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}
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outptr := 0
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for ; outptr < len(output); outptr += 64 {
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// state is copied on caller
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// Copy state
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states := (*[4][4]uint32)(unsafe.Pointer(&state))
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for outptr := 0; outptr < len(output); outptr += len(state) {
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soft_aesdec(&states[0], &keys.AesGenerator4R_Keys[0])
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soft_aesenc(&states[1], &keys.AesGenerator4R_Keys[0])
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soft_aesdec(&states[2], &keys.AesGenerator4R_Keys[4])
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@ -139,11 +136,7 @@ func FillAes4Rx4(state *[64]byte, output []byte) {
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soft_aesdec(&states[2], &keys.AesGenerator4R_Keys[7])
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soft_aesenc(&states[3], &keys.AesGenerator4R_Keys[7])
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// store bytes to output buffer
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for i := 0; i < 63; i += 4 {
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binary.LittleEndian.PutUint32(output[outptr+i:], states[i/16][(i%16)/4])
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}
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copy(output[outptr:], state[:])
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}
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}
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51
cache.go
51
cache.go
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@ -34,6 +34,10 @@ func Randomx_alloc_cache(flags uint64) *Randomx_Cache {
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}
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}
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func (cache *Randomx_Cache) HasJIT() bool {
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return cache.Flags&RANDOMX_FLAG_JIT > 0 && cache.JitPrograms[0] != nil
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}
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func (cache *Randomx_Cache) VM_Initialize() *VM {
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return &VM{
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@ -102,34 +106,45 @@ func (cache *Randomx_Cache) InitDatasetItem(rl *RegisterLine, itemNumber uint64)
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rl[6] = rl[0] ^ keys.SuperScalar_Constants[6]
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rl[7] = rl[0] ^ keys.SuperScalar_Constants[7]
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if cache.JitPrograms[0] != nil {
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for i := 0; i < RANDOMX_CACHE_ACCESSES; i++ {
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mix := cache.GetMixBlock(registerValue)
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for i := 0; i < RANDOMX_CACHE_ACCESSES; i++ {
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mix := cache.GetMixBlock(registerValue)
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cache.JitPrograms[i].Execute(rl)
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program := cache.Programs[i]
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for q := range rl {
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rl[q] ^= mix[q]
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}
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registerValue = rl[cache.Programs[i].AddressRegister()]
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executeSuperscalar(program.Program(), rl)
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for q := range rl {
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rl[q] ^= mix[q]
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}
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} else {
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for i := 0; i < RANDOMX_CACHE_ACCESSES; i++ {
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mix := cache.GetMixBlock(registerValue)
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program := cache.Programs[i]
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registerValue = rl[program.AddressRegister()]
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executeSuperscalar(program.Program(), rl)
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}
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}
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for q := range rl {
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rl[q] ^= mix[q]
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}
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func (cache *Randomx_Cache) InitDatasetItemJIT(rl *RegisterLine, itemNumber uint64) {
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registerValue := itemNumber
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registerValue = rl[program.AddressRegister()]
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rl[0] = (itemNumber + 1) * keys.SuperScalar_Constants[0]
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rl[1] = rl[0] ^ keys.SuperScalar_Constants[1]
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rl[2] = rl[0] ^ keys.SuperScalar_Constants[2]
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rl[3] = rl[0] ^ keys.SuperScalar_Constants[3]
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rl[4] = rl[0] ^ keys.SuperScalar_Constants[4]
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rl[5] = rl[0] ^ keys.SuperScalar_Constants[5]
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rl[6] = rl[0] ^ keys.SuperScalar_Constants[6]
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rl[7] = rl[0] ^ keys.SuperScalar_Constants[7]
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for i := 0; i < RANDOMX_CACHE_ACCESSES; i++ {
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mix := cache.GetMixBlock(registerValue)
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cache.JitPrograms[i].Execute(rl)
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for q := range rl {
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rl[q] ^= mix[q]
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}
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registerValue = rl[cache.Programs[i].AddressRegister()]
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}
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}
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@ -85,6 +85,7 @@ const ScratchpadL1Mask16 = (ScratchpadL1/2 - 1) * 16
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const ScratchpadL2Mask16 = (ScratchpadL2/2 - 1) * 16
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const ScratchpadL3Mask = (ScratchpadL3 - 1) * 8
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const ScratchpadL3Mask64 = (ScratchpadL3/8 - 1) * 64
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const CONDITIONOFFSET = RANDOMX_JUMP_OFFSET
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const CONDITIONMASK = ((1 << RANDOMX_JUMP_BITS) - 1)
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const STOREL3CONDITION = 14
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@ -10,7 +10,11 @@ func (d *Randomx_DatasetLight) PrefetchDataset(address uint64) {
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}
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func (d *Randomx_DatasetLight) ReadDataset(address uint64, r, cache *RegisterLine) {
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d.Cache.InitDatasetItem(cache, address/CacheLineSize)
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if d.Cache.HasJIT() {
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d.Cache.InitDatasetItemJIT(cache, address/CacheLineSize)
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} else {
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d.Cache.InitDatasetItem(cache, address/CacheLineSize)
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}
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for i := range r {
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r[i] ^= cache[i]
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@ -8,6 +8,9 @@ import (
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)
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func (f ProgramFunc) Execute(rl *RegisterLine) {
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if f == nil {
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panic("program is nil")
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}
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memoryPtr := &f
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fun := *(*func(rl *RegisterLine))(unsafe.Pointer(&memoryPtr))
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45
vm.go
45
vm.go
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@ -44,10 +44,10 @@ type REG struct {
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}
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type VM struct {
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State_start [64]byte
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buffer [RANDOMX_PROGRAM_SIZE*8 + 16*8]byte // first 128 bytes are entropy below rest are program bytes
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Prog []byte
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ScratchPad [ScratchpadSize]byte
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StateStart [64]byte
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buffer [RANDOMX_PROGRAM_SIZE*8 + 16*8]byte // first 128 bytes are entropy below rest are program bytes
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Prog []byte
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ScratchPad [ScratchpadSize]byte
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ByteCode [RANDOMX_PROGRAM_SIZE]InstructionByteCode
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@ -71,8 +71,8 @@ func MaskRegisterExponentMantissa(f float64, mode uint64) float64 {
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}
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type Config struct {
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eMask [2]uint64
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readReg0, readReg1, readReg2, readReg3 uint64
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eMask [2]uint64
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readReg [4]uint64
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}
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type REGISTER_FILE struct {
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@ -82,15 +82,14 @@ type REGISTER_FILE struct {
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a [4][2]float64
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}
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type MemoryRegisters struct {
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mx, ma uint64 //addr_t mx, ma;
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mempry uint64 // uint8_t* memory = nullptr;
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mx, ma uint64
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}
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const LOW = 0
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const HIGH = 1
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// calculate hash based on input
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func (vm *VM) Run(input_hash *[64]byte) {
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func (vm *VM) Run(input_hash [64]byte) {
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//fmt.Printf("%x \n", input_hash)
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@ -112,14 +111,13 @@ func (vm *VM) Run(input_hash *[64]byte) {
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vm.mem.ma = vm.entropy[8] & CacheLineAlignMask
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vm.mem.mx = vm.entropy[10]
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addressRegisters := vm.entropy[12]
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vm.config.readReg0 = 0 + (addressRegisters & 1)
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addressRegisters >>= 1
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vm.config.readReg1 = 2 + (addressRegisters & 1)
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addressRegisters >>= 1
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vm.config.readReg2 = 4 + (addressRegisters & 1)
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addressRegisters >>= 1
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vm.config.readReg3 = 6 + (addressRegisters & 1)
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for i := range vm.config.readReg {
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vm.config.readReg[i] = uint64(i*2) + (addressRegisters & 1)
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addressRegisters >>= 1
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}
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vm.datasetOffset = (vm.entropy[13] % (DATASETEXTRAITEMS + 1)) * CacheLineSize
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vm.config.eMask[LOW] = getFloatMask(vm.entropy[14])
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vm.config.eMask[HIGH] = getFloatMask(vm.entropy[15])
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@ -134,7 +132,7 @@ func (vm *VM) Run(input_hash *[64]byte) {
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var rlCache RegisterLine
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for ic := 0; ic < RANDOMX_PROGRAM_ITERATIONS; ic++ {
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spMix := vm.reg.r[vm.config.readReg0] ^ vm.reg.r[vm.config.readReg1]
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spMix := vm.reg.r[vm.config.readReg[0]] ^ vm.reg.r[vm.config.readReg[1]]
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spAddr0 ^= spMix
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spAddr0 &= ScratchpadL3Mask64
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@ -146,21 +144,20 @@ func (vm *VM) Run(input_hash *[64]byte) {
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}
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for i := uint64(0); i < REGISTERCOUNTFLT; i++ {
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vm.reg.f[i][LOW] = vm.Load32F(spAddr1 + 8*i)
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vm.reg.f[i][HIGH] = vm.Load32F(spAddr1 + 8*i + 4)
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vm.reg.f[i] = vm.Load32FA(spAddr1 + 8*i)
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}
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for i := uint64(0); i < REGISTERCOUNTFLT; i++ {
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vm.reg.e[i][LOW] = vm.Load32F(spAddr1 + 8*(i+REGISTERCOUNTFLT))
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vm.reg.e[i][HIGH] = vm.Load32F(spAddr1 + 8*(i+REGISTERCOUNTFLT) + 4)
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vm.reg.e[i] = vm.Load32FA(spAddr1 + 8*(i+REGISTERCOUNTFLT))
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vm.reg.e[i][LOW] = MaskRegisterExponentMantissa(vm.reg.e[i][LOW], vm.config.eMask[LOW])
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vm.reg.e[i][HIGH] = MaskRegisterExponentMantissa(vm.reg.e[i][HIGH], vm.config.eMask[HIGH])
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}
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// todo: pass register file directly!
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vm.InterpretByteCode()
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vm.mem.mx ^= vm.reg.r[vm.config.readReg2] ^ vm.reg.r[vm.config.readReg3]
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vm.mem.mx ^= vm.reg.r[vm.config.readReg[2]] ^ vm.reg.r[vm.config.readReg[3]]
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vm.mem.mx &= CacheLineAlignMask
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vm.Dataset.PrefetchDataset(vm.datasetOffset + vm.mem.mx)
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@ -214,7 +211,7 @@ func (vm *VM) CalculateHash(input []byte, output *[32]byte) {
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hash512, _ := blake2b.New512(nil)
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for chain := 0; chain < RANDOMX_PROGRAM_COUNT-1; chain++ {
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vm.Run(&tempHash)
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vm.Run(tempHash)
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hash512.Reset()
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for i := range vm.reg.r {
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@ -247,7 +244,7 @@ func (vm *VM) CalculateHash(input []byte, output *[32]byte) {
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}
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// final loop executes here
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vm.Run(&tempHash)
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vm.Run(tempHash)
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// now hash the scratch pad and place into register a
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aes.HashAes1Rx4(vm.ScratchPad[:], &tempHash)
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@ -30,11 +30,11 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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package randomx
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import (
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"fmt"
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"git.gammaspectra.live/P2Pool/go-randomx/v2/asm"
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"math"
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"math/bits"
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"unsafe"
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)
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import "math"
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import "math/bits"
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import "encoding/binary"
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//reference https://github.com/tevador/RandomX/blob/master/doc/specs.md#51-instruction-encoding
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@ -156,11 +156,11 @@ func (vm *VM) Compile_TO_Bytecode() {
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ibc.idst = &vm.reg.r[dst]
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if dst != RegisterNeedsDisplacement {
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ibc.isrc = &vm.reg.r[src]
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ibc.shift = uint16((instr.Mod() >> 2) % 4)
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ibc.shift = (instr.Mod() >> 2) % 4
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ibc.imm = 0
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} else {
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ibc.isrc = &vm.reg.r[src]
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ibc.shift = uint16((instr.Mod() >> 2) % 4)
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ibc.shift = (instr.Mod() >> 2) % 4
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ibc.imm = signExtend2sCompl(instr.IMM())
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}
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registerUsage[dst] = i
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@ -534,7 +534,7 @@ type InstructionByteCode struct {
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simm int64
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Opcode VM_Instruction_Type
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target int16
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shift uint16
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shift uint8
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memMask uint32
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/*
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union {
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@ -563,179 +563,105 @@ func (ibc *InstructionByteCode) getScratchpadAddress() uint64 {
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return (*ibc.isrc + ibc.imm) & uint64(ibc.memMask)
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}
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func (vm *VM) Load64(addr uint64) uint64 {
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return binary.LittleEndian.Uint64(vm.ScratchPad[addr:])
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}
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func (vm *VM) Load32(addr uint64) uint32 {
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return binary.LittleEndian.Uint32(vm.ScratchPad[addr:])
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func (ibc *InstructionByteCode) getScratchpadDestAddress() uint64 {
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return (*ibc.idst + ibc.imm) & uint64(ibc.memMask)
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}
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func (vm *VM) Load32F(addr uint64) float64 {
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return float64(int32(vm.Load32(addr)))
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func (vm *VM) Load64(addr uint64) uint64 {
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return *(*uint64)(unsafe.Pointer(&vm.ScratchPad[addr]))
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}
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func (vm *VM) Load32(addr uint64) uint32 {
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return *(*uint32)(unsafe.Pointer(&vm.ScratchPad[addr]))
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}
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func (vm *VM) Load32F(addr uint64) (lo, hi float64) {
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a := *(*[2]int32)(unsafe.Pointer(&vm.ScratchPad[addr]))
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return float64(a[LOW]), float64(a[HIGH])
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}
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func (vm *VM) Load32FA(addr uint64) [2]float64 {
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a := *(*[2]int32)(unsafe.Pointer(&vm.ScratchPad[addr]))
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return [2]float64{float64(a[LOW]), float64(a[HIGH])}
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}
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func (vm *VM) InterpretByteCode() {
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for pc := 0; pc < RANDOMX_PROGRAM_SIZE; pc++ {
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ibc := &vm.ByteCode[pc]
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//fmt.Printf("PCLOOP %d opcode %d %s dst %d src %d\n",pc,ibc.Opcode, Names[ibc.Opcode], ibc.dst, ibc.src)
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switch ibc.Opcode {
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case VM_IADD_RS:
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*ibc.idst += (*ibc.isrc << ibc.shift) + ibc.imm
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//panic("VM_IADD_RS")
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case VM_IADD_M:
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*ibc.idst += vm.Load64(ibc.getScratchpadAddress())
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//panic("VM_IADD_M")
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case VM_ISUB_R:
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*ibc.idst -= *ibc.isrc
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//panic("VM_ISUB_R")
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case VM_ISUB_M:
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*ibc.idst -= vm.Load64(ibc.getScratchpadAddress())
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//panic("VM_ISUB_M")
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case VM_IMUL_R: // also handles imul_rcp
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case VM_IMUL_R:
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||||
// also handles imul_rcp
|
||||
*ibc.idst *= *ibc.isrc
|
||||
|
||||
//panic("VM_IMUL_R")
|
||||
case VM_IMUL_M:
|
||||
*ibc.idst *= vm.Load64(ibc.getScratchpadAddress())
|
||||
|
||||
//panic("VM_IMUL_M")
|
||||
case VM_IMULH_R:
|
||||
|
||||
*ibc.idst, _ = bits.Mul64(*ibc.idst, *ibc.isrc)
|
||||
|
||||
// panic("VM_IMULH_R")
|
||||
case VM_IMULH_M:
|
||||
*ibc.idst, _ = bits.Mul64(*ibc.idst, vm.Load64(ibc.getScratchpadAddress()))
|
||||
// fmt.Printf("%x \n",*ibc.idst )
|
||||
// panic("VM_IMULH_M")
|
||||
case VM_ISMULH_R:
|
||||
*ibc.idst = uint64(smulh(int64(*ibc.idst), int64(*ibc.isrc)))
|
||||
// fmt.Printf("dst %x\n", *ibc.idst)
|
||||
// panic("VM_ISMULH_R")
|
||||
*ibc.idst = smulh(int64(*ibc.idst), int64(*ibc.isrc))
|
||||
case VM_ISMULH_M:
|
||||
*ibc.idst = uint64(smulh(int64(*ibc.idst), int64(vm.Load64(ibc.getScratchpadAddress()))))
|
||||
//fmt.Printf("%x \n",*ibc.idst )
|
||||
// panic("VM_ISMULH_M")
|
||||
*ibc.idst = smulh(int64(*ibc.idst), int64(vm.Load64(ibc.getScratchpadAddress())))
|
||||
case VM_INEG_R:
|
||||
*ibc.idst = (^(*ibc.idst)) + 1 // 2's complement negative
|
||||
|
||||
//panic("VM_INEG_R")
|
||||
case VM_IXOR_R:
|
||||
*ibc.idst ^= *ibc.isrc
|
||||
|
||||
case VM_IXOR_M:
|
||||
*ibc.idst ^= vm.Load64(ibc.getScratchpadAddress())
|
||||
|
||||
//panic("VM_IXOR_M")
|
||||
case VM_IROR_R:
|
||||
*ibc.idst = bits.RotateLeft64(*ibc.idst, 0-int(*ibc.isrc&63))
|
||||
|
||||
//panic("VM_IROR_R")
|
||||
|
||||
case VM_IROL_R:
|
||||
*ibc.idst = bits.RotateLeft64(*ibc.idst, int(*ibc.isrc&63))
|
||||
|
||||
case VM_ISWAP_R:
|
||||
*ibc.idst, *ibc.isrc = *ibc.isrc, *ibc.idst
|
||||
//fmt.Printf("%x %x\n",*ibc.idst, *ibc.isrc )
|
||||
//panic("VM_ISWAP_R")
|
||||
case VM_FSWAP_R:
|
||||
//TODO: could be F+E
|
||||
|
||||
ibc.fdst[HIGH], ibc.fdst[LOW] = ibc.fdst[LOW], ibc.fdst[HIGH]
|
||||
// fmt.Printf("%+v \n",ibc.fdst )
|
||||
// panic("VM_FSWAP_R")
|
||||
case VM_FADD_R:
|
||||
ibc.fdst[LOW] += ibc.fsrc[LOW]
|
||||
ibc.fdst[HIGH] += ibc.fsrc[HIGH]
|
||||
|
||||
//panic("VM_FADD_R")
|
||||
case VM_FADD_M:
|
||||
ibc.fdst[LOW] += vm.Load32F(ibc.getScratchpadAddress() + 0)
|
||||
ibc.fdst[HIGH] += vm.Load32F(ibc.getScratchpadAddress() + 4)
|
||||
|
||||
//panic("VM_FADD_M")
|
||||
lo, hi := vm.Load32F(ibc.getScratchpadAddress())
|
||||
ibc.fdst[LOW] += lo
|
||||
ibc.fdst[HIGH] += hi
|
||||
case VM_FSUB_R:
|
||||
ibc.fdst[LOW] -= ibc.fsrc[LOW]
|
||||
ibc.fdst[HIGH] -= ibc.fsrc[HIGH]
|
||||
|
||||
//fmt.Printf("fdst float %+v\n", ibc.fdst )
|
||||
//panic("VM_FSUB_R")
|
||||
case VM_FSUB_M:
|
||||
ibc.fdst[LOW] -= vm.Load32F(ibc.getScratchpadAddress() + 0)
|
||||
ibc.fdst[HIGH] -= vm.Load32F(ibc.getScratchpadAddress() + 4)
|
||||
|
||||
//panic("VM_FSUB_M")
|
||||
case VM_FSCAL_R: // no dependent on rounding modes
|
||||
//mask := math.Float64frombits(0x80F0000000000000)
|
||||
lo, hi := vm.Load32F(ibc.getScratchpadAddress())
|
||||
ibc.fdst[LOW] -= lo
|
||||
ibc.fdst[HIGH] -= hi
|
||||
case VM_FSCAL_R:
|
||||
// no dependent on rounding modes
|
||||
ibc.fdst[LOW] = math.Float64frombits(math.Float64bits(ibc.fdst[LOW]) ^ 0x80F0000000000000)
|
||||
ibc.fdst[HIGH] = math.Float64frombits(math.Float64bits(ibc.fdst[HIGH]) ^ 0x80F0000000000000)
|
||||
|
||||
//fmt.Printf("fdst float %+v\n", ibc.fdst )
|
||||
//panic("VM_FSCA_M")
|
||||
case VM_FMUL_R:
|
||||
ibc.fdst[LOW] *= ibc.fsrc[LOW]
|
||||
ibc.fdst[HIGH] *= ibc.fsrc[HIGH]
|
||||
|
||||
//panic("VM_FMUL_R")
|
||||
case VM_FDIV_M:
|
||||
ibc.fdst[LOW] /= MaskRegisterExponentMantissa(vm.Load32F(ibc.getScratchpadAddress()+0), vm.config.eMask[LOW])
|
||||
ibc.fdst[HIGH] /= MaskRegisterExponentMantissa(vm.Load32F(ibc.getScratchpadAddress()+4), vm.config.eMask[HIGH])
|
||||
|
||||
//panic("VM_FDIV_M")
|
||||
lo, hi := vm.Load32F(ibc.getScratchpadAddress())
|
||||
ibc.fdst[LOW] /= MaskRegisterExponentMantissa(lo, vm.config.eMask[LOW])
|
||||
ibc.fdst[HIGH] /= MaskRegisterExponentMantissa(hi, vm.config.eMask[HIGH])
|
||||
case VM_FSQRT_R:
|
||||
ibc.fdst[LOW] = math.Sqrt(ibc.fdst[LOW])
|
||||
ibc.fdst[HIGH] = math.Sqrt(ibc.fdst[HIGH])
|
||||
|
||||
// panic("VM_FSQRT")
|
||||
case VM_CBRANCH:
|
||||
//fmt.Printf("pc %d src %x imm %x\n",pc ,*ibc.isrc, ibc.imm)
|
||||
*ibc.isrc += ibc.imm
|
||||
//fmt.Printf("pc %d\n",pc)
|
||||
if (*ibc.isrc & uint64(ibc.memMask)) == 0 {
|
||||
pc = int(ibc.target)
|
||||
|
||||
}
|
||||
|
||||
// fmt.Printf("pc %d\n",pc)
|
||||
//panic("VM_CBRANCH")
|
||||
case VM_CFROUND:
|
||||
|
||||
tmp := (bits.RotateLeft64(*ibc.isrc, 0-int(ibc.imm))) % 4 // rotate right
|
||||
asm.SetRoundingMode(asm.RoundingMode(tmp))
|
||||
|
||||
//panic("round not implemented")
|
||||
//panic("VM_CFROUND")
|
||||
case VM_ISTORE:
|
||||
binary.LittleEndian.PutUint64(vm.ScratchPad[(*ibc.idst+ibc.imm)&uint64(ibc.memMask):], *ibc.isrc)
|
||||
|
||||
//panic("VM_ISTOREM")
|
||||
|
||||
case VM_NOP: // we do nothing
|
||||
|
||||
default:
|
||||
panic("instruction not implemented")
|
||||
|
||||
}
|
||||
/*fmt.Printf("REGS ")
|
||||
for j := 0; j <7;j++ {
|
||||
fmt.Printf("%16x, " , vm.reg.r[j])
|
||||
}
|
||||
fmt.Printf("\n")
|
||||
*/
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
var umm888_ = fmt.Sprintf("")
|
||||
|
|
|
|||
Loading…
Reference in a new issue