676 lines
14 KiB
C
Executable File
676 lines
14 KiB
C
Executable File
#ifndef __BP_CMD_H__
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#define __BP_CMD_H__
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//#define FW_HEADER_DEF 1
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#ifndef FW_HEADER_DEF
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typedef unsigned int U32_T; /* 32-bit unsigned */
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typedef unsigned short int U16_T; /* 16-bit unsigned */
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typedef unsigned char U8_T; /* 8-bit unsigned */
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#endif
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typedef U8_T byte;
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#ifndef FW_HEADER_DEF
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#pragma pack(push) /* push current alignment to stack */
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#pragma pack(1) /* set alignment to 1 byte boundary */
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#endif
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/******************************************************\
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* *
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* COMMUNICATION PROTOCOL SPECIFICATION *
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* *
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* <COMMAND_ID><COMMAND_LEN><COMMAND_DATA> *
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* *
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\******************************************************/
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/*
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* BP cmd IDs
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*/
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#define CMD_GET_BYPASS_CAPS 1
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#define CMD_GET_WD_SET_CAPS 2
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#define CMD_SET_BYPASS 3
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#define CMD_GET_BYPASS 4
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#define CMD_GET_BYPASS_CHANGE 5
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#define CMD_SET_BYPASS_WD 6
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#define CMD_GET_BYPASS_WD 7
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#define CMD_GET_WD_EXPIRE_TIME 8
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#define CMD_RESET_BYPASS_WD_TIMER 9
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#define CMD_SET_DIS_BYPASS 10
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#define CMD_GET_DIS_BYPASS 11
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#define CMD_SET_BYPASS_PWOFF 12
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#define CMD_GET_BYPASS_PWOFF 13
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#define CMD_SET_BYPASS_PWUP 14
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#define CMD_GET_BYPASS_PWUP 15
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#define CMD_SET_STD_NIC 16
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#define CMD_GET_STD_NIC 17
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#define CMD_SET_TAP 18
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#define CMD_GET_TAP 19
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#define CMD_GET_TAP_CHANGE 20
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#define CMD_SET_DIS_TAP 21
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#define CMD_GET_DIS_TAP 22
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#define CMD_SET_TAP_PWUP 23
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#define CMD_GET_TAP_PWUP 24
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#define CMD_SET_WD_EXP_MODE 25
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#define CMD_GET_WD_EXP_MODE 26
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#define CMD_SET_DISC 27
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#define CMD_GET_DISC 28
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#define CMD_GET_DISC_CHANGE 29
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#define CMD_SET_DIS_DISC 30
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#define CMD_GET_DIS_DISC 31
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#define CMD_SET_DISC_PWUP 32
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#define CMD_GET_DISC_PWUP 33
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#define CMD_SET_DISC_PWOFF 34
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#define CMD_GET_DISC_PWOFF 35
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#define CMD_GET_BYPASS_CAPS_EX 36
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#define CMD_SET_HOST_PWOFF_MODE 37
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#define CMD_GET_HOST_PWOFF_MODE 38
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#define CMD_SET_HOST_PWUP_MODE 39
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#define CMD_GET_HOST_PWUP_MODE 40
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#define CMD_SET_DISC_PORT 41
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#define CMD_GET_DISC_PORT 42
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#define CMD_SET_DISC_PORT_PWUP 43
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#define CMD_GET_DISC_PORT_PWUP 44
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#define CMD_SET_WD_RST_RESTORE_MODE 45
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#define CMD_GET_WD_RST_RESTORE_MODE 46
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#define CMD_SET_TPL 47
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#define CMD_GET_TPL 48
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#define CMD_SET_TX 49
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#define CMD_GET_TX 50
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#define CMD_GET_BYPASS_INFO 100
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#define CMD_GET_BP_WAIT_AT_PWUP 101
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#define CMD_SET_BP_WAIT_AT_PWUP 102
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#define CMD_GET_BP_HW_RESET 103
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#define CMD_SET_BP_HW_RESET 104
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#define CMD_SET_BP_MANUF 105
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//#define CMD_RESERVED 131-132
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#define CMD_GET_DEV_INFO 133
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//#define CMD_RESERVED 132-139
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typedef U8_T cmd_id_t;
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/*
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* BP cmd response codes
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*/
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#define BP_ERR_OK 1
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#define BP_ERR_NOT_CAP 2
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#define BP_ERR_DEV_BUSY 3
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#define BP_ERR_INVAL_DEV_NUM 4
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#define BP_ERR_INVAL_STATE 5
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#define BP_ERR_INVAL_PARAM 6
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#define BP_ERR_UNSUPPORTED_PARAM 7
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#define BP_ERR_INVAL_CMD 8
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#define BP_ERR_UNSUPPORTED_CMD 9
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#define BP_ERR_INTERNAL 10
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#define BP_ERR_UNKNOWN 11
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typedef U8_T cmd_rsp_id_t;
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typedef U8_T cmd_bp_board_t;
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/*
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* BP device info
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*/
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typedef struct _cmd_bp_info_t{
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cmd_bp_board_t dev_id;
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byte fw_ver;
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}cmd_bp_info_t;
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/*
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* Disc port
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*/
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typedef struct _disc_port_t{
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U8_T mode;
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U8_T port_num;
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}disc_port_t;
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/*
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* Tx disable
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*/
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typedef struct _tx_dis_t{
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U8_T mode;
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U8_T port_num;
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}tx_dis_t;
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/*
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* Device info
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*/
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typedef union _cmd_dev_info_t{
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U8_T info_id;
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struct {
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U8_T dev_id;
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U8_T dev_rev;
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U8_T eeprom_ver;
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U8_T eeprom_rev;
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}dev_ver;
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U8_T bds_rev[4];
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U8_T fw_ver[4];
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U8_T hw_ver[4];
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U32_T fw_build;
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union {
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U8_T part0[4];
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U8_T part1[2];
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}mac_addr;
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union {
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U8_T sn0[4];
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U8_T sn1[4];
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U8_T sn2[4];
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U8_T sn3[4];
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}sn;
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}cmd_dev_info_t;
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/*
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* BP command device number
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*/
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#define DEV_NUM_MAX 4
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typedef U8_T cmd_dev_num_t;
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/*
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* BP command data lenth type
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*/
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typedef U8_T cmd_data_len_t;
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/*
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* BP command data structure
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*/
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typedef union _cmd_data_t{
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#if 0
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/*
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* CMD_GET_BYPASS_CAPS
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*/
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/*
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* CMD_GET_BYPASS_CAPS_EX (1st double word)
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*/
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#define BP_CAP BIT0
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#define BP_STATUS_CAP BIT1
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#define BP_STATUS_CHANGE_CAP BIT2
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#define SW_CTL_CAP BIT3
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#define BP_DIS_CAP BIT4
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#define BP_DIS_STATUS_CAP BIT5
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#define STD_NIC_CAP BIT6
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#define BP_PWOFF_ON_CAP BIT7
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#define BP_PWOFF_OFF_CAP BIT8
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#define BP_PWOFF_CTL_CAP BIT9
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#define BP_PWUP_ON_CAP BIT10
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#define BP_PWUP_OFF_CAP BIT11
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#define BP_PWUP_CTL_CAP BIT12
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#define WD_CTL_CAP BIT13
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#define WD_STATUS_CAP BIT14
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#define WD_TIMEOUT_CAP BIT15
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#define TX_CTL_CAP BIT16
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#define TX_STATUS_CAP BIT17
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#define TAP_CAP BIT18
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#define TAP_STATUS_CAP BIT19
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#define TAP_STATUS_CHANGE_CAP BIT20
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#define TAP_DIS_CAP BIT21
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#define TAP_DIS_STATUS_CAP BIT22
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#define TAP_PWUP_ON_CAP BIT23
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#define TAP_PWUP_OFF_CAP BIT24
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#define TAP_PWUP_CTL_CAP BIT25
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#define NIC_CAP_NEG BIT26
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#define TPL_CAP BIT27
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#define DISC_CAP BIT28
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#define DISC_DIS_CAP BIT29
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#define DISC_PWUP_CTL_CAP BIT30
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#define BP_CAPS_EX_CAP BIT31
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#endif
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U32_T bypass_caps;
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/*
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* CMD_GET_BYPASS_CAPS_EX (2nd double word)
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*/
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#if 0
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#define DISC_PWOFF_CTL_CAP BIT0
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#define BP_HOST_PWOFF_CTL_CAP BIT1
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#define BP_HOST_PWUP_CTL_CAP BIT2
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#define DISC_HOST_PWOFF_CTL_CAP BIT3
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#define DISC_HOST_PWUP_CTL_CAP BIT4
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#define NORMAL_HOST_PWOFF_CTL_CAP BIT5
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#define NORMAL_HOST_PWUP_CTL_CAP BIT6
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#define TAP_HOST_PWOFF_CTL_CAP BIT7
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#define TAP_HOST_PWUP_CTL_CAP BIT8
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#define DISC_PORT_CAP BIT9
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#define DISC_PORT_PWUP_CTL_CAP BIT10
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#endif
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U32_T bypass_caps_ex;
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/*
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* CMD_GET_WD_SET_CAPS
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*/
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/* --------------------------------------------------------------------------------------
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* Bit feature description Products
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* ---------------------------------------------------------------------------------------
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* 0-3 WD_MIN_TIME The interface WD minimal time period in PXG2/4BP - 5 (500mS)
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* 100mS units All the other
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* products - 1(100mS)
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* ---------------------------------------------------------------------------------------
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* 4 WD_STEP_TIME The steps of the WD timer in PXG2/4BP - 0
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* 0 - for linear steps (WD_MIN_TIME * X) All the other
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* 1 - for multiply by 2 from previous step products - 1
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* (WD_MIN_TIME * 2^X)
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* ---------------------------------------------------------------------------------------
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* 5-8 WD_STEP_COUNT Number of register bits available for PXG2/4BP -7
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* configuring the WD timer. From that the All the other
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* number of steps the WD timer will have is products - 4
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* 2^X (X number of bits available for
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* defining the value)
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* ---------------------------------------------------------------------------------------
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* 9-31 RESERVED Reserved, should be ignored.
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* -------------------------------------------------------------------------------------*/
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U32_T wd_set_caps;
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/*
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* CMD_SET_BYPASS
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*/
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/*
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* CMD_GET_BYPASS
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*/
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/* #define BYPASS_OFF 0 */
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/* #define BYPASS_ON 1 */
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U8_T bypass_mode;
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/*
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* CMD_GET_BYPASS_CHANGE
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*/
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#define BYPASS_NOT_CHANGED 0
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#define BYPASS_CHANGED 1
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U8_T bypass_change;
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/*
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* CMD_SET_BYPASS_WD
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*/
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/*
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* CMD_GET_BYPASS_WD
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*/
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U32_T timeout;
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U32_T timeout_set;
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/*
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* CMD_GET_WD_EXPIRE_TIME
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*/
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U32_T time_left;
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/*
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* CMD_SET_DIS_BYPASS
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*/
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/*
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* CMD_GET_DIS_BYPASS
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*/
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#define DIS_BYPASS_ENABLE 0
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#define DIS_BYPASS_DISABLE 1
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U8_T dis_bypass;
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/*
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* CMD_SET_BYPASS_PWOFF
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*/
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/*
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* CMD_GET_BYPASS_PWOFF
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*/
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#define BYPASS_PWOFF_DIS 0
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#define BYPASS_PWOFF_EN 1
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U8_T bypass_pwoff;
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/*
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* CMD_SET_BYPASS_PWUP
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*/
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/*
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* CMD_GET_BYPASS_PWUP
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*/
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#define BYPASS_PWUP_DIS 0
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#define BYPASS_PWUP_EN 1
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U8_T bypass_pwup;
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/*
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* CMD_SET_HOST_PWOFF_MODE
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*/
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/*
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* CMD_GET_HOST_PWOFF_MODE
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*/
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#define HOST_PWOFF_MODE_BYPASS 0
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#define HOST_PWOFF_MODE_TAP 1
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#define HOST_PWOFF_MODE_DISC 2
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#define HOST_PWOFF_MODE_NORMAL 3
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U8_T host_pwoff_mode;
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/*
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* CMD_SET_HOST_PWUP_MODE
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*/
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/*
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* CMD_GET_HOST_PWUP_MODE
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*/
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#define HOST_PWUP_MODE_BYPASS 0
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#define HOST_PWUP_MODE_TAP 1
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#define HOST_PWUP_MODE_DISC 2
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#define HOST_PWUP_MODE_NORMAL 3
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U8_T host_pwup_mode;
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/*
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* CMD_SET_STD_NIC
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*/
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/*
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* CMD_GET_STD_NIC
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*/
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#define STD_NIC_DIS 0
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#define STD_NIC_EN 1
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U8_T std_nic;
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/*
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* CMD_SET_TAP
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*/
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/*
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* CMD_GET_TAP
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*/
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/* #define TAP_OFF 0 */
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/* #define TAP_ON 1 */
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U8_T tap_mode;
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/*
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* CMD_GET_TAP_CHANGE
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*/
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#define TAP_NOT_CHANGED 0
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#define TAP_CHANGED 1
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U8_T tap_change;
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/*
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* CMD_SET_DIS_TAP
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*/
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/*
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* CMD_GET_DIS_TAP
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*/
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#define DIS_TAP_ENABLE 0
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#define DIS_TAP_DISABLE 1
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U8_T dis_tap;
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/*
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* CMD_SET_TAP_PWUP
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*/
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/*
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* CMD_GET_TAP_PWUP
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*/
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#define TAP_PWUP_DIS 0
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#define TAP_PWUP_EN 1
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U8_T tap_pwup;
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/*
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* CMD_SET_WD_EXP_MODE
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*/
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/*
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* CMD_GET_WD_EXP_MODE
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*/
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#define WD_EXP_MODE_BYPASS 0
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#define WD_EXP_MODE_TAP 1
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#define WD_EXP_MODE_DISC 2
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#define WD_EXP_MODE_NORMAL 3
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U8_T wd_exp_mode;
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/*
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* CMD_SET_WD_RST_RESTORE_MODE
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*/
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/*
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* CMD_GET_WD_RST_RESTORE_MODE
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*/
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#define WD_RST_RESTORE_MODE_BYPASS 0
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#define WD_RST_RESTORE_MODE_TAP 1
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#define WD_RST_RESTORE_MODE_DISC 2
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#define WD_RST_RESTORE_MODE_NORMAL 3
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#define WD_RST_RESTORE_MODE_LAST_STATE 4
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#define WD_RST_RESTORE_MODE_STAY_OFF 5
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U8_T wd_rst_restore_mode;
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/*
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* CMD_SET_DISC
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*/
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/*
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* CMD_GET_DISC
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*/
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/* #define DISC_OFF 0 */
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/* #define DISC_ON 1 */
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U8_T disc_mode;
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/*
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* CMD_GET_DISC_CHANGE
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*/
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#define DISC_NOT_CHANGED 0
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#define DISC_CHANGED 1
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U8_T disc_change;
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/*
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* CMD_SET_DIS_DISC
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*/
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/*
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* CMD_GET_DIS_DISC
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*/
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#define DIS_DISC_ENABLE 0
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#define DIS_DISC_DISABLE 1
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U8_T dis_disc;
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/*
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* CMD_SET_DISC_PWUP
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*/
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/*
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* CMD_GET_DISC_PWUP
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*/
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#define DISC_PWUP_DIS 0
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#define DISC_PWUP_EN 1
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U8_T disc_pwup;
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/*
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* CMD_SET_DISC_PWOFF
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*/
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/*
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* CMD_GET_DISC_PWOFF
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*/
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#define DISC_PWOFF_DIS 0
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#define DISC_PWOFF_EN 1
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U8_T disc_pwoff;
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/*
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* CMD_SET_DISC_PORT
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*/
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/*
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* CMD_GET_DISC_PORT
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*/
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#define DISC_PORT_OFF 0
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#define DISC_PORT_ON 1
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disc_port_t disc_port;
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/*
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* CMD_SET_DISC_PORT_PWUP
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*/
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/*
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* CMD_GET_DISC_PORT_PWUP
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*/
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#define DISC_PORT_PWUP_DIS 0
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#define DISC_PORT_PWUP_EN 1
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disc_port_t disc_port_pwup;
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/*
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* CMD_SET_TPL
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*/
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/*
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* CMD_GET_TPL
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*/
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#define TPL_OFF 0
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#define TPL_ON 1
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U8_T tpl_mode;
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/*
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* CMD_SET_TX
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*/
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/*
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* CMD_GET_TX
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*/
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#define TX_OFF 0
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#define TX_ON 1
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tx_dis_t tx_dis;
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/*
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* CMD_GET_BYPASS_INFO
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*/
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cmd_bp_info_t bypass_info;
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/*
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* CMD_GET_DEV_INFO
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*/
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#define DEV_INFO_DEV_VER 0
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#define DEV_INFO_FW_VER 1
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#define DEV_INFO_MAC_PART0 2
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#define DEV_INFO_MAC_PART1 3
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#define DEV_INFO_SN_PART0 4
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#define DEV_INFO_SN_PART1 5
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#define DEV_INFO_SN_PART2 6
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|
#define DEV_INFO_SN_PART3 7
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|
#define DEV_INFO_FW_BUILD 8
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#define DEV_INFO_BDS_REV 9
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#define DEV_INFO_HW_REV 10
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|
|
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cmd_dev_info_t dev_info;
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|
|
|
|
|
/*
|
|
* CMD_GET_BP_WAIT_AT_PWUP
|
|
*/
|
|
/*
|
|
* CMD_SET_BP_WAIT_AT_PWUP
|
|
*/
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|
/* #define BP_WAIT_AT_PWUP_DIS 0 */
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|
/* #define BP_WAIT_AT_PWUP_EN 1 */
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|
U8_T bp_wait_at_pwup;
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|
|
|
|
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/*
|
|
* CMD_GET_BP_HW_RESET
|
|
*/
|
|
/*
|
|
* CMD_SET_BP_HW_RESET
|
|
*/
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|
/* #define BP_HW_RESET_DIS 0 */
|
|
/* #define BP_HW_RESET_EN 1 */
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|
|
|
U8_T bp_hw_reset;
|
|
|
|
}cmd_data_t;
|
|
|
|
|
|
/******************************************************\
|
|
* *
|
|
* <DEV_NUM><COMMAND_ID><COMMAND_LEN><COMMAND_DATA> *
|
|
* *
|
|
\******************************************************/
|
|
#define BP_CMD_PACKET_SIZE ( sizeof(cmd_dev_num_t) \
|
|
+ sizeof(cmd_id_t) \
|
|
+ sizeof(cmd_data_len_t) \
|
|
+ sizeof(cmd_data_t) )
|
|
|
|
typedef union _bp_cmd_t
|
|
{
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|
byte cmd_bytes[BP_CMD_PACKET_SIZE]; // For Byte Access
|
|
|
|
struct {
|
|
cmd_dev_num_t cmd_dev_num;
|
|
cmd_id_t cmd_id;
|
|
cmd_data_len_t cmd_data_len;
|
|
cmd_data_t cmd_data;
|
|
}cmd;
|
|
|
|
}bp_cmd_t;
|
|
|
|
|
|
/******************************************************\
|
|
* *
|
|
* <RET_CODE><COMMAND_LEN><COMMAND_DATA> *
|
|
* *
|
|
\******************************************************/
|
|
#define BP_RSP_PACKET_SIZE ( sizeof(cmd_rsp_id_t) \
|
|
+ sizeof(cmd_data_len_t) \
|
|
+ sizeof(cmd_data_t) )
|
|
|
|
typedef union _bp_cmd_rsp_t
|
|
{
|
|
byte cmd_bytes[BP_RSP_PACKET_SIZE]; // For Byte Access
|
|
|
|
struct {
|
|
cmd_rsp_id_t rsp_id;
|
|
cmd_data_len_t rsp_data_len;
|
|
cmd_data_t rsp_data;
|
|
}rsp;
|
|
|
|
}bp_cmd_rsp_t;
|
|
|
|
#ifndef FW_HEADER_DEF
|
|
#pragma pack(pop) /* push current alignment to stack */
|
|
#endif
|
|
|
|
#endif /* End of __BP_CMD_H__ */
|