Upstream release 1.0.13
This commit is contained in:
Silicom Ltd
Shoghi
commit
ff9dc94344
170
Makefile
Executable file
170
Makefile
Executable file
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@ -0,0 +1,170 @@
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################################################################################
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||||
#
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||||
# Intel(R) 10GbE PCI Express Linux Network Driver
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||||
# Copyright(c) 1999 - 2017 Intel Corporation.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
#
|
||||
# The full GNU General Public License is included in this distribution in
|
||||
# the file called "COPYING".
|
||||
#
|
||||
# Contact Information:
|
||||
# Linux NICS <linux.nics@intel.com>
|
||||
# e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
|
||||
# Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
|
||||
# Silicom, Ltd
|
||||
################################################################################
|
||||
|
||||
MOD_VER=1.0.13
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|
||||
PRDPATH_UTIL=/bin
|
||||
TARGET_UTIL=bprdctl_util
|
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OBJS_UTIL = bprd_util.o
|
||||
|
||||
ifneq ($(KERNELRELEASE),)
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||||
# kbuild part of makefile
|
||||
#
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||||
# Makefile for the Intel(R) 10GbE PCI Express Linux Network Driver
|
||||
#
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||||
|
||||
obj-$(CONFIG_BPRDCTL_MOD) += bprdctl_mod.o
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||||
|
||||
define bprdctl_mod-y
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bprd_mod.o
|
||||
endef
|
||||
bprdctl_mod-y := $(strip ${bprdctl_mod-y})
|
||||
|
||||
|
||||
else # ifneq($(KERNELRELEASE),)
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||||
# normal makefile
|
||||
|
||||
DRIVER := bprdctl_mod
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||||
|
||||
ifeq (,$(wildcard common.mk))
|
||||
$(error Cannot find common.mk build rules)
|
||||
else
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||||
include common.mk
|
||||
endif
|
||||
|
||||
# Check that kernel version is at least 2.6.0, since we don't support 2.4.x
|
||||
# kernels with the BPRDCTL driver. We can't use minimum_kver_check since SLES 10
|
||||
# SP4's Make has a bug which causes $(eval) inside an ifeq conditional to error
|
||||
# out. This was fixed in Make 3.81, but SLES 10 SP4 does not have a fix for
|
||||
# this yet.
|
||||
ifeq (0,$(shell [ ${KVER_CODE} -lt $(call get_kvercode,2,6,0) ]; echo "$?"))
|
||||
$(warning *** Aborting the build.)
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||||
$(error This driver is not supported on kernel versions older than 2.6.0)
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||||
endif
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||||
|
||||
######################
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||||
# Kernel Build Macro #
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||||
######################
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||||
|
||||
# customized kernelbuild function
|
||||
#
|
||||
# ${1} is the kernel build target
|
||||
# ${2} may contain extra rules to pass to kernelbuild macro
|
||||
#
|
||||
# We customize the kernelbuild target in order to provide our hack to disable
|
||||
# CONFIG_PTP_1588_CLOCK support should -DNO_PTP_SUPPORT be defined in the extra
|
||||
# cflags given on the command line.
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||||
devkernelbuild = $(call kernelbuild,$(if $(filter -DNO_PTP_SUPPORT,${EXTRA_CFLAGS}),CONFIG_PTP_1588_CLOCK=n) ${2},${1})
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||||
|
||||
###############
|
||||
# Build rules #
|
||||
###############
|
||||
|
||||
# Standard compilation, with regular output
|
||||
default: $(TARGET_UTIL)
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||||
@+$(call devkernelbuild,modules)
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||||
|
||||
# Noisy output, for extra debugging
|
||||
noisy:
|
||||
@+$(call devkernelbuild,modules,V=1)
|
||||
|
||||
# Silence any output generated
|
||||
silent:
|
||||
@+$(call devkernelbuild,modules,>/dev/null)
|
||||
|
||||
# Enable higher warning level
|
||||
checkwarnings: clean
|
||||
@+$(call devkernelbuild,modules,W=1)
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||||
|
||||
# Run sparse static analyzer
|
||||
sparse: clean
|
||||
@+$(call devkernelbuild,modules,C=2 CF="-D__CHECK_ENDIAN__ -Wbitwise -Wcontext")
|
||||
|
||||
# Run coccicheck static analyzer
|
||||
ccc: clean
|
||||
@+$(call devkernelbuild,modules,coccicheck MODE=report))
|
||||
|
||||
|
||||
# Clean the module subdirectories
|
||||
clean:
|
||||
@+$(call devkernelbuild,clean)
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||||
@-rm -rf *.ko
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||||
rm -rf $(OBJS_UTIL) $(TARGET_UTIL)
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||||
|
||||
# Install the modules
|
||||
install: default
|
||||
@echo "Installing modules..."
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||||
@+$(call devkernelbuild,modules_install)
|
||||
@echo "Running depmod..."
|
||||
@$(call cmd_depmod)
|
||||
mkdir -p $(INSTALL_MOD_PATH)$(PRDPATH_UTIL)
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install $(TARGET_UTIL) $(INSTALL_MOD_PATH)$(PRDPATH_UTIL)
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install bprdctl_start $(INSTALL_MOD_PATH)$(PRDPATH_UTIL)
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install bprdctl_stop $(INSTALL_MOD_PATH)$(PRDPATH_UTIL)
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|
||||
$(TARGET_UTIL): $(OBJS_UTIL)
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$(CC) $(OBJS_UTIL) -g -Wall -o $(TARGET_UTIL)
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||||
|
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uninstall:
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||||
rm -f ${INSTALL_MOD_PATH}/lib/modules/${KVER}/${INSTALL_MOD_DIR}/${DRIVER}.ko;
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||||
$(call cmd_depmod)
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||||
if [ -e $(INSTALL_MOD_PATH)$(PRDPATH_UTIL)/$(TARGET_UTIL) ] ; then \
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rm -f $(INSTALL_MOD_PATH)$(PRDPATH_UTIL)/$(TARGET_UTIL) ; \
|
||||
fi
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||||
if [ -e $(INSTALL_MOD_PATH)$(PRDPATH_UTIL)/bprdctl_start ] ; then \
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||||
rm -f $(INSTALL_MOD_PATH)$(PRDPATH_UTIL)/bprdctl_start ; \
|
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fi
|
||||
if [ -e $(INSTALL_MOD_PATH)$(PRDPATH_UTIL)/bprdctl_stop ] ; then \
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||||
rm -f $(INSTALL_MOD_PATH)$(PRDPATH_UTIL)/bprdctl_stop ; \
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||||
fi
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|
||||
########
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||||
# Help #
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||||
########
|
||||
help:
|
||||
@echo 'Cleaning targets:'
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||||
@echo ' clean - Clean files generated by kernel module build'
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||||
@echo 'Build targets:'
|
||||
@echo ' default - Build module(s) with standard verbosity'
|
||||
@echo ' noisy - Build module(s) with V=1 verbosity -- very noisy'
|
||||
@echo ' silent - Build module(s), squelching all output'
|
||||
@echo 'Static Analysis:'
|
||||
@echo ' checkwarnings - Clean, then build module(s) with W=1 warnings enabled'
|
||||
@echo ' sparse - Clean, then check module(s) using sparse'
|
||||
@echo ' ccc - Clean, then check module(s) using coccicheck'
|
||||
@echo 'Other targets:'
|
||||
@echo ' install - Build then install the module(s)'
|
||||
@echo ' uninstall - Uninstall the module(s)'
|
||||
@echo ' help - Display this help message'
|
||||
@echo 'Variables:'
|
||||
@echo ' LINUX_VERSION - Debug tool to force kernel LINUX_VERSION_CODE. Use at your own risk.'
|
||||
@echo ' W=N - Kernel variable for setting warning levels'
|
||||
@echo ' V=N - Kernel variable for setting output verbosity'
|
||||
@echo ' INSTALL_MOD_PATH - Add prefix for the module installation path'
|
||||
@echo ' Other variables may be available for tuning make process, see'
|
||||
@echo ' Kernel Kbuild documentation for more information'
|
||||
|
||||
.PHONY: default noisy clean silent sparse ccc install uninstall help
|
||||
|
||||
endif # ifneq($(KERNELRELEASE),)
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||||
48
bits.h
Executable file
48
bits.h
Executable file
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@ -0,0 +1,48 @@
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|
||||
#ifndef BITS_H
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||||
#define BITS_H
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||||
|
||||
|
||||
|
||||
/******************************************************************************/
|
||||
/* Bit Mask definitions */
|
||||
/******************************************************************************/
|
||||
|
||||
#define BIT_NONE 0x00
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||||
#define BIT_0 0x01
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||||
#define BIT_1 0x02
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||||
#define BIT_2 0x04
|
||||
#define BIT_3 0x08
|
||||
#define BIT_4 0x10
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||||
#define BIT_5 0x20
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||||
#define BIT_6 0x40
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||||
#define BIT_7 0x80
|
||||
#define BIT_8 0x0100
|
||||
#define BIT_9 0x0200
|
||||
#define BIT_10 0x0400
|
||||
#define BIT_11 0x0800
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||||
#define BIT_12 0x1000
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||||
#define BIT_13 0x2000
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||||
#define BIT_14 0x4000
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||||
#define BIT_15 0x8000
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||||
#define BIT_16 0x010000
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||||
#define BIT_17 0x020000
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||||
#define BIT_18 0x040000
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#define BIT_19 0x080000
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#define BIT_20 0x100000
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||||
#define BIT_21 0x200000
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#define BIT_22 0x400000
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#define BIT_23 0x800000
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||||
#define BIT_24 0x01000000
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#define BIT_25 0x02000000
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#define BIT_26 0x04000000
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||||
#define BIT_27 0x08000000
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#define BIT_28 0x10000000
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#define BIT_29 0x20000000
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#define BIT_30 0x40000000
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#define BIT_31 0x80000000
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|
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|
||||
|
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#endif /* BITS_H */
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||||
675
bp_cmd.h
Executable file
675
bp_cmd.h
Executable file
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@ -0,0 +1,675 @@
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|||
#ifndef __BP_CMD_H__
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#define __BP_CMD_H__
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|
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//#define FW_HEADER_DEF 1
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|
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#ifndef FW_HEADER_DEF
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typedef unsigned int U32_T; /* 32-bit unsigned */
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typedef unsigned short int U16_T; /* 16-bit unsigned */
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typedef unsigned char U8_T; /* 8-bit unsigned */
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#endif
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typedef U8_T byte;
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|
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|
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#ifndef FW_HEADER_DEF
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#pragma pack(push) /* push current alignment to stack */
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#pragma pack(1) /* set alignment to 1 byte boundary */
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#endif
|
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|
||||
|
||||
/******************************************************\
|
||||
* *
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||||
* COMMUNICATION PROTOCOL SPECIFICATION *
|
||||
* *
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* <COMMAND_ID><COMMAND_LEN><COMMAND_DATA> *
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* *
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\******************************************************/
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|
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/*
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* BP cmd IDs
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*/
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#define CMD_GET_BYPASS_CAPS 1
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#define CMD_GET_WD_SET_CAPS 2
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#define CMD_SET_BYPASS 3
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#define CMD_GET_BYPASS 4
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#define CMD_GET_BYPASS_CHANGE 5
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#define CMD_SET_BYPASS_WD 6
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#define CMD_GET_BYPASS_WD 7
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#define CMD_GET_WD_EXPIRE_TIME 8
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#define CMD_RESET_BYPASS_WD_TIMER 9
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#define CMD_SET_DIS_BYPASS 10
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#define CMD_GET_DIS_BYPASS 11
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#define CMD_SET_BYPASS_PWOFF 12
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#define CMD_GET_BYPASS_PWOFF 13
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#define CMD_SET_BYPASS_PWUP 14
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#define CMD_GET_BYPASS_PWUP 15
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#define CMD_SET_STD_NIC 16
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#define CMD_GET_STD_NIC 17
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#define CMD_SET_TAP 18
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#define CMD_GET_TAP 19
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#define CMD_GET_TAP_CHANGE 20
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#define CMD_SET_DIS_TAP 21
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#define CMD_GET_DIS_TAP 22
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#define CMD_SET_TAP_PWUP 23
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#define CMD_GET_TAP_PWUP 24
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#define CMD_SET_WD_EXP_MODE 25
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#define CMD_GET_WD_EXP_MODE 26
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#define CMD_SET_DISC 27
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#define CMD_GET_DISC 28
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#define CMD_GET_DISC_CHANGE 29
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||||
#define CMD_SET_DIS_DISC 30
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#define CMD_GET_DIS_DISC 31
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#define CMD_SET_DISC_PWUP 32
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#define CMD_GET_DISC_PWUP 33
|
||||
#define CMD_SET_DISC_PWOFF 34
|
||||
#define CMD_GET_DISC_PWOFF 35
|
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#define CMD_GET_BYPASS_CAPS_EX 36
|
||||
#define CMD_SET_HOST_PWOFF_MODE 37
|
||||
#define CMD_GET_HOST_PWOFF_MODE 38
|
||||
#define CMD_SET_HOST_PWUP_MODE 39
|
||||
#define CMD_GET_HOST_PWUP_MODE 40
|
||||
#define CMD_SET_DISC_PORT 41
|
||||
#define CMD_GET_DISC_PORT 42
|
||||
#define CMD_SET_DISC_PORT_PWUP 43
|
||||
#define CMD_GET_DISC_PORT_PWUP 44
|
||||
#define CMD_SET_WD_RST_RESTORE_MODE 45
|
||||
#define CMD_GET_WD_RST_RESTORE_MODE 46
|
||||
#define CMD_SET_TPL 47
|
||||
#define CMD_GET_TPL 48
|
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#define CMD_SET_TX 49
|
||||
#define CMD_GET_TX 50
|
||||
|
||||
|
||||
#define CMD_GET_BYPASS_INFO 100
|
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#define CMD_GET_BP_WAIT_AT_PWUP 101
|
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#define CMD_SET_BP_WAIT_AT_PWUP 102
|
||||
#define CMD_GET_BP_HW_RESET 103
|
||||
#define CMD_SET_BP_HW_RESET 104
|
||||
#define CMD_SET_BP_MANUF 105
|
||||
//#define CMD_RESERVED 131-132
|
||||
#define CMD_GET_DEV_INFO 133
|
||||
//#define CMD_RESERVED 132-139
|
||||
|
||||
|
||||
typedef U8_T cmd_id_t;
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* BP cmd response codes
|
||||
*/
|
||||
#define BP_ERR_OK 1
|
||||
#define BP_ERR_NOT_CAP 2
|
||||
#define BP_ERR_DEV_BUSY 3
|
||||
#define BP_ERR_INVAL_DEV_NUM 4
|
||||
#define BP_ERR_INVAL_STATE 5
|
||||
#define BP_ERR_INVAL_PARAM 6
|
||||
#define BP_ERR_UNSUPPORTED_PARAM 7
|
||||
#define BP_ERR_INVAL_CMD 8
|
||||
#define BP_ERR_UNSUPPORTED_CMD 9
|
||||
#define BP_ERR_INTERNAL 10
|
||||
#define BP_ERR_UNKNOWN 11
|
||||
|
||||
typedef U8_T cmd_rsp_id_t;
|
||||
|
||||
typedef U8_T cmd_bp_board_t;
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* BP device info
|
||||
*/
|
||||
typedef struct _cmd_bp_info_t{
|
||||
cmd_bp_board_t dev_id;
|
||||
byte fw_ver;
|
||||
}cmd_bp_info_t;
|
||||
|
||||
|
||||
/*
|
||||
* Disc port
|
||||
*/
|
||||
typedef struct _disc_port_t{
|
||||
U8_T mode;
|
||||
U8_T port_num;
|
||||
}disc_port_t;
|
||||
|
||||
|
||||
/*
|
||||
* Tx disable
|
||||
*/
|
||||
typedef struct _tx_dis_t{
|
||||
U8_T mode;
|
||||
U8_T port_num;
|
||||
}tx_dis_t;
|
||||
|
||||
|
||||
/*
|
||||
* Device info
|
||||
*/
|
||||
typedef union _cmd_dev_info_t{
|
||||
U8_T info_id;
|
||||
struct {
|
||||
U8_T dev_id;
|
||||
U8_T dev_rev;
|
||||
U8_T eeprom_ver;
|
||||
U8_T eeprom_rev;
|
||||
}dev_ver;
|
||||
U8_T bds_rev[4];
|
||||
U8_T fw_ver[4];
|
||||
U8_T hw_ver[4];
|
||||
U32_T fw_build;
|
||||
union {
|
||||
U8_T part0[4];
|
||||
U8_T part1[2];
|
||||
}mac_addr;
|
||||
union {
|
||||
U8_T sn0[4];
|
||||
U8_T sn1[4];
|
||||
U8_T sn2[4];
|
||||
U8_T sn3[4];
|
||||
}sn;
|
||||
}cmd_dev_info_t;
|
||||
|
||||
|
||||
/*
|
||||
* BP command device number
|
||||
*/
|
||||
#define DEV_NUM_MAX 4
|
||||
typedef U8_T cmd_dev_num_t;
|
||||
|
||||
|
||||
/*
|
||||
* BP command data lenth type
|
||||
*/
|
||||
typedef U8_T cmd_data_len_t;
|
||||
|
||||
|
||||
/*
|
||||
* BP command data structure
|
||||
*/
|
||||
typedef union _cmd_data_t{
|
||||
#if 0
|
||||
/*
|
||||
* CMD_GET_BYPASS_CAPS
|
||||
*/
|
||||
/*
|
||||
* CMD_GET_BYPASS_CAPS_EX (1st double word)
|
||||
*/
|
||||
#define BP_CAP BIT0
|
||||
#define BP_STATUS_CAP BIT1
|
||||
#define BP_STATUS_CHANGE_CAP BIT2
|
||||
#define SW_CTL_CAP BIT3
|
||||
#define BP_DIS_CAP BIT4
|
||||
#define BP_DIS_STATUS_CAP BIT5
|
||||
#define STD_NIC_CAP BIT6
|
||||
#define BP_PWOFF_ON_CAP BIT7
|
||||
#define BP_PWOFF_OFF_CAP BIT8
|
||||
#define BP_PWOFF_CTL_CAP BIT9
|
||||
#define BP_PWUP_ON_CAP BIT10
|
||||
#define BP_PWUP_OFF_CAP BIT11
|
||||
#define BP_PWUP_CTL_CAP BIT12
|
||||
#define WD_CTL_CAP BIT13
|
||||
#define WD_STATUS_CAP BIT14
|
||||
#define WD_TIMEOUT_CAP BIT15
|
||||
#define TX_CTL_CAP BIT16
|
||||
#define TX_STATUS_CAP BIT17
|
||||
#define TAP_CAP BIT18
|
||||
#define TAP_STATUS_CAP BIT19
|
||||
#define TAP_STATUS_CHANGE_CAP BIT20
|
||||
#define TAP_DIS_CAP BIT21
|
||||
#define TAP_DIS_STATUS_CAP BIT22
|
||||
#define TAP_PWUP_ON_CAP BIT23
|
||||
#define TAP_PWUP_OFF_CAP BIT24
|
||||
#define TAP_PWUP_CTL_CAP BIT25
|
||||
#define NIC_CAP_NEG BIT26
|
||||
#define TPL_CAP BIT27
|
||||
#define DISC_CAP BIT28
|
||||
#define DISC_DIS_CAP BIT29
|
||||
#define DISC_PWUP_CTL_CAP BIT30
|
||||
#define BP_CAPS_EX_CAP BIT31
|
||||
#endif
|
||||
U32_T bypass_caps;
|
||||
|
||||
|
||||
/*
|
||||
* CMD_GET_BYPASS_CAPS_EX (2nd double word)
|
||||
*/
|
||||
#if 0
|
||||
#define DISC_PWOFF_CTL_CAP BIT0
|
||||
#define BP_HOST_PWOFF_CTL_CAP BIT1
|
||||
#define BP_HOST_PWUP_CTL_CAP BIT2
|
||||
#define DISC_HOST_PWOFF_CTL_CAP BIT3
|
||||
#define DISC_HOST_PWUP_CTL_CAP BIT4
|
||||
#define NORMAL_HOST_PWOFF_CTL_CAP BIT5
|
||||
#define NORMAL_HOST_PWUP_CTL_CAP BIT6
|
||||
#define TAP_HOST_PWOFF_CTL_CAP BIT7
|
||||
#define TAP_HOST_PWUP_CTL_CAP BIT8
|
||||
#define DISC_PORT_CAP BIT9
|
||||
#define DISC_PORT_PWUP_CTL_CAP BIT10
|
||||
#endif
|
||||
|
||||
U32_T bypass_caps_ex;
|
||||
|
||||
|
||||
/*
|
||||
* CMD_GET_WD_SET_CAPS
|
||||
*/
|
||||
|
||||
/* --------------------------------------------------------------------------------------
|
||||
* Bit feature description Products
|
||||
* ---------------------------------------------------------------------------------------
|
||||
* 0-3 WD_MIN_TIME The interface WD minimal time period in PXG2/4BP - 5 (500mS)
|
||||
* 100mS units All the other
|
||||
* products - 1(100mS)
|
||||
* ---------------------------------------------------------------------------------------
|
||||
* 4 WD_STEP_TIME The steps of the WD timer in PXG2/4BP - 0
|
||||
* 0 - for linear steps (WD_MIN_TIME * X) All the other
|
||||
* 1 - for multiply by 2 from previous step products - 1
|
||||
* (WD_MIN_TIME * 2^X)
|
||||
* ---------------------------------------------------------------------------------------
|
||||
* 5-8 WD_STEP_COUNT Number of register bits available for PXG2/4BP -7
|
||||
* configuring the WD timer. From that the All the other
|
||||
* number of steps the WD timer will have is products - 4
|
||||
* 2^X (X number of bits available for
|
||||
* defining the value)
|
||||
* ---------------------------------------------------------------------------------------
|
||||
* 9-31 RESERVED Reserved, should be ignored.
|
||||
* -------------------------------------------------------------------------------------*/
|
||||
|
||||
U32_T wd_set_caps;
|
||||
|
||||
|
||||
/*
|
||||
* CMD_SET_BYPASS
|
||||
*/
|
||||
/*
|
||||
* CMD_GET_BYPASS
|
||||
*/
|
||||
/* #define BYPASS_OFF 0 */
|
||||
/* #define BYPASS_ON 1 */
|
||||
|
||||
U8_T bypass_mode;
|
||||
|
||||
|
||||
/*
|
||||
* CMD_GET_BYPASS_CHANGE
|
||||
*/
|
||||
#define BYPASS_NOT_CHANGED 0
|
||||
#define BYPASS_CHANGED 1
|
||||
|
||||
U8_T bypass_change;
|
||||
|
||||
|
||||
/*
|
||||
* CMD_SET_BYPASS_WD
|
||||
*/
|
||||
/*
|
||||
* CMD_GET_BYPASS_WD
|
||||
*/
|
||||
|
||||
U32_T timeout;
|
||||
U32_T timeout_set;
|
||||
|
||||
|
||||
/*
|
||||
* CMD_GET_WD_EXPIRE_TIME
|
||||
*/
|
||||
|
||||
U32_T time_left;
|
||||
|
||||
|
||||
/*
|
||||
* CMD_SET_DIS_BYPASS
|
||||
*/
|
||||
/*
|
||||
* CMD_GET_DIS_BYPASS
|
||||
*/
|
||||
#define DIS_BYPASS_ENABLE 0
|
||||
#define DIS_BYPASS_DISABLE 1
|
||||
|
||||
U8_T dis_bypass;
|
||||
|
||||
|
||||
/*
|
||||
* CMD_SET_BYPASS_PWOFF
|
||||
*/
|
||||
/*
|
||||
* CMD_GET_BYPASS_PWOFF
|
||||
*/
|
||||
#define BYPASS_PWOFF_DIS 0
|
||||
#define BYPASS_PWOFF_EN 1
|
||||
|
||||
U8_T bypass_pwoff;
|
||||
|
||||
|
||||
/*
|
||||
* CMD_SET_BYPASS_PWUP
|
||||
*/
|
||||
/*
|
||||
* CMD_GET_BYPASS_PWUP
|
||||
*/
|
||||
#define BYPASS_PWUP_DIS 0
|
||||
#define BYPASS_PWUP_EN 1
|
||||
|
||||
U8_T bypass_pwup;
|
||||
|
||||
|
||||
/*
|
||||
* CMD_SET_HOST_PWOFF_MODE
|
||||
*/
|
||||
/*
|
||||
* CMD_GET_HOST_PWOFF_MODE
|
||||
*/
|
||||
#define HOST_PWOFF_MODE_BYPASS 0
|
||||
#define HOST_PWOFF_MODE_TAP 1
|
||||
#define HOST_PWOFF_MODE_DISC 2
|
||||
#define HOST_PWOFF_MODE_NORMAL 3
|
||||
|
||||
U8_T host_pwoff_mode;
|
||||
|
||||
|
||||
/*
|
||||
* CMD_SET_HOST_PWUP_MODE
|
||||
*/
|
||||
/*
|
||||
* CMD_GET_HOST_PWUP_MODE
|
||||
*/
|
||||
#define HOST_PWUP_MODE_BYPASS 0
|
||||
#define HOST_PWUP_MODE_TAP 1
|
||||
#define HOST_PWUP_MODE_DISC 2
|
||||
#define HOST_PWUP_MODE_NORMAL 3
|
||||
|
||||
U8_T host_pwup_mode;
|
||||
|
||||
|
||||
/*
|
||||
* CMD_SET_STD_NIC
|
||||
*/
|
||||
/*
|
||||
* CMD_GET_STD_NIC
|
||||
*/
|
||||
#define STD_NIC_DIS 0
|
||||
#define STD_NIC_EN 1
|
||||
|
||||
U8_T std_nic;
|
||||
|
||||
|
||||
/*
|
||||
* CMD_SET_TAP
|
||||
*/
|
||||
/*
|
||||
* CMD_GET_TAP
|
||||
*/
|
||||
/* #define TAP_OFF 0 */
|
||||
/* #define TAP_ON 1 */
|
||||
|
||||
U8_T tap_mode;
|
||||
|
||||
|
||||
/*
|
||||
* CMD_GET_TAP_CHANGE
|
||||
*/
|
||||
#define TAP_NOT_CHANGED 0
|
||||
#define TAP_CHANGED 1
|
||||
|
||||
U8_T tap_change;
|
||||
|
||||
|
||||
/*
|
||||
* CMD_SET_DIS_TAP
|
||||
*/
|
||||
/*
|
||||
* CMD_GET_DIS_TAP
|
||||
*/
|
||||
#define DIS_TAP_ENABLE 0
|
||||
#define DIS_TAP_DISABLE 1
|
||||
|
||||
U8_T dis_tap;
|
||||
|
||||
|
||||
/*
|
||||
* CMD_SET_TAP_PWUP
|
||||
*/
|
||||
/*
|
||||
* CMD_GET_TAP_PWUP
|
||||
*/
|
||||
#define TAP_PWUP_DIS 0
|
||||
#define TAP_PWUP_EN 1
|
||||
|
||||
U8_T tap_pwup;
|
||||
|
||||
|
||||
/*
|
||||
* CMD_SET_WD_EXP_MODE
|
||||
*/
|
||||
/*
|
||||
* CMD_GET_WD_EXP_MODE
|
||||
*/
|
||||
#define WD_EXP_MODE_BYPASS 0
|
||||
#define WD_EXP_MODE_TAP 1
|
||||
#define WD_EXP_MODE_DISC 2
|
||||
#define WD_EXP_MODE_NORMAL 3
|
||||
|
||||
U8_T wd_exp_mode;
|
||||
|
||||
|
||||
/*
|
||||
* CMD_SET_WD_RST_RESTORE_MODE
|
||||
*/
|
||||
/*
|
||||
* CMD_GET_WD_RST_RESTORE_MODE
|
||||
*/
|
||||
#define WD_RST_RESTORE_MODE_BYPASS 0
|
||||
#define WD_RST_RESTORE_MODE_TAP 1
|
||||
#define WD_RST_RESTORE_MODE_DISC 2
|
||||
#define WD_RST_RESTORE_MODE_NORMAL 3
|
||||
#define WD_RST_RESTORE_MODE_LAST_STATE 4
|
||||
#define WD_RST_RESTORE_MODE_STAY_OFF 5
|
||||
|
||||
U8_T wd_rst_restore_mode;
|
||||
|
||||
|
||||
/*
|
||||
* CMD_SET_DISC
|
||||
*/
|
||||
/*
|
||||
* CMD_GET_DISC
|
||||
*/
|
||||
/* #define DISC_OFF 0 */
|
||||
/* #define DISC_ON 1 */
|
||||
|
||||
U8_T disc_mode;
|
||||
|
||||
|
||||
/*
|
||||
* CMD_GET_DISC_CHANGE
|
||||
*/
|
||||
#define DISC_NOT_CHANGED 0
|
||||
#define DISC_CHANGED 1
|
||||
|
||||
U8_T disc_change;
|
||||
|
||||
|
||||
/*
|
||||
* CMD_SET_DIS_DISC
|
||||
*/
|
||||
/*
|
||||
* CMD_GET_DIS_DISC
|
||||
*/
|
||||
#define DIS_DISC_ENABLE 0
|
||||
#define DIS_DISC_DISABLE 1
|
||||
|
||||
U8_T dis_disc;
|
||||
|
||||
|
||||
/*
|
||||
* CMD_SET_DISC_PWUP
|
||||
*/
|
||||
/*
|
||||
* CMD_GET_DISC_PWUP
|
||||
*/
|
||||
#define DISC_PWUP_DIS 0
|
||||
#define DISC_PWUP_EN 1
|
||||
|
||||
U8_T disc_pwup;
|
||||
|
||||
|
||||
/*
|
||||
* CMD_SET_DISC_PWOFF
|
||||
*/
|
||||
/*
|
||||
* CMD_GET_DISC_PWOFF
|
||||
*/
|
||||
#define DISC_PWOFF_DIS 0
|
||||
#define DISC_PWOFF_EN 1
|
||||
|
||||
U8_T disc_pwoff;
|
||||
|
||||
|
||||
/*
|
||||
* CMD_SET_DISC_PORT
|
||||
*/
|
||||
/*
|
||||
* CMD_GET_DISC_PORT
|
||||
*/
|
||||
#define DISC_PORT_OFF 0
|
||||
#define DISC_PORT_ON 1
|
||||
|
||||
disc_port_t disc_port;
|
||||
|
||||
|
||||
/*
|
||||
* CMD_SET_DISC_PORT_PWUP
|
||||
*/
|
||||
/*
|
||||
* CMD_GET_DISC_PORT_PWUP
|
||||
*/
|
||||
#define DISC_PORT_PWUP_DIS 0
|
||||
#define DISC_PORT_PWUP_EN 1
|
||||
|
||||
disc_port_t disc_port_pwup;
|
||||
|
||||
|
||||
/*
|
||||
* CMD_SET_TPL
|
||||
*/
|
||||
/*
|
||||
* CMD_GET_TPL
|
||||
*/
|
||||
#define TPL_OFF 0
|
||||
#define TPL_ON 1
|
||||
|
||||
U8_T tpl_mode;
|
||||
|
||||
|
||||
/*
|
||||
* CMD_SET_TX
|
||||
*/
|
||||
/*
|
||||
* CMD_GET_TX
|
||||
*/
|
||||
#define TX_OFF 0
|
||||
#define TX_ON 1
|
||||
|
||||
tx_dis_t tx_dis;
|
||||
|
||||
|
||||
/*
|
||||
* CMD_GET_BYPASS_INFO
|
||||
*/
|
||||
cmd_bp_info_t bypass_info;
|
||||
|
||||
|
||||
/*
|
||||
* CMD_GET_DEV_INFO
|
||||
*/
|
||||
#define DEV_INFO_DEV_VER 0
|
||||
#define DEV_INFO_FW_VER 1
|
||||
#define DEV_INFO_MAC_PART0 2
|
||||
#define DEV_INFO_MAC_PART1 3
|
||||
#define DEV_INFO_SN_PART0 4
|
||||
#define DEV_INFO_SN_PART1 5
|
||||
#define DEV_INFO_SN_PART2 6
|
||||
#define DEV_INFO_SN_PART3 7
|
||||
#define DEV_INFO_FW_BUILD 8
|
||||
#define DEV_INFO_BDS_REV 9
|
||||
#define DEV_INFO_HW_REV 10
|
||||
|
||||
cmd_dev_info_t dev_info;
|
||||
|
||||
|
||||
/*
|
||||
* CMD_GET_BP_WAIT_AT_PWUP
|
||||
*/
|
||||
/*
|
||||
* CMD_SET_BP_WAIT_AT_PWUP
|
||||
*/
|
||||
/* #define BP_WAIT_AT_PWUP_DIS 0 */
|
||||
/* #define BP_WAIT_AT_PWUP_EN 1 */
|
||||
U8_T bp_wait_at_pwup;
|
||||
|
||||
|
||||
/*
|
||||
* CMD_GET_BP_HW_RESET
|
||||
*/
|
||||
/*
|
||||
* CMD_SET_BP_HW_RESET
|
||||
*/
|
||||
/* #define BP_HW_RESET_DIS 0 */
|
||||
/* #define BP_HW_RESET_EN 1 */
|
||||
|
||||
U8_T bp_hw_reset;
|
||||
|
||||
}cmd_data_t;
|
||||
|
||||
|
||||
/******************************************************\
|
||||
* *
|
||||
* <DEV_NUM><COMMAND_ID><COMMAND_LEN><COMMAND_DATA> *
|
||||
* *
|
||||
\******************************************************/
|
||||
#define BP_CMD_PACKET_SIZE ( sizeof(cmd_dev_num_t) \
|
||||
+ sizeof(cmd_id_t) \
|
||||
+ sizeof(cmd_data_len_t) \
|
||||
+ sizeof(cmd_data_t) )
|
||||
|
||||
typedef union _bp_cmd_t
|
||||
{
|
||||
byte cmd_bytes[BP_CMD_PACKET_SIZE]; // For Byte Access
|
||||
|
||||
struct {
|
||||
cmd_dev_num_t cmd_dev_num;
|
||||
cmd_id_t cmd_id;
|
||||
cmd_data_len_t cmd_data_len;
|
||||
cmd_data_t cmd_data;
|
||||
}cmd;
|
||||
|
||||
}bp_cmd_t;
|
||||
|
||||
|
||||
/******************************************************\
|
||||
* *
|
||||
* <RET_CODE><COMMAND_LEN><COMMAND_DATA> *
|
||||
* *
|
||||
\******************************************************/
|
||||
#define BP_RSP_PACKET_SIZE ( sizeof(cmd_rsp_id_t) \
|
||||
+ sizeof(cmd_data_len_t) \
|
||||
+ sizeof(cmd_data_t) )
|
||||
|
||||
typedef union _bp_cmd_rsp_t
|
||||
{
|
||||
byte cmd_bytes[BP_RSP_PACKET_SIZE]; // For Byte Access
|
||||
|
||||
struct {
|
||||
cmd_rsp_id_t rsp_id;
|
||||
cmd_data_len_t rsp_data_len;
|
||||
cmd_data_t rsp_data;
|
||||
}rsp;
|
||||
|
||||
}bp_cmd_rsp_t;
|
||||
|
||||
#ifndef FW_HEADER_DEF
|
||||
#pragma pack(pop) /* push current alignment to stack */
|
||||
#endif
|
||||
|
||||
#endif /* End of __BP_CMD_H__ */
|
||||
1088
bp_mod.h
Executable file
1088
bp_mod.h
Executable file
|
|
@ -0,0 +1,1088 @@
|
|||
/**************************************************************************
|
||||
|
||||
Copyright (c) 2006-2013, Silicom
|
||||
All rights reserved.
|
||||
|
||||
Redistribution and use in source and binary forms, with or without
|
||||
modification, are permitted provided that the following conditions are met:
|
||||
|
||||
1. Redistributions of source code must retain the above copyright notice,
|
||||
this list of conditions and the following disclaimer.
|
||||
|
||||
2. Redistributions in binary form must reproduce the above copyright
|
||||
notice, this list of conditions and the following disclaimer in the
|
||||
documentation and/or other materials provided with the distribution.
|
||||
|
||||
3. Neither the name of the Silicom nor the names of its
|
||||
contributors may be used to endorse or promote products derived from
|
||||
this software without specific prior written permission.
|
||||
|
||||
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
|
||||
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
POSSIBILITY OF SUCH DAMAGE.
|
||||
|
||||
***************************************************************************/
|
||||
|
||||
#ifndef BP_MOD_H
|
||||
#define BP_MOD_H
|
||||
#include "bits.h"
|
||||
|
||||
#ifndef KERNEL_VERSION
|
||||
#define KERNEL_VERSION(a,b,c) (((a) << 16) + ((b) << 8) + (c))
|
||||
#endif
|
||||
|
||||
|
||||
#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,8) )
|
||||
#define msleep(x) do { if(in_interrupt()) { \
|
||||
/* Don't mdelay in interrupt context! */ \
|
||||
BUG(); \
|
||||
} else { \
|
||||
set_current_state(TASK_UNINTERRUPTIBLE); \
|
||||
schedule_timeout((x * HZ)/1000 + 2); \
|
||||
} } while(0)
|
||||
#endif
|
||||
|
||||
#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,10))
|
||||
#define EXPORT_SYMBOL_NOVERS EXPORT_SYMBOL
|
||||
#endif
|
||||
|
||||
#define BP_PROC_DIR "bypass"
|
||||
|
||||
|
||||
#define GPIO6_SET_ENTRY_SD "gpio6_set"
|
||||
#define GPIO6_CLEAR_ENTRY_SD "gpio6_clear"
|
||||
|
||||
#define GPIO7_SET_ENTRY_SD "gpio7_set"
|
||||
#define GPIO7_CLEAR_ENTRY_SD "gpio7_clear"
|
||||
|
||||
#define PULSE_SET_ENTRY_SD "pulse_set"
|
||||
#define ZERO_SET_ENTRY_SD "zero_set"
|
||||
#define PULSE_GET1_ENTRY_SD "pulse_get1"
|
||||
#define PULSE_GET2_ENTRY_SD "pulse_get2"
|
||||
|
||||
#define CMND_ON_ENTRY_SD "cmnd_on"
|
||||
#define CMND_OFF_ENTRY_SD "cmnd_off"
|
||||
#define RESET_CONT_ENTRY_SD "reset_cont"
|
||||
|
||||
/*COMMANDS*/
|
||||
#define BYPASS_INFO_ENTRY_SD "bypass_info"
|
||||
|
||||
#define BYPASS_SLAVE_ENTRY_SD "bypass_slave"
|
||||
#define BYPASS_CAPS_ENTRY_SD "bypass_caps"
|
||||
#define WD_SET_CAPS_ENTRY_SD "wd_set_caps"
|
||||
#define BYPASS_ENTRY_SD "bypass"
|
||||
#define BYPASS_CHANGE_ENTRY_SD "bypass_change"
|
||||
#define BYPASS_WD_ENTRY_SD "bypass_wd"
|
||||
#define WD_EXPIRE_TIME_ENTRY_SD "wd_expire_time"
|
||||
#define RESET_BYPASS_WD_ENTRY_SD "reset_bypass_wd"
|
||||
#define DIS_BYPASS_ENTRY_SD "dis_bypass"
|
||||
#define BYPASS_PWUP_ENTRY_SD "bypass_pwup"
|
||||
#define BYPASS_PWOFF_ENTRY_SD "bypass_pwoff"
|
||||
#define STD_NIC_ENTRY_SD "std_nic"
|
||||
#define STD_NIC_ENTRY_SD "std_nic"
|
||||
#define TAP_ENTRY_SD "tap"
|
||||
#define TAP_CHANGE_ENTRY_SD "tap_change"
|
||||
#define DIS_TAP_ENTRY_SD "dis_tap"
|
||||
#define TAP_PWUP_ENTRY_SD "tap_pwup"
|
||||
#define TWO_PORT_LINK_ENTRY_SD "two_port_link"
|
||||
#define WD_EXP_MODE_ENTRY_SD "wd_exp_mode"
|
||||
#define WD_AUTORESET_ENTRY_SD "wd_autoreset"
|
||||
#define TPL_ENTRY_SD "tpl"
|
||||
#define WAIT_AT_PWUP_ENTRY_SD "wait_at_pwup"
|
||||
#define HW_RESET_ENTRY_SD "hw_reset"
|
||||
#define DISC_ENTRY_SD "disc"
|
||||
#define DISC_CHANGE_ENTRY_SD "disc_change"
|
||||
#define DIS_DISC_ENTRY_SD "dis_disc"
|
||||
#define DISC_PWUP_ENTRY_SD "disc_pwup"
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
#ifndef jiffies_to_msecs
|
||||
#define jiffies_to_msecs(x) _kc_jiffies_to_msecs(x)
|
||||
static inline unsigned int jiffies_to_msecs(const unsigned long j)
|
||||
{
|
||||
#if HZ <= 1000 && !(1000 % HZ)
|
||||
return(1000 / HZ) * j;
|
||||
#elif HZ > 1000 && !(HZ % 1000)
|
||||
return(j + (HZ / 1000) - 1)/(HZ / 1000);
|
||||
#else
|
||||
return(j * 1000) / HZ;
|
||||
#endif
|
||||
}
|
||||
#endif
|
||||
|
||||
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,10))
|
||||
|
||||
#define pci_get_class pci_find_class
|
||||
#define pci_get_subsys pci_find_subsys
|
||||
#define pci_get_device pci_find_device
|
||||
|
||||
#endif
|
||||
|
||||
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,4))
|
||||
#define MODULE_VERSION(_version)
|
||||
#endif
|
||||
|
||||
|
||||
#define SILICOM_VID 0x1374
|
||||
#define SILICOM_SVID 0x1374
|
||||
|
||||
#define SILICOM_PXG2BPFI_SSID 0x0026
|
||||
#define SILICOM_PXG2BPFILX_SSID 0x0027
|
||||
#define SILICOM_PXGBPI_SSID 0x0028
|
||||
#define SILICOM_PXGBPIG_SSID 0x0029
|
||||
#define SILICOM_PXG2TBFI_SSID 0x002a
|
||||
#define SILICOM_PXG4BPI_SSID 0x002c
|
||||
#define SILICOM_PXG4BPFI_SSID 0x002d
|
||||
#define SILICOM_PXG4BPFILX_SSID 0x002e
|
||||
#define SILICOM_PXG2BPFIL_SSID 0x002F
|
||||
#define SILICOM_PXG2BPFILLX_SSID 0x0030
|
||||
#define SILICOM_PEG4BPI_SSID 0x0031
|
||||
#define SILICOM_PEG2BPI_SSID 0x0037
|
||||
#define SILICOM_PEG4BPIN_SSID 0x0038
|
||||
#define SILICOM_PEG2BPFI_SSID 0x0039
|
||||
#define SILICOM_PEG2BPFILX_SSID 0x003A
|
||||
#define SILICOM_PMCXG2BPFI_SSID 0x003B
|
||||
#define NOKIA_PMCXG2BPFIN_SSID 0x0510
|
||||
#define NOKIA_PMCXG2BPIN_SSID 0x0513
|
||||
#define NOKIA_PMCXG4BPIN_SSID 0x0514
|
||||
#define NOKIA_PMCXG2BPFIN_SVID 0x13B8
|
||||
#define NOKIA_PMCXG2BPIN2_SSID 0x0515
|
||||
#define NOKIA_PMCXG4BPIN2_SSID 0x0516
|
||||
#define SILICOM_PMCX2BPI_SSID 0x041
|
||||
#define SILICOM_PMCX4BPI_SSID 0x042
|
||||
#define SILICOM_PXG2BISC1_SSID 0x003d
|
||||
#define SILICOM_PEG2TBFI_SSID 0x003E
|
||||
#define SILICOM_PXG2TBI_SSID 0x003f
|
||||
#define SILICOM_PXG4BPFID_SSID 0x0043
|
||||
#define SILICOM_PEG4BPFI_SSID 0x0040
|
||||
#define SILICOM_PEG4BPIPT_SSID 0x0044
|
||||
#define SILICOM_PXG6BPI_SSID 0x0045
|
||||
#define SILICOM_PEG4BPIL_SSID 0x0046
|
||||
#define SILICOM_PEG2BPI5_SSID 0x0052
|
||||
#define SILICOM_PEG6BPI_SSID 0x0053
|
||||
#define SILICOM_PEG4BPFI5_SSID 0x0050
|
||||
#define SILICOM_PEG4BPFI5LX_SSID 0x0051
|
||||
#define SILICOM_PEG2BISC6_SSID 0x54
|
||||
|
||||
#define SILICOM_PEG6BPIFC_SSID 0x55
|
||||
|
||||
|
||||
|
||||
#define SILICOM_PEG2BPFI5_SSID 0x0056
|
||||
#define SILICOM_PEG2BPFI5LX_SSID 0x0057
|
||||
|
||||
|
||||
#define SILICOM_PXEG4BPFI_SSID 0x0058
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
#define SILICOM_PEG2BPFID_SSID 0x0047
|
||||
#define SILICOM_PEG2BPFIDLX_SSID 0x004C
|
||||
#define SILICOM_MEG2BPFILN_SSID 0x0048
|
||||
#define SILICOM_MEG2BPFINX_SSID 0x0049
|
||||
#define SILICOM_PEG4BPFILX_SSID 0x004A
|
||||
#define SILICOM_MHIO8AD_SSID 0x004F
|
||||
|
||||
#define SILICOM_MEG2BPFILXLN_SSID 0x004b
|
||||
#define SILICOM_PEG2BPIX1_SSID 0x004d
|
||||
#define SILICOM_MEG2BPFILXNX_SSID 0x004e
|
||||
|
||||
|
||||
#define SILICOM_PE10G2BPISR_SSID 0x0102
|
||||
#define SILICOM_PE10G2BPILR_SSID 0x0103
|
||||
#define SILICOM_PE10G2BPICX4_SSID 0x0101
|
||||
|
||||
#define SILICOM_XE10G2BPILR_SSID 0x0163
|
||||
#define SILICOM_XE10G2BPISR_SSID 0x0162
|
||||
#define SILICOM_XE10G2BPICX4_SSID 0x0161
|
||||
#define SILICOM_XE10G2BPIT_SSID 0x0160
|
||||
|
||||
#define SILICOM_PE10GDBISR_SSID 0x0181
|
||||
#define SILICOM_PE10GDBILR_SSID 0x0182
|
||||
|
||||
|
||||
|
||||
|
||||
#define SILICOM_PE210G2DBi9SR_SSID 0x0188
|
||||
#define SILICOM_PE210G2DBi9SRRB_SSID 0x0188
|
||||
#define SILICOM_PE210G2DBi9LR_SSID 0x0189
|
||||
#define SILICOM_PE210G2DBi9LRRB_SSID 0x0189
|
||||
#define SILICOM_PE310G4DBi940SR_SSID 0x018C
|
||||
#define SILICOM_PE310G4DBi940LR_SSID 0x018D
|
||||
#define SILICOM_PE310G4DBi940T_SSID 0x018e
|
||||
|
||||
#define SILICOM_PE310G4DBi9T_SSID 0x18e
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
#define SILICOM_PE310G4BPi9T_SSID 0x130
|
||||
#define SILICOM_PE310G4BPi9SR_SSID 0x132
|
||||
#define SILICOM_PE310G4BPi9LR_SSID 0x133
|
||||
|
||||
#define SILICOM_PE310G4BPi9SRD_SSID 0x134
|
||||
#define SILICOM_PE310G4BPi9LRD_SSID 0x135
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
#define SILICOM_M6E310G4BPi9SR_SSID 0x0492
|
||||
#define SILICOM_M6E310G4BPi9LR_SSID 0x0493
|
||||
|
||||
|
||||
|
||||
|
||||
#define NOKIA_XE10G2BPIXR_SVID 0x13B8
|
||||
#define NOKIA_XE10G2BPIXR_SSID 0x051C
|
||||
|
||||
|
||||
#define INTEL_PEG4BPII_PID 0x10A0
|
||||
#define INTEL_PEG4BPFII_PID 0x10A1
|
||||
#define INTEL_PEG4BPII_SSID 0x11A0
|
||||
#define INTEL_PEG4BPFII_SSID 0x11A1
|
||||
|
||||
#define INTEL_PEG4BPIIO_SSID 0x10A0
|
||||
#define INTEL_PEG4BPIIO_PID 0x105e
|
||||
|
||||
|
||||
#define BROADCOM_VID 0x14e4
|
||||
#define BROADCOM_PE10G2_PID 0x164e
|
||||
|
||||
#define SILICOM_PE10G2BPTCX4_SSID 0x0141
|
||||
#define SILICOM_PE10G2BPTSR_SSID 0x0142
|
||||
#define SILICOM_PE10G2BPTLR_SSID 0x0143
|
||||
#define SILICOM_PE10G2BPTT_SSID 0x0140
|
||||
|
||||
|
||||
#define SILICOM_PEG4BPI6_SSID 0x0320
|
||||
#define SILICOM_PEG4BPFI6_SSID 0x0321
|
||||
#define SILICOM_PEG4BPFI6LX_SSID 0x0322
|
||||
#define SILICOM_PEG4BPFI6ZX_SSID 0x0323
|
||||
|
||||
|
||||
#define SILICOM_PEG2BPI6_SSID 0x0300
|
||||
#define SILICOM_PEG2BPFI6_SSID 0x0301
|
||||
#define SILICOM_PEG2BPFI6LX_SSID 0x0302
|
||||
#define SILICOM_PEG2BPFI6ZX_SSID 0x0303
|
||||
#define SILICOM_PEG2BPFI6FLXM_SSID 0x0304
|
||||
|
||||
#define SILICOM_PEG2DBI6_SSID 0x0308
|
||||
#define SILICOM_PEG2DBFI6_SSID 0x0309
|
||||
#define SILICOM_PEG2DBFI6LX_SSID 0x030A
|
||||
#define SILICOM_PEG2DBFI6ZX_SSID 0x030B
|
||||
|
||||
|
||||
#define SILICOM_MEG2BPI6_SSID 0x0310
|
||||
#define SILICOM_XEG2BPI6_SSID 0x0318
|
||||
#define SILICOM_PEG4BPI6FC_SSID 0x0328
|
||||
#define SILICOM_PEG4BPFI6FC_SSID 0x0329
|
||||
#define SILICOM_PEG4BPFI6FCLX_SSID 0x032A
|
||||
#define SILICOM_PEG4BPFI6FCZX_SSID 0x032B
|
||||
|
||||
#define SILICOM_PEG6BPI6_SSID 0x0340
|
||||
#define SILICOM_PE2G6BPI6_SSID 0x0341
|
||||
|
||||
#define SILICOM_PEG2BPI6SC6_SSID 0x0360
|
||||
|
||||
#define SILICOM_MEG2BPI6_SSID 0x0310
|
||||
#define SILICOM_XEG2BPI6_SSID 0x0318
|
||||
#define SILICOM_MEG4BPI6_SSID 0x0330
|
||||
|
||||
|
||||
#define SILICOM_PE2G4BPi80L_SSID 0x0380
|
||||
|
||||
#define SILICOM_M6E2G8BPi80A_SSID 0x0474
|
||||
|
||||
#define SILICOM_PE2G4BPi35_SSID 0x03d8
|
||||
|
||||
#define SILICOM_PE2G4BPFi80_SSID 0x0381
|
||||
#define SILICOM_PE2G4BPFi80LX_SSID 0x0382
|
||||
#define SILICOM_PE2G4BPFi80ZX_SSID 0x0383
|
||||
|
||||
#define SILICOM_PE2G4BPi80_SSID 0x0388
|
||||
|
||||
#define SILICOM_PE2G2BPi80_SSID 0x0390
|
||||
#define SILICOM_PE2G2BPFi80_SSID 0x0391
|
||||
#define SILICOM_PE2G2BPFi80LX_SSID 0x0392
|
||||
#define SILICOM_PE2G2BPFi80ZX_SSID 0x0393
|
||||
|
||||
#define SILICOM_PE2G4BPi35L_SSID 0x03D0
|
||||
#define SILICOM_PE2G4BPFi35_SSID 0x03D1
|
||||
#define SILICOM_PE2G4BPFi35CS_SSID 0x0b80
|
||||
#define SILICOM_PE2G4BPFi35LX_SSID 0x03D2
|
||||
#define SILICOM_PE2G4BPFi35ZX_SSID 0x03D3
|
||||
|
||||
#define SILICOM_M1E2G4BPi35_SSID 0x04D0
|
||||
#define SILICOM_M1E2G4BPFi35_SSID 0x04D1
|
||||
#define SILICOM_M1E2G4BPFi35LX_SSID 0x04D2
|
||||
#define SILICOM_M1E2G4BPFi35ZX_SSID 0x04D3
|
||||
|
||||
#define SILICOM_M1E2G4BPi35JP_SSID 0x1800
|
||||
#define SILICOM_M1E2G4BPi35JP1_SSID 0x1801
|
||||
|
||||
|
||||
|
||||
#define SILICOM_PE2G2BPi35_SSID 0x03c0
|
||||
#define SILICOM_PAC1200BPi35_SSID 0x03cc
|
||||
#define SILICOM_PE2G2BPFi35_SSID 0x03C1
|
||||
#define SILICOM_PE2G2BPFi35LX_SSID 0x03C2
|
||||
#define SILICOM_PE2G2BPFi35ZX_SSID 0x03C3
|
||||
|
||||
|
||||
|
||||
#define SILICOM_PE2G6BPi35_SSID 0x03E0
|
||||
#define SILICOM_PE2G6BPi35CX_SSID 0x0AA0
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
#define INTEL_PE210G2SPI9_SSID 0x00C
|
||||
|
||||
#define SILICOM_M1EG2BPI6_SSID 0x400
|
||||
|
||||
#define SILICOM_M1EG2BPFI6_SSID 0x0401
|
||||
#define SILICOM_M1EG2BPFI6LX_SSID 0x0402
|
||||
#define SILICOM_M1EG2BPFI6ZX_SSID 0x0403
|
||||
|
||||
#define SILICOM_M1EG4BPI6_SSID 0x0420
|
||||
|
||||
#define SILICOM_M1EG4BPFI6_SSID 0x0421
|
||||
#define SILICOM_M1EG4BPFI6LX_SSID 0x0422
|
||||
#define SILICOM_M1EG4BPFI6ZX_SSID 0x0423
|
||||
|
||||
#define SILICOM_M1EG6BPI6_SSID 0x0440
|
||||
|
||||
#define SILICOM_M1E2G4BPi80_SSID 0x0460
|
||||
#define SILICOM_M1E2G4BPFi80_SSID 0x0461
|
||||
#define SILICOM_M1E2G4BPFi80LX_SSID 0x0462
|
||||
#define SILICOM_M1E2G4BPFi80ZX_SSID 0x0463
|
||||
|
||||
#define SILICOM_M6E2G8BPi80_SSID 0x0470
|
||||
#define SILICOM_PE210G2BPi40_SSID 0x01a0
|
||||
#define SILICOM_M1E210G2BPI40T_SSID 0x0480
|
||||
#define SILICOM_PE310G4BPi40_SSID 0x01a4
|
||||
|
||||
#define PEG540_IF_SERIES(pid) \
|
||||
((pid==SILICOM_PE210G2BPi40_SSID) || \
|
||||
(pid==SILICOM_PE310G4BPi40_SSID) || \
|
||||
(pid==SILICOM_M1E210G2BPI40T_SSID))
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
#define OLD_IF_SERIES(pid) \
|
||||
((pid==SILICOM_PXG2BPFI_SSID)|| \
|
||||
(pid==SILICOM_PXG2BPFILX_SSID))
|
||||
|
||||
#define P2BPFI_IF_SERIES(pid) \
|
||||
((pid==SILICOM_PXG2BPFI_SSID)|| \
|
||||
(pid==SILICOM_PXG2BPFILX_SSID)|| \
|
||||
(pid==SILICOM_PEG2BPFI_SSID)|| \
|
||||
(pid==SILICOM_PEG2BPFID_SSID)|| \
|
||||
(pid==SILICOM_PEG2BPFIDLX_SSID)|| \
|
||||
(pid==SILICOM_MEG2BPFILN_SSID)|| \
|
||||
(pid==SILICOM_MEG2BPFINX_SSID)|| \
|
||||
(pid==SILICOM_PEG4BPFILX_SSID)|| \
|
||||
(pid==SILICOM_PEG4BPFI_SSID)|| \
|
||||
(pid==SILICOM_PXEG4BPFI_SSID)|| \
|
||||
(pid==SILICOM_PXG4BPFID_SSID)|| \
|
||||
(pid==SILICOM_PEG2TBFI_SSID)|| \
|
||||
(pid==SILICOM_PE10G2BPISR_SSID)|| \
|
||||
(pid==SILICOM_PE10G2BPILR_SSID)|| \
|
||||
(pid==SILICOM_PEG2BPFILX_SSID)|| \
|
||||
(pid==SILICOM_PMCXG2BPFI_SSID) || \
|
||||
(pid==SILICOM_MHIO8AD_SSID) || \
|
||||
(pid==SILICOM_PEG4BPFI5LX_SSID) || \
|
||||
(pid==SILICOM_PEG4BPFI5_SSID) || \
|
||||
(pid==SILICOM_PEG4BPFI6FC_SSID) || \
|
||||
(pid==SILICOM_PEG4BPFI6FCLX_SSID) || \
|
||||
(pid==SILICOM_PEG4BPFI6FCZX_SSID) || \
|
||||
(pid==NOKIA_PMCXG2BPFIN_SSID)|| \
|
||||
(pid==SILICOM_MEG2BPFILXLN_SSID)|| \
|
||||
(pid==SILICOM_MEG2BPFILXNX_SSID)|| \
|
||||
(pid==SILICOM_XE10G2BPIT_SSID)|| \
|
||||
(pid==SILICOM_XE10G2BPICX4_SSID)|| \
|
||||
(pid==SILICOM_XE10G2BPISR_SSID)|| \
|
||||
(pid==NOKIA_XE10G2BPIXR_SSID)|| \
|
||||
(pid==SILICOM_PE10GDBISR_SSID)|| \
|
||||
(pid==SILICOM_PE10GDBILR_SSID)|| \
|
||||
(pid==SILICOM_XE10G2BPILR_SSID))
|
||||
|
||||
|
||||
#define INTEL_IF_SERIES(pid) \
|
||||
((pid==INTEL_PEG4BPII_SSID)|| \
|
||||
(pid==INTEL_PEG4BPIIO_SSID)|| \
|
||||
(pid==INTEL_PEG4BPFII_SSID))
|
||||
|
||||
#define NOKIA_SERIES(pid) \
|
||||
((pid==NOKIA_PMCXG2BPIN_SSID)|| \
|
||||
(pid==NOKIA_PMCXG4BPIN_SSID)|| \
|
||||
(pid==SILICOM_PMCX4BPI_SSID)|| \
|
||||
(pid==NOKIA_PMCXG2BPFIN_SSID)|| \
|
||||
(pid==SILICOM_PMCXG2BPFI_SSID)|| \
|
||||
(pid==NOKIA_PMCXG2BPIN2_SSID)|| \
|
||||
(pid==NOKIA_PMCXG4BPIN2_SSID)|| \
|
||||
(pid==SILICOM_PMCX2BPI_SSID))
|
||||
|
||||
#define DISCF_IF_SERIES(pid) \
|
||||
(pid==SILICOM_PEG2TBFI_SSID)
|
||||
|
||||
#define PEGF_IF_SERIES(pid) \
|
||||
((pid==SILICOM_PEG2BPFI_SSID)|| \
|
||||
(pid==SILICOM_PEG2BPFID_SSID)|| \
|
||||
(pid==SILICOM_PEG2BPFIDLX_SSID)|| \
|
||||
(pid==SILICOM_PEG2BPFILX_SSID)|| \
|
||||
(pid==SILICOM_PEG4BPFI_SSID)|| \
|
||||
(pid==SILICOM_PXEG4BPFI_SSID)|| \
|
||||
(pid==SILICOM_MEG2BPFILN_SSID)|| \
|
||||
(pid==SILICOM_MEG2BPFINX_SSID)|| \
|
||||
(pid==SILICOM_PEG4BPFILX_SSID)|| \
|
||||
(pid==SILICOM_PEG2TBFI_SSID)|| \
|
||||
(pid==SILICOM_MEG2BPFILXLN_SSID)|| \
|
||||
(pid==SILICOM_MEG2BPFILXNX_SSID))
|
||||
|
||||
|
||||
#define TPL_IF_SERIES(pid) \
|
||||
((pid==SILICOM_PXG2BPFIL_SSID)|| \
|
||||
(pid==SILICOM_PXG2BPFILLX_SSID)|| \
|
||||
(pid==SILICOM_PXG2TBFI_SSID)|| \
|
||||
(pid==SILICOM_PXG4BPFID_SSID)|| \
|
||||
(pid==SILICOM_PXG4BPFI_SSID))
|
||||
|
||||
|
||||
#define BP10G_IF_SERIES(pid) \
|
||||
((pid==SILICOM_PE10G2BPISR_SSID)|| \
|
||||
(pid==SILICOM_PE10G2BPICX4_SSID)|| \
|
||||
(pid==SILICOM_PE10G2BPILR_SSID)|| \
|
||||
(pid==SILICOM_XE10G2BPIT_SSID)|| \
|
||||
(pid==SILICOM_XE10G2BPICX4_SSID)|| \
|
||||
(pid==SILICOM_XE10G2BPISR_SSID)|| \
|
||||
(pid==NOKIA_XE10G2BPIXR_SSID)|| \
|
||||
(pid==SILICOM_PE10GDBISR_SSID)|| \
|
||||
(pid==SILICOM_PE10GDBILR_SSID)|| \
|
||||
(pid==SILICOM_XE10G2BPILR_SSID))
|
||||
|
||||
#define BP10GB_IF_SERIES(pid) \
|
||||
((pid==SILICOM_PE10G2BPTCX4_SSID)|| \
|
||||
(pid==SILICOM_PE10G2BPTSR_SSID)|| \
|
||||
(pid==SILICOM_PE10G2BPTLR_SSID)|| \
|
||||
(pid==SILICOM_PE10G2BPTT_SSID))
|
||||
|
||||
|
||||
|
||||
#define BP10G_CX4_SERIES(pid) \
|
||||
(pid==SILICOM_PE10G2BPICX4_SSID)
|
||||
|
||||
#define BP10GB_CX4_SERIES(pid) \
|
||||
(pid==SILICOM_PE10G2BPTCX4_SSID)
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
#define SILICOM_M2EG2BPFI6_SSID 0x0401
|
||||
#define SILICOM_M2EG2BPFI6LX_SSID 0x0402
|
||||
#define SILICOM_M2EG2BPFI6ZX_SSID 0x0403
|
||||
#define SILICOM_M2EG4BPI6_SSID 0x0420
|
||||
|
||||
#define SILICOM_M2EG4BPFI6_SSID 0x0421
|
||||
#define SILICOM_M2EG4BPFI6LX_SSID 0x0422
|
||||
#define SILICOM_M2EG4BPFI6ZX_SSID 0x0423
|
||||
|
||||
#define SILICOM_M2EG6BPI6_SSID 0x0440
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
#define SILICOM_M1E10G2BPI9CX4_SSID 0x481
|
||||
#define SILICOM_M1E10G2BPI9SR_SSID 0x482
|
||||
#define SILICOM_M1E10G2BPI9LR_SSID 0x483
|
||||
//#define SILICOM_M1E10G2BPI9T_SSID 0x480
|
||||
|
||||
#define SILICOM_M2E10G2BPI9CX4_SSID 0x481
|
||||
#define SILICOM_M2E10G2BPI9SR_SSID 0x482
|
||||
#define SILICOM_M2E10G2BPI9LR_SSID 0x483
|
||||
#define SILICOM_M2E10G2BPI9T_SSID 0x480
|
||||
|
||||
|
||||
#define SILICOM_PE210G2BPI9CX4_SSID 0x121
|
||||
#define SILICOM_PE210G2BPI9SR_SSID 0x122
|
||||
#define SILICOM_PE210G2BPI9LR_SSID 0x123
|
||||
#define SILICOM_PE210G2BPI9LRD_SSID 0x125
|
||||
#define SILICOM_PE210G2BPI9SRD_SSID 0x124
|
||||
#define SILICOM_PE210G2BPI9T_SSID 0x120
|
||||
|
||||
#define SILICOM_M1E210G2BPI9SRDJP_SSID 0x1E00
|
||||
#define SILICOM_M1E210G2BPI9SRDJP1_SSID 0x1E10
|
||||
#define SILICOM_M1E210G2BPI9LRDJP_SSID 0x1F00
|
||||
#define SILICOM_M1E210G2BPI9LRDJP1_SSID 0x1F10
|
||||
|
||||
#define SILICOM_PE310G4BPI71SRD_SSID 0x0502
|
||||
#define SILICOM_PE310G4BPI71LRD_SSID 0x0503
|
||||
#define SILICOM_PE340G2BPI71QS4_SSID 0x0512
|
||||
#define SILICOM_PE340G2BPI71QL4_SSID 0x0513
|
||||
|
||||
|
||||
#define BP40_IF_SERIES(pid) \
|
||||
((pid==SILICOM_PE310G4BPI71SRD_SSID)|| \
|
||||
(pid== SILICOM_PE310G4BPI71LRD_SSID)|| \
|
||||
(pid==SILICOM_PE340G2BPI71QS4_SSID)|| \
|
||||
(pid==SILICOM_PE340G2BPI71QL4_SSID))
|
||||
|
||||
|
||||
#define DBI_IF_SERIES(pid) \
|
||||
((pid==SILICOM_PE10GDBISR_SSID)|| \
|
||||
(pid==SILICOM_PE10GDBILR_SSID)|| \
|
||||
(pid==SILICOM_XE10G2BPILR_SSID)|| \
|
||||
(pid==SILICOM_PE210G2DBi9LR_SSID))
|
||||
|
||||
|
||||
#define PEGF5_IF_SERIES(pid) \
|
||||
((pid==SILICOM_PEG2BPFI5_SSID)|| \
|
||||
(pid==SILICOM_PEG2BPFI5LX_SSID)|| \
|
||||
(pid==SILICOM_PEG4BPFI6_SSID)|| \
|
||||
(pid==SILICOM_PE2G6BPI6_SSID)|| \
|
||||
(pid==SILICOM_PEG4BPFI6LX_SSID)|| \
|
||||
(pid==SILICOM_PEG4BPFI6ZX_SSID)|| \
|
||||
(pid==SILICOM_PEG2BPFI6_SSID)|| \
|
||||
(pid==SILICOM_PEG2BPFI6LX_SSID)|| \
|
||||
(pid==SILICOM_PEG2BPFI6ZX_SSID)|| \
|
||||
(pid==SILICOM_PEG2BPFI6FLXM_SSID)|| \
|
||||
(pid==SILICOM_PEG2DBFI6_SSID)|| \
|
||||
(pid==SILICOM_PEG2DBFI6LX_SSID)|| \
|
||||
(pid==SILICOM_PEG2DBFI6ZX_SSID)|| \
|
||||
(pid==SILICOM_PEG4BPI6FC_SSID)|| \
|
||||
(pid==SILICOM_PEG4BPFI6FCLX_SSID)|| \
|
||||
(pid==SILICOM_PEG4BPI6FC_SSID)|| \
|
||||
(pid==SILICOM_M1EG2BPFI6_SSID)|| \
|
||||
(pid==SILICOM_M1EG2BPFI6LX_SSID)|| \
|
||||
(pid==SILICOM_M1EG2BPFI6ZX_SSID)|| \
|
||||
(pid==SILICOM_M1EG4BPFI6_SSID)|| \
|
||||
(pid==SILICOM_M1EG4BPFI6LX_SSID)|| \
|
||||
(pid==SILICOM_M1EG4BPFI6ZX_SSID)|| \
|
||||
(pid==SILICOM_M2EG2BPFI6_SSID)|| \
|
||||
(pid==SILICOM_M2EG2BPFI6LX_SSID)|| \
|
||||
(pid==SILICOM_M2EG2BPFI6ZX_SSID)|| \
|
||||
(pid==SILICOM_M2EG4BPFI6_SSID)|| \
|
||||
(pid==SILICOM_M2EG4BPFI6LX_SSID)|| \
|
||||
(pid==SILICOM_M2EG4BPFI6ZX_SSID)|| \
|
||||
(pid==SILICOM_PEG4BPFI6FCZX_SSID))
|
||||
|
||||
|
||||
|
||||
|
||||
#define PEG5_IF_SERIES(pid) \
|
||||
((pid==SILICOM_PEG4BPI6_SSID)|| \
|
||||
(pid==SILICOM_PEG2BPI6_SSID)|| \
|
||||
(pid==SILICOM_PEG2BPI6SC6_SSID)|| \
|
||||
(pid==SILICOM_PEG4BPI6FC_SSID)|| \
|
||||
(pid==SILICOM_PEG6BPI6_SSID)|| \
|
||||
(pid==SILICOM_MEG2BPI6_SSID)|| \
|
||||
(pid==SILICOM_XEG2BPI6_SSID)|| \
|
||||
(pid==SILICOM_MEG4BPI6_SSID)|| \
|
||||
(pid==SILICOM_M1EG2BPI6_SSID)|| \
|
||||
(pid==SILICOM_M1EG4BPI6_SSID)|| \
|
||||
(pid==SILICOM_M1EG6BPI6_SSID)|| \
|
||||
(pid==SILICOM_PEG6BPI_SSID)|| \
|
||||
(pid==SILICOM_PEG4BPIL_SSID)|| \
|
||||
(pid==SILICOM_PEG2BISC6_SSID)|| \
|
||||
(pid==SILICOM_PE2G2BPi35_SSID)|| \
|
||||
(pid==SILICOM_PAC1200BPi35_SSID)|| \
|
||||
(pid==SILICOM_PE2G4BPi35_SSID)|| \
|
||||
(pid==SILICOM_PE2G4BPi35L_SSID)|| \
|
||||
(pid==SILICOM_M1E2G4BPi35_SSID)|| \
|
||||
(pid==SILICOM_M1E2G4BPi35JP_SSID)|| \
|
||||
(pid==SILICOM_M1E2G4BPi35JP1_SSID)|| \
|
||||
(pid==SILICOM_PE2G6BPi35_SSID)|| \
|
||||
(pid==SILICOM_PEG2BPI5_SSID))
|
||||
|
||||
|
||||
#define PEG80_IF_SERIES(pid) \
|
||||
((pid==SILICOM_M1E2G4BPi80_SSID)|| \
|
||||
(pid==SILICOM_M6E2G8BPi80_SSID)|| \
|
||||
(pid==SILICOM_PE2G4BPi80L_SSID)|| \
|
||||
(pid==SILICOM_M6E2G8BPi80A_SSID)|| \
|
||||
(pid==SILICOM_PE2G2BPi35_SSID)|| \
|
||||
(pid==SILICOM_PAC1200BPi35_SSID)|| \
|
||||
(pid==SILICOM_PE2G4BPi35_SSID)|| \
|
||||
(pid==SILICOM_PE2G4BPi35L_SSID)|| \
|
||||
(pid==SILICOM_M1E2G4BPi35_SSID)|| \
|
||||
(pid==SILICOM_M1E2G4BPi35JP_SSID)|| \
|
||||
(pid==SILICOM_M1E2G4BPi35JP1_SSID)|| \
|
||||
(pid==SILICOM_PE2G6BPi35_SSID)|| \
|
||||
(pid==SILICOM_PE2G2BPi80_SSID)|| \
|
||||
(pid==SILICOM_PE2G4BPi80_SSID)|| \
|
||||
(pid==SILICOM_PE2G4BPFi80_SSID)|| \
|
||||
(pid==SILICOM_PE2G4BPFi80LX_SSID)|| \
|
||||
(pid==SILICOM_PE2G4BPFi80ZX_SSID)|| \
|
||||
(pid==SILICOM_PE2G4BPFi80ZX_SSID)|| \
|
||||
(pid==SILICOM_PE2G2BPFi80_SSID)|| \
|
||||
(pid==SILICOM_PE2G2BPFi80LX_SSID)|| \
|
||||
(pid==SILICOM_PE2G2BPFi80ZX_SSID)|| \
|
||||
(pid==SILICOM_PE2G2BPFi35_SSID)|| \
|
||||
(pid==SILICOM_PE2G2BPFi35LX_SSID)|| \
|
||||
(pid==SILICOM_PE2G2BPFi35ZX_SSID)|| \
|
||||
(pid==SILICOM_M1E2G4BPFi35_SSID)|| \
|
||||
(pid==SILICOM_M1E2G4BPFi35LX_SSID)|| \
|
||||
(pid==SILICOM_M1E2G4BPFi35ZX_SSID)|| \
|
||||
(pid==SILICOM_PE2G4BPFi35_SSID)|| \
|
||||
(pid==SILICOM_PE2G4BPFi35CS_SSID)|| \
|
||||
(pid==SILICOM_PE2G4BPFi35LX_SSID)|| \
|
||||
(pid==SILICOM_PE2G4BPFi35ZX_SSID))
|
||||
|
||||
|
||||
#define PEGF80_IF_SERIES(pid) \
|
||||
((pid==SILICOM_PE2G4BPFi80_SSID)|| \
|
||||
(pid==SILICOM_PE2G4BPFi80LX_SSID)|| \
|
||||
(pid==SILICOM_PE2G4BPFi80ZX_SSID)|| \
|
||||
(pid==SILICOM_PE2G4BPFi80ZX_SSID)|| \
|
||||
(pid==SILICOM_M1E2G4BPFi80_SSID)|| \
|
||||
(pid==SILICOM_M1E2G4BPFi80LX_SSID)|| \
|
||||
(pid==SILICOM_M1E2G4BPFi80ZX_SSID)|| \
|
||||
(pid==SILICOM_PE2G2BPFi80_SSID)|| \
|
||||
(pid==SILICOM_PE2G2BPFi80LX_SSID)|| \
|
||||
(pid==SILICOM_PE2G2BPFi80ZX_SSID)|| \
|
||||
(pid==SILICOM_PE2G2BPFi35_SSID)|| \
|
||||
(pid==SILICOM_PE2G2BPFi35LX_SSID)|| \
|
||||
(pid==SILICOM_PE2G2BPFi35ZX_SSID)|| \
|
||||
(pid==SILICOM_M1E2G4BPFi35_SSID)|| \
|
||||
(pid==SILICOM_M1E2G4BPFi35LX_SSID)|| \
|
||||
(pid==SILICOM_M1E2G4BPFi35ZX_SSID)|| \
|
||||
(pid==SILICOM_PE2G4BPFi35_SSID)|| \
|
||||
(pid==SILICOM_PE2G4BPFi35CS_SSID)|| \
|
||||
(pid==SILICOM_PE2G4BPFi35LX_SSID)|| \
|
||||
(pid==SILICOM_PE2G4BPFi35ZX_SSID))
|
||||
|
||||
|
||||
#define BP10G9_IF_SERIES(pid) \
|
||||
((pid==INTEL_PE210G2SPI9_SSID)|| \
|
||||
(pid==SILICOM_M1E10G2BPI9CX4_SSID)|| \
|
||||
(pid==SILICOM_M1E10G2BPI9SR_SSID)|| \
|
||||
(pid==SILICOM_M1E10G2BPI9LR_SSID)|| \
|
||||
(pid==SILICOM_M2E10G2BPI9CX4_SSID)|| \
|
||||
(pid==SILICOM_M2E10G2BPI9SR_SSID)|| \
|
||||
(pid==SILICOM_M2E10G2BPI9LR_SSID)|| \
|
||||
(pid==SILICOM_M2E10G2BPI9T_SSID)|| \
|
||||
(pid==SILICOM_PE210G2BPI9CX4_SSID)|| \
|
||||
(pid==SILICOM_PE210G2BPI9SR_SSID)|| \
|
||||
(pid==SILICOM_PE210G2BPI9LR_SSID)|| \
|
||||
(pid==SILICOM_PE210G2BPI9LRD_SSID)|| \
|
||||
(pid==SILICOM_PE210G2BPI9SRD_SSID)|| \
|
||||
(pid==SILICOM_PE210G2DBi9SR_SSID)|| \
|
||||
(pid==SILICOM_PE210G2DBi9SRRB_SSID)|| \
|
||||
(pid==SILICOM_PE210G2DBi9LR_SSID)|| \
|
||||
(pid==SILICOM_PE210G2DBi9LRRB_SSID)|| \
|
||||
(pid==SILICOM_PE310G4DBi940SR_SSID)|| \
|
||||
(pid==SILICOM_PE310G4DBi940LR_SSID)|| \
|
||||
(pid==SILICOM_PE310G4DBi940T_SSID)|| \
|
||||
(pid==SILICOM_PE310G4DBi9T_SSID)|| \
|
||||
(pid==SILICOM_PE310G4BPi9T_SSID)|| \
|
||||
(pid==SILICOM_PE310G4BPi9SR_SSID)|| \
|
||||
(pid==SILICOM_PE310G4BPi9SRD_SSID)|| \
|
||||
(pid==SILICOM_M6E310G4BPi9SR_SSID)|| \
|
||||
(pid==SILICOM_M6E310G4BPi9LR_SSID)|| \
|
||||
(pid==SILICOM_PE310G4BPi9LR_SSID)|| \
|
||||
(pid==SILICOM_PE310G4BPi9LRD_SSID)|| \
|
||||
(pid==SILICOM_M1E210G2BPI9SRDJP_SSID)|| \
|
||||
(pid==SILICOM_M1E210G2BPI9SRDJP1_SSID)|| \
|
||||
(pid==SILICOM_M1E210G2BPI9LRDJP_SSID)|| \
|
||||
(pid==SILICOM_M1E210G2BPI9LRDJP1_SSID)|| \
|
||||
(pid==SILICOM_PE210G2BPI9T_SSID))
|
||||
|
||||
#define BP71_IF_SERIES(pid) \
|
||||
((pid==SILICOM_PEG2BPI_SSID)|| \
|
||||
(pid==SILICOM_PEG2BPIX1_SSID)|| \
|
||||
(pid==SILICOM_PEG4BPIN_SSID)|| \
|
||||
(pid==SILICOM_PEG2BPFILX_SSID)|| \
|
||||
(pid==SILICOM_PEG4BPFI_SSID)|| \
|
||||
(pid==SILICOM_PEG2TBFI_SSID)|| \
|
||||
(pid==SILICOM_PEG4BPIPT_SSID)|| \
|
||||
(pid==SILICOM_PEG2BPFID_SSID)|| \
|
||||
(pid==SILICOM_PEG2BPFIDLX_SSID)|| \
|
||||
(pid==SILICOM_MEG2BPFILN_SSID)|| \
|
||||
(pid==SILICOM_MEG2BPFINX_SSID)|| \
|
||||
(pid==SILICOM_PEG4BPFILX_SSID)|| \
|
||||
(pid==SILICOM_MEG2BPFILXLN_SSID)||\
|
||||
(pid==SILICOM_PXEG4BPFI_SSID))
|
||||
|
||||
|
||||
|
||||
|
||||
/*******************************************************/
|
||||
/* 1G INTERFACE ****************************************/
|
||||
/*******************************************************/
|
||||
|
||||
/* Intel Registers */
|
||||
#define BPCTLI_CTRL 0x00000
|
||||
#define BPCTLI_LEDCTL 0x00E00
|
||||
#define BPCTLI_CTRL_SWDPIO0 0x00400000
|
||||
#define BPCTLI_CTRL_SWDPIN0 0x00040000
|
||||
|
||||
#define BPCTLI_DCA_ID 0x5B70
|
||||
|
||||
|
||||
#define BPCTLI_CTRL_EXT 0x00018 /* Extended Device Control - RW */
|
||||
#define BPCTLI_STATUS 0x00008 /* Device Status - RO */
|
||||
|
||||
#define BPCTLI_EERD 0x14
|
||||
#define BPCTLI_EEWR 0x102c
|
||||
|
||||
/* HW related */
|
||||
#define BPCTLI_CTRL_EXT_SDP6_DATA 0x00000040 /* Value of SW Defineable Pin 6 */
|
||||
#define BPCTLI_CTRL_EXT_SDP7_DATA 0x00000080 /* Value of SW Defineable Pin 7 */
|
||||
#define BPCTLI_CTRL_SDP0_DATA 0x00040000 /* SWDPIN 0 value */
|
||||
#define BPCTLI_CTRL_EXT_SDP6_DIR 0x00000400 /* Direction of SDP6 0=in 1=out */
|
||||
#define BPCTLI_CTRL_EXT_SDP7_DIR 0x00000800 /* Direction of SDP7 0=in 1=out */
|
||||
#define BPCTLI_CTRL_SDP0_DIR 0x00400000 /* SDP0 Input or output */
|
||||
#define BPCTLI_CTRL_SWDPIN0 0x00040000
|
||||
#define BPCTLI_CTRL_SWDPIN1 0x00080000
|
||||
#define BPCTLI_CTRL_SDP1_DIR 0x00800000
|
||||
|
||||
#define BPCTLI_STATUS_LU 0x00000002 /* Link up.0=no,1=link */
|
||||
|
||||
|
||||
#define BPCTLI_CTRL_SDP0_SHIFT 18
|
||||
#define BPCTLI_CTRL_EXT_SDP6_SHIFT 6
|
||||
|
||||
#define BPCTLI_STATUS_TBIMODE 0x00000020
|
||||
#define BPCTLI_CTRL_EXT_LINK_MODE_PCIE_SERDES 0x00C00000
|
||||
#define BPCTLI_CTRL_EXT_LINK_MODE_MASK 0x00C00000
|
||||
|
||||
#define BPCTLI_LEDCTL_MODE_LED_ON 0xE
|
||||
#define BPCTLI_LEDCTL_MODE_LED_OFF 0xF
|
||||
|
||||
#define BPCTLI_LEDCTL_LED0_MODE_MASK 0x0000000F
|
||||
#define BPCTLI_LEDCTL_LED0_MODE_SHIFT 0
|
||||
#define BPCTLI_LEDCTL_LED0_BLINK_RATE 0x0000020
|
||||
#define BPCTLI_LEDCTL_LED0_IVRT 0x00000040
|
||||
#define BPCTLI_LEDCTL_LED0_BLINK 0x00000080
|
||||
|
||||
|
||||
#define BPCTLI_CTRL_EXT_MCLK_DIR BPCTLI_CTRL_EXT_SDP7_DIR
|
||||
#define BPCTLI_CTRL_EXT_MCLK_DATA BPCTLI_CTRL_EXT_SDP7_DATA
|
||||
#define BPCTLI_CTRL_EXT_MDIO_DIR BPCTLI_CTRL_EXT_SDP6_DIR
|
||||
#define BPCTLI_CTRL_EXT_MDIO_DATA BPCTLI_CTRL_EXT_SDP6_DATA
|
||||
|
||||
#define BPCTLI_CTRL_EXT_MCLK_DIR5 BPCTLI_CTRL_SDP1_DIR
|
||||
#define BPCTLI_CTRL_EXT_MCLK_DATA5 BPCTLI_CTRL_SWDPIN1
|
||||
#define BPCTLI_CTRL_EXT_MCLK_DIR80 BPCTLI_CTRL_EXT_SDP6_DIR
|
||||
#define BPCTLI_CTRL_EXT_MCLK_DATA80 BPCTLI_CTRL_EXT_SDP6_DATA
|
||||
#define BPCTLI_CTRL_EXT_MDIO_DIR5 BPCTLI_CTRL_SWDPIO0
|
||||
#define BPCTLI_CTRL_EXT_MDIO_DATA5 BPCTLI_CTRL_SWDPIN0
|
||||
#define BPCTLI_CTRL_EXT_MDIO_DIR80 BPCTLI_CTRL_SWDPIO0
|
||||
#define BPCTLI_CTRL_EXT_MDIO_DATA80 BPCTLI_CTRL_SWDPIN0
|
||||
|
||||
|
||||
|
||||
#define BPCTL_WRITE_REG(a, reg, value) \
|
||||
(writel((value), (void *)(((a)->mem_map) + BPCTLI_##reg)))
|
||||
|
||||
#define BPCTL_READ_REG(a, reg) ( \
|
||||
readl((void *)((a)->mem_map) + BPCTLI_##reg))
|
||||
|
||||
|
||||
#define BPCTL_WRITE_FLUSH(a) BPCTL_READ_REG(a, STATUS)
|
||||
|
||||
#define BPCTL_BP_WRITE_REG(a, reg, value) ({ \
|
||||
BPCTL_WRITE_REG(a, reg, value); \
|
||||
BPCTL_WRITE_FLUSH(a);})
|
||||
|
||||
/**************************************************************/
|
||||
/************** 82575 Interface********************************/
|
||||
/**************************************************************/
|
||||
|
||||
#define BPCTLI_MII_CR_POWER_DOWN 0x0800
|
||||
#define BPCTLI_PHY_CONTROL 0x00 /* Control Register */
|
||||
#define BPCTLI_MDIC 0x00020 /* MDI Control - RW */
|
||||
#define BPCTLI_IGP01E1000_PHY_PAGE_SELECT 0x1F /* Page Select */
|
||||
#define BPCTLI_MAX_PHY_REG_ADDRESS 0x1F /* 5 bit address bus (0-0x1F) */
|
||||
|
||||
#define BPCTLI_MDIC_DATA_MASK 0x0000FFFF
|
||||
#define BPCTLI_MDIC_REG_MASK 0x001F0000
|
||||
#define BPCTLI_MDIC_REG_SHIFT 16
|
||||
#define BPCTLI_MDIC_PHY_MASK 0x03E00000
|
||||
#define BPCTLI_MDIC_PHY_SHIFT 21
|
||||
#define BPCTLI_MDIC_OP_WRITE 0x04000000
|
||||
#define BPCTLI_MDIC_OP_READ 0x08000000
|
||||
#define BPCTLI_MDIC_READY 0x10000000
|
||||
#define BPCTLI_MDIC_INT_EN 0x20000000
|
||||
#define BPCTLI_MDIC_ERROR 0x40000000
|
||||
|
||||
|
||||
#define BPCTLI_SWFW_PHY0_SM 0x02
|
||||
#define BPCTLI_SWFW_PHY1_SM 0x04
|
||||
|
||||
#define BPCTLI_SW_FW_SYNC 0x05B5C /* Software-Firmware Synchronization - RW */
|
||||
|
||||
#define BPCTLI_SWSM 0x05B50 /* SW Semaphore */
|
||||
#define BPCTLI_FWSM 0x05B54 /* FW Semaphore */
|
||||
|
||||
#define BPCTLI_SWSM_SMBI 0x00000001 /* Driver Semaphore bit */
|
||||
#define BPCTLI_SWSM_SWESMBI 0x00000002 /* FW Semaphore bit */
|
||||
#define BPCTLI_MAX_PHY_MULTI_PAGE_REG 0xF
|
||||
#define BPCTLI_GEN_POLL_TIMEOUT 640
|
||||
|
||||
/********************************************************/
|
||||
|
||||
|
||||
|
||||
|
||||
/********************************************************/
|
||||
/* 10G INTERFACE ****************************************/
|
||||
/********************************************************/
|
||||
|
||||
#define BP10G_I2CCTL 0x28
|
||||
|
||||
/* I2CCTL Bit Masks */
|
||||
#define BP10G_I2C_CLK_IN 0x00000001
|
||||
#define BP10G_I2C_CLK_OUT 0x00000002
|
||||
#define BP10G_I2C_DATA_IN 0x00000004
|
||||
#define BP10G_I2C_DATA_OUT 0x00000008
|
||||
|
||||
|
||||
#define BP10G_ESDP 0x20
|
||||
#define BP10G_DCA_ID 0x11070
|
||||
|
||||
#define BP10G_SDP0_DIR 0x100
|
||||
#define BP10G_SDP1_DIR 0x200
|
||||
#define BP10G_SDP3_DIR 0x800
|
||||
#define BP10G_SDP4_DIR BIT_12
|
||||
#define BP10G_SDP5_DIR 0x2000
|
||||
#define BP10G_SDP0_DATA 0x001
|
||||
#define BP10G_SDP1_DATA 0x002
|
||||
#define BP10G_SDP3_DATA 0x008
|
||||
#define BP10G_SDP4_DATA 0x010
|
||||
#define BP10G_SDP5_DATA 0x020
|
||||
|
||||
#define BP10G_SDP2_DIR 0x400
|
||||
#define BP10G_SDP2_DATA 0x4
|
||||
|
||||
|
||||
#define BP10G_EODSDP 0x28
|
||||
|
||||
#define BP10G_SDP6_DATA_IN 0x001
|
||||
#define BP10G_SDP6_DATA_OUT 0x002
|
||||
|
||||
#define BP10G_SDP7_DATA_IN 0x004
|
||||
#define BP10G_SDP7_DATA_OUT 0x008
|
||||
|
||||
#define BP10G_MCLK_DATA_OUT BP10G_SDP7_DATA_OUT
|
||||
#define BP10G_MDIO_DATA_OUT BP10G_SDP6_DATA_OUT
|
||||
#define BP10G_MDIO_DATA_IN BP10G_SDP6_DATA_IN
|
||||
|
||||
#define BP10G_MDIO_DATA /*BP10G_SDP5_DATA*/ BP10G_SDP3_DATA
|
||||
#define BP10G_MDIO_DIR /*BP10G_SDP5_DIR*/ BP10G_SDP3_DATA
|
||||
|
||||
/*#define BP10G_MCLK_DATA_OUT9 BP10G_I2C_CLK_OUT
|
||||
#define BP10G_MDIO_DATA_OUT9 BP10G_I2C_DATA_OUT*/
|
||||
|
||||
|
||||
/*#define BP10G_MCLK_DATA_OUT9*/ /*BP10G_I2C_DATA_OUT*/
|
||||
#define BP10G_MDIO_DATA_OUT9 BP10G_I2C_DATA_OUT /*BP10G_I2C_CLK_OUT*/
|
||||
|
||||
/* VIA EOSDP ! */
|
||||
#define BP10G_MCLK_DATA_OUT9 BP10G_SDP4_DATA
|
||||
#define BP10G_MCLK_DIR_OUT9 BP10G_SDP4_DIR
|
||||
|
||||
|
||||
/*#define BP10G_MDIO_DATA_IN9 BP10G_I2C_DATA_IN*/
|
||||
|
||||
#define BP10G_MDIO_DATA_IN9 BP10G_I2C_DATA_IN /*BP10G_I2C_CLK_IN*/
|
||||
|
||||
#define BP10G_LEDCTL 0x00200
|
||||
|
||||
/* LEDCTL Bit Masks */
|
||||
#define BP10G_LED_IVRT_BASE 0x00000040
|
||||
#define BP10G_LED_BLINK_BASE 0x00000080
|
||||
#define BP10G_LED_MODE_MASK_BASE 0x0000000F
|
||||
#define BP10G_LED_OFFSET(_base, _i) (_base << (8 * (_i)))
|
||||
#define BP10G_LED_MODE_SHIFT(_i) (8*(_i))
|
||||
#define BP10G_LED_IVRT(_i) BP10G_LED_OFFSET(BP10G_LED_IVRT_BASE, _i)
|
||||
#define BP10G_LED_BLINK(_i) BP10G_LED_OFFSET(BP10G_LED_BLINK_BASE, _i)
|
||||
#define BP10G_LED_MODE_MASK(_i) BP10G_LED_OFFSET(BP10G_LED_MODE_MASK_BASE, _i)
|
||||
|
||||
/* LED modes */
|
||||
#define BP10G_LED_LINK_UP 0x0
|
||||
#define BP10G_LED_LINK_10G 0x1
|
||||
#define BP10G_LED_MAC 0x2
|
||||
#define BP10G_LED_FILTER 0x3
|
||||
#define BP10G_LED_LINK_ACTIVE 0x4
|
||||
#define BP10G_LED_LINK_1G 0x5
|
||||
#define BP10G_LED_ON 0xE
|
||||
#define BP10G_LED_OFF 0xF
|
||||
|
||||
#define BP10G_STATUS 0x00008
|
||||
#define BP540_MDIO_DATA /*BP10G_SDP5_DATA*/ BP10G_SDP0_DATA
|
||||
#define BP540_MDIO_DIR /*BP10G_SDP5_DIR*/ BP10G_SDP0_DIR
|
||||
#define BP540_MCLK_DATA BP10G_SDP2_DATA
|
||||
#define BP540_MCLK_DIR BP10G_SDP2_DIR
|
||||
|
||||
|
||||
|
||||
#define BP10G_WRITE_REG(a, reg, value) \
|
||||
(writel((value), (void *)(((a)->mem_map) + BP10G_##reg)))
|
||||
|
||||
#define BP10G_READ_REG(a, reg) ( \
|
||||
readl((void *)((a)->mem_map) + BP10G_##reg))
|
||||
|
||||
/*****BROADCOM*******************************************/
|
||||
|
||||
#define BP10GB_MISC_REG_GPIO 0xa490
|
||||
#define BP10GB_GPIO3_P0 BIT_3
|
||||
#define BP10GB_GPIO3_P1 BIT_7
|
||||
|
||||
#define BP10GB_GPIO3_SET_P0 BIT_11
|
||||
#define BP10GB_GPIO3_CLR_P0 BIT_19
|
||||
#define BP10GB_GPIO3_OE_P0 BIT_27
|
||||
|
||||
#define BP10GB_GPIO3_SET_P1 BIT_15
|
||||
#define BP10GB_GPIO3_CLR_P1 BIT_23
|
||||
#define BP10GB_GPIO3_OE_P1 BIT_31
|
||||
|
||||
#define BP10GB_GPIO0_P1 0x10
|
||||
#define BP10GB_GPIO0_P0 0x1
|
||||
#define BP10GB_GPIO0_CLR_P0 0x10000
|
||||
#define BP10GB_GPIO0_CLR_P1 0x100000
|
||||
#define BP10GB_GPIO0_SET_P0 0x100
|
||||
#define BP10GB_GPIO0_SET_P1 0x1000
|
||||
|
||||
|
||||
|
||||
#define BP10GB_GPIO0_OE_P1 0x10000000
|
||||
#define BP10GB_GPIO0_OE_P0 0x1000000
|
||||
|
||||
#define BP10GB_MISC_REG_SPIO 0xa4fc
|
||||
#define BP10GB_GPIO4_OE BIT_28
|
||||
#define BP10GB_GPIO5_OE BIT_29
|
||||
#define BP10GB_GPIO4_CLR BIT_20
|
||||
#define BP10GB_GPIO5_CLR BIT_21
|
||||
#define BP10GB_GPIO4_SET BIT_12
|
||||
#define BP10GB_GPIO5_SET BIT_13
|
||||
#define BP10GB_GPIO4 BIT_4
|
||||
#define BP10GB_GPIO5 BIT_5
|
||||
|
||||
|
||||
|
||||
#define BP10GB_MCLK_DIR BP10GB_GPIO5_OE
|
||||
#define BP10GB_MDIO_DIR BP10GB_GPIO4_OE
|
||||
|
||||
#define BP10GB_MCLK_DATA BP10GB_GPIO5
|
||||
#define BP10GB_MDIO_DATA BP10GB_GPIO4
|
||||
|
||||
#define BP10GB_MCLK_SET BP10GB_GPIO5_SET
|
||||
#define BP10GB_MDIO_SET BP10GB_GPIO4_SET
|
||||
|
||||
#define BP10GB_MCLK_CLR BP10GB_GPIO5_CLR
|
||||
#define BP10GB_MDIO_CLR BP10GB_GPIO4_CLR
|
||||
|
||||
|
||||
/* toggle LED 4 times per second = 2 "blinks" per second */
|
||||
#define BPVM_ID_INTERVAL (HZ/4)
|
||||
|
||||
/* bit defines for adapter->led_status */
|
||||
#define BPVM_LED_ON 0
|
||||
|
||||
/*#define BPCTLI_LEDCTL_MODE_LED_ON 0xE
|
||||
#define BPCTLI_LEDCTL_MODE_LED_OFF 0xF*/
|
||||
|
||||
#define BPCTLI_EEPROM_ID_LED_SETTINGS 0x0004
|
||||
#define ID_LED_RESERVED_0000 0x0000
|
||||
#define ID_LED_RESERVED_FFFF 0xFFFF
|
||||
#define ID_LED_DEFAULT ((ID_LED_OFF1_ON2 << 12) | \
|
||||
(ID_LED_OFF1_OFF2 << 8) | \
|
||||
(ID_LED_DEF1_DEF2 << 4) | \
|
||||
(ID_LED_DEF1_DEF2))
|
||||
#define ID_LED_DEFAULT_ICH8LAN ((ID_LED_DEF1_DEF2 << 12) | \
|
||||
(ID_LED_DEF1_OFF2 << 8) | \
|
||||
(ID_LED_DEF1_ON2 << 4) | \
|
||||
(ID_LED_DEF1_DEF2))
|
||||
#define ID_LED_DEF1_DEF2 0x1
|
||||
#define ID_LED_DEF1_ON2 0x2
|
||||
#define ID_LED_DEF1_OFF2 0x3
|
||||
#define ID_LED_ON1_DEF2 0x4
|
||||
#define ID_LED_ON1_ON2 0x5
|
||||
#define ID_LED_ON1_OFF2 0x6
|
||||
#define ID_LED_OFF1_DEF2 0x7
|
||||
#define ID_LED_OFF1_ON2 0x8
|
||||
#define ID_LED_OFF1_OFF2 0x9
|
||||
|
||||
#define BPCTL_SUCCESS 0
|
||||
#define BPCTL_NVM_POLL_READ 0
|
||||
#define BPCTL_NVM_RW_ADDR_SHIFT 2
|
||||
#define BPCTL_ERR_NVM 1
|
||||
#define BPCTL_NVM_RW_REG_DATA 16
|
||||
#define BPCTL_NVM_RW_REG_DONE 2
|
||||
|
||||
#define BPCTL_NVM_RW_REG_START 1
|
||||
|
||||
#define BP40G_I2CCMD 0x000881E0
|
||||
#define BP40G_I2CSEL 0x000881C0
|
||||
#define BP40G_I2CPARAMS 0x000881AC
|
||||
|
||||
#define BP40G_CLK_DATA_OUT BIT_9
|
||||
#define BP40G_MDIO_DATA_OUT BIT_10
|
||||
#define BP40G_MDIO_DIR_OUTN BIT_11
|
||||
#define BP40G_MDIO_DATA_IN BIT_12
|
||||
#define BP40G_CLK_DIR_OUTN BIT_13
|
||||
|
||||
#define BP40G_GPIO_SET 0x00088184
|
||||
#define BP40G_GPIO_STAT 0x0008817C
|
||||
|
||||
#define BP40GB_GPIO_OE BIT_4
|
||||
#define BP40GB_GPIO_SDP_MODE_MASK (BIT_7 | BIT_8 | BIT_9)
|
||||
|
||||
#define TIME_CLK 10 //40 //20 //10
|
||||
#define TIME_DET //10 // 5
|
||||
|
||||
|
||||
#define BP10GB_WRITE_REG(a, reg, value) \
|
||||
(writel((value), (void *)(((a)->mem_map) + BP10GB_##reg)))
|
||||
|
||||
#define BP10GB_READ_REG(a, reg) ( \
|
||||
readl((void *)((a)->mem_map) + BP10GB_##reg))
|
||||
|
||||
#define BP10G_WRITE_FLUSH(a) BP10G_READ_REG(a, STATUS)
|
||||
|
||||
#define BP40G_READ_REG(a, reg) ( \
|
||||
readl((void *)((a)->mem_map) + BP40G_##reg+0x4*((a)->func)))
|
||||
|
||||
#define BP40G_WRITE_REG(a, reg, value) \
|
||||
(writel((value), (void *)(((a)->mem_map) + BP40G_##reg+0x4*((a)->func))))
|
||||
|
||||
#define BP40G_READ_GPIO_CTL(a, n) ( \
|
||||
readl((void *)((a)->mem_map) + 0x88100+0x4*n))
|
||||
|
||||
#define BP40G_WRITE_GPIO_CTL(a, n, value) \
|
||||
(writel((value), (void *)(((a)->mem_map) + 0x88100+0x4*n)))
|
||||
|
||||
#define BP40G_WR_REG(a, reg, value) \
|
||||
(writel((value), (void *)(((a)->mem_map) + BP40G_##reg)))
|
||||
|
||||
#define BP40G_RD_REG(a, reg) ( \
|
||||
readl((void *)((a)->mem_map) + BP40G_##reg))
|
||||
|
||||
|
||||
#endif
|
||||
330
bp_msg.h
Executable file
330
bp_msg.h
Executable file
|
|
@ -0,0 +1,330 @@
|
|||
/**************************************************************************
|
||||
|
||||
Copyright (c) 2006-2013, Silicom
|
||||
All rights reserved.
|
||||
|
||||
Redistribution and use in source and binary forms, with or without
|
||||
modification, are permitted provided that the following conditions are met:
|
||||
|
||||
1. Redistributions of source code must retain the above copyright notice,
|
||||
this list of conditions and the following disclaimer.
|
||||
|
||||
2. Redistributions in binary form must reproduce the above copyright
|
||||
notice, this list of conditions and the following disclaimer in the
|
||||
documentation and/or other materials provided with the distribution.
|
||||
|
||||
3. Neither the name of the Silicom nor the names of its
|
||||
contributors may be used to endorse or promote products derived from
|
||||
this software without specific prior written permission.
|
||||
|
||||
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
|
||||
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
POSSIBILITY OF SUCH DAMAGE.
|
||||
|
||||
***************************************************************************/
|
||||
|
||||
#ifndef _BP_MSG_H
|
||||
#define _BP_MSG_H
|
||||
|
||||
#define HELP_ENTRY "help"
|
||||
#define INFO_ENTRY "info"
|
||||
|
||||
#define IS_BYPASS_ENTRY "is_bypass"
|
||||
#define GET_BYPASS_SLAVE_ENTRY "get_bypass_slave"
|
||||
#define GET_BYPASS_CAPS_ENTRY "get_bypass_caps"
|
||||
#define GET_WD_SET_CAPS_ENTRY "get_wd_set_caps"
|
||||
#define SET_BYPASS_ENTRY "set_bypass"
|
||||
#define GET_BYPASS_ENTRY "get_bypass"
|
||||
#define GET_WD_EXPIRE_ENTRY "get_wd_expire"
|
||||
#define GET_BYPASS_CHANGE_ENTRY "get_bypass_change"
|
||||
#define SET_DIS_BYPASS_ENTRY "set_dis_bypass"
|
||||
#define GET_DIS_BYPASS_ENTRY "get_dis_bypass"
|
||||
#define SET_BYPASS_PWOFF_ENTRY "set_bypass_pwoff"
|
||||
#define GET_BYPASS_PWOFF_ENTRY "get_bypass_pwoff"
|
||||
#define SET_BYPASS_PWUP_ENTRY "set_bypass_pwup"
|
||||
#define GET_BYPASS_PWUP_ENTRY "get_bypass_pwup"
|
||||
#define SET_STD_NIC_ENTRY "set_std_nic"
|
||||
#define GET_STD_NIC_ENTRY "get_std_nic"
|
||||
#define SET_BYPASS_WD_ENTRY "set_bypass_wd"
|
||||
#define GET_BYPASS_WD_ENTRY "get_bypass_wd"
|
||||
#define GET_WD_EXPIRE_TIME_ENTRY "get_wd_time_expire"
|
||||
#define RESET_BYPASS_WD_TIMER_ENTRY "reset_bypass_wd"
|
||||
#define SET_TX_ENTRY "set_tx"
|
||||
#define GET_TX_ENTRY "get_tx"
|
||||
#define BYPASS_ENABLE "on"
|
||||
#define BYPASS_DISABLE "off"
|
||||
#define TAP_MODE "tap"
|
||||
#define BYPASS_MODE "bypass"
|
||||
#define DISC_MODE "disc"
|
||||
#define SET_TAP_ENTRY "set_tap"
|
||||
#define GET_TAP_ENTRY "get_tap"
|
||||
#define SET_FORCE_LINK_ENTRY "set_force_link_on"
|
||||
#define GET_FORCE_LINK_ENTRY "get_force_link_on"
|
||||
#define SET_BP_MANUF_ENTRY "set_bp_manuf"
|
||||
|
||||
|
||||
#define SET_HW_RESET_ENTRY "set_hw_reset"
|
||||
#define GET_HW_RESET_ENTRY "get_hw_reset"
|
||||
|
||||
#define SET_WAIT_AT_PWUP_ENTRY "set_wait_at_pwup"
|
||||
#define GET_WAIT_AT_PWUP_ENTRY "get_wait_at_pwup"
|
||||
|
||||
|
||||
#define GET_TAP_CHANGE_ENTRY "get_tap_change"
|
||||
#define SET_DIS_TAP_ENTRY "set_dis_tap"
|
||||
#define GET_DIS_TAP_ENTRY "get_dis_tap"
|
||||
#define SET_TAP_PWUP_ENTRY "set_tap_pwup"
|
||||
#define GET_TAP_PWUP_ENTRY "get_tap_pwup"
|
||||
#define SET_DISC_ENTRY "set_disc"
|
||||
#define GET_DISC_ENTRY "get_disc"
|
||||
#define GET_DISC_CHANGE_ENTRY "get_disc_change"
|
||||
#define SET_DIS_DISC_ENTRY "set_dis_disc"
|
||||
#define GET_DIS_DISC_ENTRY "get_dis_disc"
|
||||
#define SET_DISC_PWUP_ENTRY "set_disc_pwup"
|
||||
#define GET_DISC_PWUP_ENTRY "get_disc_pwup"
|
||||
#define SET_WD_EXP_MODE_ENTRY "set_wd_exp_mode"
|
||||
#define GET_WD_EXP_MODE_ENTRY "get_wd_exp_mode"
|
||||
#define SET_WD_AUTORESET_ENTRY "set_wd_autoreset"
|
||||
#define GET_WD_AUTORESET_ENTRY "get_wd_autoreset"
|
||||
#define GET_BYPASS_INFO_ENTRY "get_bypass_info"
|
||||
|
||||
#ifdef BP_SELF_TEST
|
||||
#define SET_BP_SELF_TEST_ENTRY "set_bst"
|
||||
#define GET_BP_SELF_TEST_ENTRY "get_bst"
|
||||
#endif
|
||||
|
||||
#define IF_NAME "eth"
|
||||
|
||||
/********MESSAGES*************/
|
||||
#define NO_BPT_DEV_MSG "No Bypass/TAP control devices were found\n"
|
||||
#define NOT_SUPP_MSG "The interface is not capable of the operation.\n"
|
||||
#define NOT_SUPP_BP_MSG "The interface doesn't support Bypass.\n"
|
||||
#define NOT_SUPP_BPT_MSG "The interface doesn't support Bypass/TAP.\n"
|
||||
#define SLAVE_IF_MSG "The interface is a slave interface.\n"
|
||||
#define MASTER_IF_MSG "The interface is a control interface.\n"
|
||||
#define NOT_SUPP_BPT_SLAVE_MSG "The interface is a slave interface or doesn't support Bypass/TAP.\n"
|
||||
#define NOT_SUPP_BP_SLAVE_MSG "The interface is a slave interface or doesn't support Bypass.\n"
|
||||
#define NOT_SUPP_BP_SLAVE_UN_MSG "The interface is a slave interface or doesn't support Bypass or Bypass state is unknown.\n"
|
||||
#define NOT_SUPP_TAP_SLAVE_MSG "The interface is a slave interface or doesn't support TAP.\n"
|
||||
#define NOT_SUPP_SLAVE_MSG "The interface is a slave interface or doesn't support this feature.\n"
|
||||
#define BP_PAIR_MSG "%s is a slave port.\n"
|
||||
#define SUCCESS_MSG "completed successfully.\n"
|
||||
#define BP_MODE_MSG "The interface is in the Bypass mode.\n"
|
||||
#define NON_BP_MODE_MSG "The interface is in the non-Bypass mode.\n"
|
||||
#define TAP_MODE_MSG "The interface is in the TAP mode.\n"
|
||||
#define DISC_MODE_MSG "The interface is in the Disconnect mode.\n"
|
||||
#define DISC_PORT_MODE_MSG "The interface is in the Disconnect Port mode.\n"
|
||||
|
||||
#define NON_TAP_MODE_MSG "The interface is in the non-TAP mode.\n"
|
||||
#define NON_DISC_MODE_MSG "The interface is in the non-Disconnect mode.\n"
|
||||
#define NON_DISC_PORT_MODE_MSG "The interface is in the non-Disconnect Port mode.\n"
|
||||
#define NORMAL_MODE_MSG "The interface is in the Normal mode.\n"
|
||||
#define TAP_BP_MODE_EN_MSG "Bypass/TAP mode is enabled.\n"
|
||||
#define NORMAL_MODE_LAST_MSG "There was no change to bypass/tap/disc from last read of the status.\n"
|
||||
#define NON_BYPASS_MODE_LAST_MSG "There was no change to bypass from last read of the status.\n"
|
||||
#define NON_TAP_MODE_LAST_MSG "There was no change to tap from last read of the status.\n"
|
||||
#define NON_DISC_MODE_LAST_MSG "There was no change to disconnect from last read of the status.\n"
|
||||
|
||||
#define TAP_MODE_LAST_MSG "There was a change to TAP state or it's now in TAP state.\n"
|
||||
//#define NON_TAP_MODE_LAST_MSG "There was a change to non-TAP state or it's now in non-TAP state.\n"
|
||||
|
||||
#define DISC_MODE_LAST_MSG "There was a change to Disconnect state or it's now in Disconnect state.\n"
|
||||
//#define NON_DISC_MODE_LAST_MSG "There was a change to non-Disconnect state or it's now in non-Disconnect state.\n"
|
||||
#define BP_MODE_LAST_MSG "There was a change to Bypass state or it's now in Bypass state.\n"
|
||||
#define BP_MODE_EN_MSG "Bypass mode is enabled.\n"
|
||||
#define BP_MODE_DIS_MSG "Bypass mode is disabled.\n"
|
||||
#define TAP_MODE_EN_MSG "TAP mode is enabled.\n"
|
||||
#define TAP_MODE_DIS_MSG "TAP mode is disabled.\n"
|
||||
#define DISC_MODE_EN_MSG "Disconnect mode is enabled.\n"
|
||||
#define DISC_MODE_DIS_MSG "Disconnect mode is disabled.\n"
|
||||
#define BP_DIS_PWOFF_MSG "The interface is in the non-Bypass mode at power off state.\n"
|
||||
#define BP_EN_PWOFF_MSG "The interface is in the Bypass mode at power off state.\n"
|
||||
#define BP_DIS_PWUP_MSG "The interface is in the non-Bypass mode at power up state.\n"
|
||||
#define BP_EN_PWUP_MSG "The interface is in the Bypass mode at power up state.\n"
|
||||
#define TAP_EN_PWUP_MSG "The interface is in the TAP mode at power up state.\n"
|
||||
#define TAP_DIS_PWUP_MSG "The interface is in the non-TAP mode at power up state.\n"
|
||||
#define DISC_EN_PWUP_MSG "The interface is in the Disconnect mode at power up state.\n"
|
||||
#define DISC_DIS_PWUP_MSG "The interface is in the non-Disconnect mode at power up state.\n"
|
||||
#define DISC_PORT_EN_PWUP_MSG "The interface is in the Disconnect Port mode at power up state.\n"
|
||||
#define DISC_PORT_DIS_PWUP_MSG "The interface is in the non-Disconnect Port mode at power up state.\n"
|
||||
|
||||
#define WDT_STATE_MSG "WDT is enabled with %d ms timeout value.\n"
|
||||
#define WD_DIS_MSG "WDT is disabled.\n"
|
||||
#define NOT_WD_DIS_MSG "WDT is disabled or WDT state is unknown.\n"
|
||||
#define WD_STATE_EXT_MSG "WDT is enabled with %d ms timeout value.\n"
|
||||
#define WD_TIME_LEFT_MSG "WDT is enabled; %d ms time left till WDT expired.\n"
|
||||
#define WD_STATE_UNKNOWN_MSG "WDT state is unknown.\n"
|
||||
#define NOT_NET_DEV_MSG "%s does not appear to be a Silicom Bypass device. Must be "IF_NAME"<if_num>.\n"
|
||||
#define NOT_WDT_SLAVE_MSG "The interface is a slave interface or WDT state is unknown.\n"
|
||||
#define WDT_EXP_MSG "WDT has expired.\n"
|
||||
#define STD_NIC_MODE_MSG "The interface is in Standard NIC mode.\n"
|
||||
#define NON_STD_NIC_MODE_MSG "The interface is not in Standard NIC mode.\n"
|
||||
#define TX_EN_MSG "Transmit is enable.\n"
|
||||
#define TX_DIS_MSG "Transmit is disable.\n"
|
||||
#define TPL_EN_MSG "TPL is enable.\n"
|
||||
#define TPL_DIS_MSG "TPL is disable.\n"
|
||||
#define TAP_WD_EXP_MODE_MSG "When WDT timeout occurs, the interface will be in the TAP mode.\n"
|
||||
#define BYPASS_WD_EXP_MODE_MSG "When WDT timeout occurs, the interface will be in the Bypass mode.\n"
|
||||
#define BP_WAIT_AT_PWUP_EN_MSG "wait_at_pwup is enable.\n"
|
||||
#define BP_WAIT_AT_PWUP_DIS_MSG "wait_at_pwup is disable.\n"
|
||||
#define BP_HW_RESET_EN_MSG "hw_reset is enable.\n"
|
||||
#define BP_HW_RESET_DIS_MSG "hw_reset is disable.\n"
|
||||
#define FORCE_LINK_EN_MSG "Force link is enable.\n"
|
||||
#define FORCE_LINK_DIS_MSG "Force link is disable.\n"
|
||||
|
||||
#define DISC_WD_EXP_MODE_MSG "When WDT timeout occurs, the interface will be in the Disconnect mode.\n"
|
||||
#define NOT_DEV_MSG "No such device.\n"
|
||||
#define GET_BPSLAVE_FAIL_MSG "Get Bypass slave failed.\n"
|
||||
#define SET_BP_FAIL_MSG "Set Bypass failed.\n"
|
||||
#define GET_BP_FAIL_MSG "Get Bypass failed.\n"
|
||||
#define GET_BP_CHANGE_FAIL_MSG "Get Bypass change failed.\n"
|
||||
#define SET_DIS_BP_FAIL_MSG "Set disable Bypass failed.\n"
|
||||
#define GET_DIS_BP_FAIL_MSG "Get disable Bypass failed.\n"
|
||||
#define SET_BP_PWOFF_FAIL_MSG "Set Bypass/Normal mode on Power Off failed.\n"
|
||||
#define GET_BP_PWOFF_FAIL_MSG "Get Bypass/Normal mode on Power Off failed.\n"
|
||||
#define SET_BP_PWUP_FAIL_MSG "Set Bypass/Normal mode on Power Up failed.\n"
|
||||
#define GET_BP_PWUP_FAIL_MSG "Get Bypass/Normal mode on Power Up failed.\n"
|
||||
#define SET_BP_WD_FAIL_MSG "Set Bypass WD failed.\n"
|
||||
#define GET_BP_WD_FAIL_MSG "Get Bypass WD failed.\n"
|
||||
#define RESET_BP_WD_FAIL_MSG "Reset Bypass WD failed\n"
|
||||
#define SET_STD_NIC_FAIL_MSG "Set Standard NIC mode failed\n"
|
||||
#define GET_TAP_PWUP_FAIL_MSG "Get TAP mode on power up failed\n"
|
||||
#define GET_TAP_FAIL_MSG "Get TAP mode failed\n"
|
||||
#define GET_TAP_CHANGE_FAIL_MSG "Get TAP change failed.\n"
|
||||
#define GET_DIS_TAP_FAIL_MSG "Get disable TAP failed.\n"
|
||||
|
||||
#define GET_DISC_PWUP_FAIL_MSG "Get Disconnect mode on power up failed\n"
|
||||
#define GET_DISC_FAIL_MSG "Get Disconnect mode failed\n"
|
||||
|
||||
#define GET_DISC_PORT_PWUP_FAIL_MSG "Get Disconnect Port mode on power up failed\n"
|
||||
#define GET_DISC_PORT_FAIL_MSG "Get Disconnect Port mode failed\n"
|
||||
|
||||
#define GET_DISC_CHANGE_FAIL_MSG "Get Disconnect change failed.\n"
|
||||
#define GET_DIS_DISC_FAIL_MSG "Get disable Disconnect failed.\n"
|
||||
|
||||
#define WD_AUTORESET_STATE_MSG "WDT autoreset is enabled with %d ms period.\n"
|
||||
#define WD_AUTORESET_DIS_MSG "WDT autoreset is disabled.\n"
|
||||
|
||||
#ifdef BP_SELF_TEST
|
||||
#define BP_SELF_TEST_MSG "Bypass Self Test is enabled with %d ms period.\n"
|
||||
#define BP_SELF_TEST_DIS_MSG "Bypass Self Test is disabled.\n"
|
||||
#endif
|
||||
|
||||
|
||||
#define NOT_SUPP_TXCTL_MSG "The interface doesn't support TX Control feature.\n"
|
||||
#define NOT_SUPP_TXCTL_SLAVE_MSG "The interface is a slave interface.\n"
|
||||
#define NO_TXCTL_DEV_MSG "No TX control devices were found\n"
|
||||
#define TXCTL_FAIL_MSG "Set Transmit mode failed.\n"
|
||||
#define TXCTL_OK_MSG "Set Transmit mode completed successfully.\n"
|
||||
#define GET_DEV_NUM_FAIL_MSG "Get TX Control devices number failed\n"
|
||||
#define GET_TXCTL_FAIL_MSG "Get Transmit mode failed.\n"
|
||||
|
||||
#define NO_BPCTL_DEV_MSG "No Bypass-SD/TAP-SD control devices were found\n"
|
||||
#define NOT_SUPP_BPCTL_MSG "The interface is not Bypass-SD/TAP-SD device.\n"
|
||||
#define NO_BP_DEV_MSG "No Bypass-SD control devices were found\n"
|
||||
|
||||
|
||||
|
||||
|
||||
#define BP_CAP_MSG "\nBP_CAP The interface is Bypass/TAP capable in general.\n"
|
||||
#define BP_STATUS_CAP_MSG "\nBP_STATUS_CAP The interface can report of the current Bypass mode.\n"
|
||||
#define BP_STATUS_CHANGE_CAP_MSG "\nBP_STATUS_CHANGE_CAP The interface can report on a change to bypass mode\n" \
|
||||
" from the last time the mode was defined\n"
|
||||
#define SW_CTL_CAP_MSG "\nSW_CTL_CAP The interface is Software controlled capable for\n" \
|
||||
" bypass/non bypass/TAP/non TAP modes.\n"
|
||||
#define BP_DIS_CAP_MSG "\nBP_DIS_CAP The interface is capable of disabling the Bypass mode\n" \
|
||||
" at all times. This mode will retain its mode even\n" \
|
||||
" during power loss and also after power recovery. This\n" \
|
||||
" will overcome on any bypass operation due to watchdog\n" \
|
||||
" timeout or set bypass command.\n"
|
||||
#define BP_DIS_STATUS_CAP_MSG "\nBP_DIS_STATUS_CAP The interface can report of the current DIS_BP_CAP.\n"
|
||||
#define STD_NIC_CAP_MSG "\nSTD_NIC_CAP The interface is capable to be configured to operate\n" \
|
||||
" as standard, non Bypass, NIC interface (have direct\n" \
|
||||
" connection to interfaces at all power modes).\n"
|
||||
#define BP_PWOFF_ON_CAP_MSG "\nBP_PWOFF_ON_CAP The interface can be in Bypass mode at power off state.\n"
|
||||
#define BP_PWOFF_OFF_CAP_MSG "\nBP_PWOFF_OFF_CAP The interface can disconnect the Bypass mode at\n" \
|
||||
" power off state without effecting all the other\n" \
|
||||
" states of operation.\n"
|
||||
#define BP_PWOFF_CTL_CAP_MSG "\nBP_PWOFF_CTL_CAP The behavior of the Bypass mode at Power-off state\n" \
|
||||
" can be controlled by software without effecting any\n" \
|
||||
" other state.\n"
|
||||
#define BP_PWUP_ON_CAP_MSG "\nBP_PWUP_ON_CAP The interface can be in Bypass mode when power is\n" \
|
||||
" turned on (until the system take control of the\n" \
|
||||
" bypass functionality).\n"
|
||||
#define BP_PWUP_OFF_CAP_MSG "\nBP_PWUP_OFF_CAP The interface can disconnect from Bypass mode when\n" \
|
||||
" power is turned on (until the system take control\n" \
|
||||
" of the bypass functionality).\n"
|
||||
#define BP_PWUP_CTL_CAP_MSG "\nBP_PWUP_CTL_CAP The behavior of the Bypass mode at Power-up can be\n" \
|
||||
" controlled by software\n"
|
||||
#define WD_CTL_CAP_MSG "\nWD_CTL_CAP The interface has watchdog capabilities to turn to\n" \
|
||||
" Bypass mode when not reset for defined period of time.\n"
|
||||
#define WD_STATUS_CAP_MSG "\nWD_STATUS_CAP The interface can report on the watchdog status\n" \
|
||||
" (active/inactive)\n"
|
||||
#define WD_TIMEOUT_CAP_MSG "\nWD_TIMEOUT_CAP The interface can report the time left till watchdog\n" \
|
||||
" triggers to Bypass mode.\n"
|
||||
|
||||
#define WD_MIN_TIME_MSG "\nWD_MIN_TIME = %d The interface WD minimal time period (ms).\n\n"
|
||||
#define WD_STEP_TIME_MSG "\nWD_STEP_TIME = %d The steps of the WD timer in\n" \
|
||||
" 0 - for linear steps (WD_MIN_TIME * X)\n" \
|
||||
" 1 - for multiply by 2 from previous step (WD_MIN_TIME * 2^X).\n"
|
||||
#define WD_STEP_COUNT_MSG "\nWD_STEP_COUNT_MSG = %d Number of bits available for defining the number of WDT steps.\n" \
|
||||
" From that the number of steps the WDT will have is 2^Y\n" \
|
||||
" (Y number of bits available for defining the value).\n\n"
|
||||
|
||||
#define TX_CTL_CAP_MSG "\nTX_CTL_CAP The interface is capable to control PHY transmitter on and off.\n"
|
||||
#define TX_STATUS_CAP_MSG "\nTX_STATUS_CAP The interface can report the status of the PHY transmitter.\n"
|
||||
#define TAP_CAP_MSG "\nTAP_CAP The interface is TAP capable in general.\n"
|
||||
#define TAP_STATUS_CAP_MSG "\nTAP_STATUS_CAP The interface can report of the current TAP mode.\n"
|
||||
#define TAP_STATUS_CHANGE_CAP_MSG "\nTAP_STATUS_CHANGE_CAP The interface can report on a change to TAP mode\n" \
|
||||
" from the last time the mode was defined\n"
|
||||
#define TAP_DIS_CAP_MSG "\nTAP_DIS_CAP The interface is capable of disabling the TAP mode\n" \
|
||||
" at all times. This mode will retain its mode even\n" \
|
||||
" during power loss and also after power recovery. This\n" \
|
||||
" will overcome on any TAP operation due to watchdog\n" \
|
||||
" timeout or set TAP command.\n"
|
||||
#define TAP_DIS_STATUS_CAP_MSG "\nTAP_DIS_STATUS_CAP The interface can report of the current DIS_TAP_CAP.\n"
|
||||
#define TAP_PWUP_ON_CAP_MSG "\nTAP_PWUP_ON_CAP The interface can be in TAP mode when power is\n" \
|
||||
" turned on (until the system take control of the\n" \
|
||||
" TAP functionality).\n"
|
||||
#define TAP_PWUP_OFF_CAP_MSG "\nTAP_PWUP_OFF_CAP The interface can disconnect from TAP mode when\n" \
|
||||
" power is turned on (until the system take control\n" \
|
||||
" of the TAP functionality).\n"
|
||||
#define TAP_PWUP_CTL_CAP_MSG "\nTAP_PWUP_CTL_CAP The behavior of the TAP mode at Power-up can be\n" \
|
||||
" controlled by software\n"
|
||||
#define NIC_CAP_NEG_MSG "\nNIC_CAP_NEG The interface is NIC capable in general - \n" \
|
||||
" negative polarity (0 - NIC capable)\n"
|
||||
|
||||
#define TPL_CAP_MSG "\nTPL_CAP The interface is TPL capable in general.\n"
|
||||
#define DISC_CAP_MSG "\nDISC_CAP The interface is Disconnect capable in general.\n"
|
||||
#define DISC_STATUS_CAP_MSG "\nDISC_STATUS_CAP The interface can report of the current Disconnect mode.\n"
|
||||
#if 0
|
||||
#define DISC_STATUS_CHANGE_CAP_MSG "\nDISC_STATUS_CHANGE_CAP The interface can report on a change to Disconnect \n" \
|
||||
" mode from the last time the mode was defined\n"
|
||||
#endif
|
||||
#define DISC_DIS_CAP_MSG "\nDISC_DIS_CAP The interface is capable of disabling the Disconnect mode\n" \
|
||||
" at all times. This mode will retain its mode even\n" \
|
||||
" during power loss and also after power recovery. This\n" \
|
||||
" will overcome on any Disconnect operation due to watchdog\n" \
|
||||
" timeout or set Disconnect command.\n"
|
||||
#if 0
|
||||
#define DISC_DIS_STATUS_CAP_MSG "\nDISC_DIS_STATUS_CAP The interface can report of the current DIS_DISC_CAP.\n"
|
||||
#define DISC_PWUP_ON_CAP_MSG "\nDISC_PWUP_ON_CAP The interface can be in Disconnect mode when power is\n" \
|
||||
" turned on (until the system take control of the\n" \
|
||||
" Disconnect functionality).\n"
|
||||
#define DISC_PWUP_OFF_CAP_MSG "\nDISC_PWUP_OFF_CAP The interface can disconnect from Disconnect mode when\n" \
|
||||
" power is turned on (until the system take control\n" \
|
||||
" of the Disconnect functionality).\n"
|
||||
#endif
|
||||
#define DISC_PWUP_CTL_CAP_MSG "\nDISC_PWUP_CTL_CAP The behavior of the Disconnect mode at Power-up can be\n" \
|
||||
" controlled by software\n"
|
||||
|
||||
|
||||
#endif
|
||||
176
bprd_ioctl.h
Executable file
176
bprd_ioctl.h
Executable file
|
|
@ -0,0 +1,176 @@
|
|||
/**************************************************************************
|
||||
|
||||
Copyright (c) 2006-2013, Silicom
|
||||
All rights reserved.
|
||||
|
||||
Redistribution and use in source and binary forms, with or without
|
||||
modification, are permitted provided that the following conditions are met:
|
||||
|
||||
1. Redistributions of source code must retain the above copyright notice,
|
||||
this list of conditions and the following disclaimer.
|
||||
|
||||
2. Redistributions in binary form must reproduce the above copyright
|
||||
notice, this list of conditions and the following disclaimer in the
|
||||
documentation and/or other materials provided with the distribution.
|
||||
|
||||
3. Neither the name of the Silicom nor the names of its
|
||||
contributors may be used to endorse or promote products derived from
|
||||
this software without specific prior written permission.
|
||||
|
||||
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
|
||||
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
POSSIBILITY OF SUCH DAMAGE.
|
||||
|
||||
***************************************************************************/
|
||||
|
||||
#ifndef BPRD_IOCTL_H
|
||||
#define BPRD_IOCTL_H
|
||||
|
||||
#define BP_CAP 0x01 //BIT_0
|
||||
#define BP_STATUS_CAP 0x02 //BIT_1
|
||||
#define BP_STATUS_CHANGE_CAP 0x04 //BIT_2
|
||||
#define SW_CTL_CAP 0x08 //BIT_3
|
||||
#define BP_DIS_CAP 0x10 //BIT_4
|
||||
#define BP_DIS_STATUS_CAP 0x20 //BIT_5
|
||||
#define STD_NIC_CAP 0x40 //BIT_6
|
||||
#define BP_PWOFF_ON_CAP 0x80 //BIT_7
|
||||
#define BP_PWOFF_OFF_CAP 0x0100 //BIT_8
|
||||
#define BP_PWOFF_CTL_CAP 0x0200 //BIT_9
|
||||
#define BP_PWUP_ON_CAP 0x0400 //BIT_10
|
||||
#define BP_PWUP_OFF_CAP 0x0800 //BIT_11
|
||||
#define BP_PWUP_CTL_CAP 0x1000 //BIT_12
|
||||
#define WD_CTL_CAP 0x2000 //BIT_13
|
||||
#define WD_STATUS_CAP 0x4000 //BIT_14
|
||||
#define WD_TIMEOUT_CAP 0x8000 //BIT_15
|
||||
#define TX_CTL_CAP 0x10000 //BIT_16
|
||||
#define TX_STATUS_CAP 0x20000 //BIT_17
|
||||
#define TAP_CAP 0x40000 //BIT_18
|
||||
#define TAP_STATUS_CAP 0x80000 //BIT_19
|
||||
#define TAP_STATUS_CHANGE_CAP 0x100000 //BIT_20
|
||||
#define TAP_DIS_CAP 0x200000 //BIT_21
|
||||
#define TAP_DIS_STATUS_CAP 0x400000 //BIT_22
|
||||
#define TAP_PWUP_ON_CAP 0x800000 //BIT_23
|
||||
#define TAP_PWUP_OFF_CAP 0x1000000 //BIT 24
|
||||
#define TAP_PWUP_CTL_CAP 0x2000000 //BIT 25
|
||||
#define NIC_CAP_NEG 0x4000000 //BIT 26
|
||||
#define TPL_CAP 0x8000000 //BIT 27
|
||||
#define DISC_CAP 0x10000000 //BIT 28
|
||||
#define DISC_DIS_CAP 0x20000000 //BIT 29
|
||||
#define DISC_PWUP_CTL_CAP 0x40000000 //BIT 30
|
||||
|
||||
#define TPL2_CAP_EX 0x01
|
||||
#define DISC_PORT_CAP_EX 0x02
|
||||
|
||||
|
||||
|
||||
|
||||
#define WD_MIN_TIME_MASK(val) (val & 0xf)
|
||||
#define WD_STEP_COUNT_MASK(val) ((val & 0xf) << 5)
|
||||
#define WDT_STEP_TIME 0x10 //BIT_4
|
||||
|
||||
#define WD_MIN_TIME_GET(desc) (desc & 0xf)
|
||||
#define WD_STEP_COUNT_GET(desc) (desc>>5) & 0xf
|
||||
|
||||
|
||||
typedef enum {
|
||||
IF_SCAN ,
|
||||
GET_DEV_NUM ,
|
||||
IS_BYPASS ,
|
||||
GET_BYPASS_SLAVE ,
|
||||
GET_BYPASS_CAPS ,
|
||||
GET_WD_SET_CAPS ,
|
||||
SET_BYPASS ,
|
||||
GET_BYPASS ,
|
||||
GET_BYPASS_CHANGE ,
|
||||
SET_BYPASS_WD ,
|
||||
GET_BYPASS_WD ,
|
||||
GET_WD_EXPIRE_TIME ,
|
||||
RESET_BYPASS_WD_TIMER,
|
||||
SET_DIS_BYPASS ,
|
||||
GET_DIS_BYPASS ,
|
||||
SET_BYPASS_PWOFF ,
|
||||
GET_BYPASS_PWOFF ,
|
||||
SET_BYPASS_PWUP ,
|
||||
GET_BYPASS_PWUP ,
|
||||
SET_STD_NIC ,
|
||||
GET_STD_NIC ,
|
||||
SET_TX,
|
||||
GET_TX,
|
||||
SET_TAP ,
|
||||
GET_TAP ,
|
||||
GET_TAP_CHANGE ,
|
||||
SET_DIS_TAP ,
|
||||
GET_DIS_TAP ,
|
||||
SET_TAP_PWUP ,
|
||||
GET_TAP_PWUP ,
|
||||
SET_WD_EXP_MODE,
|
||||
GET_WD_EXP_MODE,
|
||||
SET_WD_AUTORESET,
|
||||
GET_WD_AUTORESET,
|
||||
SET_TPL,
|
||||
GET_TPL,
|
||||
SET_DISC ,
|
||||
GET_DISC ,
|
||||
GET_DISC_CHANGE ,
|
||||
SET_DIS_DISC ,
|
||||
GET_DIS_DISC ,
|
||||
SET_DISC_PWUP ,
|
||||
GET_DISC_PWUP ,
|
||||
GET_BYPASS_INFO=100,
|
||||
GET_BP_WAIT_AT_PWUP,
|
||||
SET_BP_WAIT_AT_PWUP,
|
||||
GET_BP_HW_RESET,
|
||||
SET_BP_HW_RESET,
|
||||
SET_BP_BLINK,
|
||||
SET_DISC_PORT,
|
||||
GET_DISC_PORT,
|
||||
SET_DISC_PORT_PWUP,
|
||||
GET_DISC_PORT_PWUP,
|
||||
SET_BP_FORCE_LINK,
|
||||
GET_BP_FORCE_LINK,
|
||||
SET_BP_MANUF,
|
||||
GET_WD_EXPIRE,
|
||||
#ifdef BP_SELF_TEST
|
||||
SET_BP_SELF_TEST=200,
|
||||
GET_BP_SELF_TEST,
|
||||
#endif
|
||||
EXCLUSIVE_LOCK,
|
||||
DROP_EXCLUSIVE,
|
||||
|
||||
} CMND_TYPE_SD ;
|
||||
|
||||
/*
|
||||
* The major device number. We can't rely on dynamic
|
||||
* registration any more, because ioctls need to know
|
||||
* it.
|
||||
*/
|
||||
|
||||
|
||||
#define MAGIC_NUM 'J'
|
||||
|
||||
/* for passing single values */
|
||||
struct bpctl_cmd {
|
||||
int status;
|
||||
int data[8];
|
||||
int in_param[8];
|
||||
int out_param[8];
|
||||
};
|
||||
|
||||
|
||||
#define IOCTL_TX_MSG(cmd) _IOWR(MAGIC_NUM, cmd, struct bpctl_cmd)
|
||||
|
||||
#define DEVICE_NODE "/dev/bprdctl0"
|
||||
#define DEVICE_NAME "bprdctl"
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
6656
bprd_mod.c
Executable file
6656
bprd_mod.c
Executable file
File diff suppressed because it is too large
Load diff
132
bprd_mod.h
Executable file
132
bprd_mod.h
Executable file
|
|
@ -0,0 +1,132 @@
|
|||
/**************************************************************************
|
||||
|
||||
Copyright (c) 2006-2013, Silicom
|
||||
All rights reserved.
|
||||
|
||||
Redistribution and use in source and binary forms, with or without
|
||||
modification, are permitted provided that the following conditions are met:
|
||||
|
||||
1. Redistributions of source code must retain the above copyright notice,
|
||||
this list of conditions and the following disclaimer.
|
||||
|
||||
2. Redistributions in binary form must reproduce the above copyright
|
||||
notice, this list of conditions and the following disclaimer in the
|
||||
documentation and/or other materials provided with the distribution.
|
||||
|
||||
3. Neither the name of the Silicom nor the names of its
|
||||
contributors may be used to endorse or promote products derived from
|
||||
this software without specific prior written permission.
|
||||
|
||||
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
|
||||
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
POSSIBILITY OF SUCH DAMAGE.
|
||||
|
||||
***************************************************************************/
|
||||
|
||||
#ifndef BPRD_MOD_H
|
||||
#define BPRD_MOD_H
|
||||
#include "bits.h"
|
||||
|
||||
#ifndef KERNEL_VERSION
|
||||
#define KERNEL_VERSION(a,b,c) (((a) << 16) + ((b) << 8) + (c))
|
||||
#endif
|
||||
|
||||
|
||||
#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,8) )
|
||||
#define msleep(x) do { if(in_interrupt()) { \
|
||||
/* Don't mdelay in interrupt context! */ \
|
||||
BUG(); \
|
||||
} else { \
|
||||
set_current_state(TASK_UNINTERRUPTIBLE); \
|
||||
schedule_timeout((x * HZ)/1000 + 2); \
|
||||
} } while(0)
|
||||
#endif
|
||||
|
||||
#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,10))
|
||||
#define EXPORT_SYMBOL_NOVERS EXPORT_SYMBOL
|
||||
#endif
|
||||
|
||||
#define BP_PROC_DIR "bypass"
|
||||
|
||||
|
||||
#define PULSE_SET_ENTRY_RD "pulse_set"
|
||||
#define ZERO_SET_ENTRY_RD "zero_set"
|
||||
#define PULSE_GET1_ENTRY_RD "pulse_get1"
|
||||
#define PULSE_GET2_ENTRY_RD "pulse_get2"
|
||||
|
||||
#define CMND_ON_ENTRY_RD "cmnd_on"
|
||||
#define CMND_OFF_ENTRY_RD "cmnd_off"
|
||||
#define RESET_CONT_ENTRY_RD "reset_cont"
|
||||
|
||||
/*COMMANDS*/
|
||||
#define BYPASS_INFO_ENTRY_RD "bypass_info"
|
||||
|
||||
#define BYPASS_SLAVE_ENTRY_RD "bypass_slave"
|
||||
#define BYPASS_CAPS_ENTRY_RD "bypass_caps"
|
||||
#define WD_SET_CAPS_ENTRY_RD "wd_set_caps"
|
||||
#define BYPASS_ENTRY_RD "bypass"
|
||||
#define BYPASS_CHANGE_ENTRY_RD "bypass_change"
|
||||
#define BYPASS_WD_ENTRY_RD "bypass_wd"
|
||||
#define WD_EXPIRE_TIME_ENTRY_RD "wd_expire_time"
|
||||
#define RESET_BYPASS_WD_ENTRY_RD "reset_bypass_wd"
|
||||
#define DIS_BYPASS_ENTRY_RD "dis_bypass"
|
||||
#define BYPASS_PWUP_ENTRY_RD "bypass_pwup"
|
||||
#define BYPASS_PWOFF_ENTRY_RD "bypass_pwoff"
|
||||
#define STD_NIC_ENTRY_RD "std_nic"
|
||||
#define STD_NIC_ENTRY_RD "std_nic"
|
||||
#define TAP_ENTRY_RD "tap"
|
||||
#define TAP_CHANGE_ENTRY_RD "tap_change"
|
||||
#define DIS_TAP_ENTRY_RD "dis_tap"
|
||||
#define TAP_PWUP_ENTRY_RD "tap_pwup"
|
||||
#define TWO_PORT_LINK_ENTRY_RD "two_port_link"
|
||||
#define WD_EXP_MODE_ENTRY_RD "wd_exp_mode"
|
||||
#define WD_AUTORESET_ENTRY_RD "wd_autoreset"
|
||||
#define TPL_ENTRY_RD "tpl"
|
||||
#define WAIT_AT_PWUP_ENTRY_RD "wait_at_pwup"
|
||||
#define HW_RESET_ENTRY_RD "hw_reset"
|
||||
#define DISC_ENTRY_RD "disc"
|
||||
#define DISC_CHANGE_ENTRY_RD "disc_change"
|
||||
#define DIS_DISC_ENTRY_RD "dis_disc"
|
||||
#define DISC_PWUP_ENTRY_RD "disc_pwup"
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
#ifndef jiffies_to_msecs
|
||||
#define jiffies_to_msecs(x) _kc_jiffies_to_msecs(x)
|
||||
static inline unsigned int jiffies_to_msecs(const unsigned long j)
|
||||
{
|
||||
#if HZ <= 1000 && !(1000 % HZ)
|
||||
return(1000 / HZ) * j;
|
||||
#elif HZ > 1000 && !(HZ % 1000)
|
||||
return(j + (HZ / 1000) - 1)/(HZ / 1000);
|
||||
#else
|
||||
return(j * 1000) / HZ;
|
||||
#endif
|
||||
}
|
||||
#endif
|
||||
|
||||
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,10))
|
||||
|
||||
#define pci_get_class pci_find_class
|
||||
#define pci_get_subsys pci_find_subsys
|
||||
#define pci_get_device pci_find_device
|
||||
|
||||
#endif
|
||||
|
||||
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,4))
|
||||
#define MODULE_VERSION(_version)
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
#endif
|
||||
3541
bprd_util.c
Executable file
3541
bprd_util.c
Executable file
File diff suppressed because it is too large
Load diff
194
bprd_util.h
Executable file
194
bprd_util.h
Executable file
|
|
@ -0,0 +1,194 @@
|
|||
/**************************************************************************
|
||||
|
||||
Copyright (c) 2006-2013, Silicom
|
||||
All rights reserved.
|
||||
|
||||
Redistribution and use in source and binary forms, with or without
|
||||
modification, are permitted provided that the following conditions are met:
|
||||
|
||||
1. Redistributions of source code must retain the above copyright notice,
|
||||
this list of conditions and the following disclaimer.
|
||||
|
||||
2. Redistributions in binary form must reproduce the above copyright
|
||||
notice, this list of conditions and the following disclaimer in the
|
||||
documentation and/or other materials provided with the distribution.
|
||||
|
||||
3. Neither the name of the Silicom nor the names of its
|
||||
contributors may be used to endorse or promote products derived from
|
||||
this software without specific prior written permission.
|
||||
|
||||
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
|
||||
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
POSSIBILITY OF SUCH DAMAGE.
|
||||
|
||||
***************************************************************************/
|
||||
|
||||
#ifndef BPCTL_UTIL_H
|
||||
#define BPCTL_UTIL_H
|
||||
|
||||
#include "bp_msg.h"
|
||||
|
||||
|
||||
#define APP_NAME "Bypass-SD Control utility"
|
||||
#define COPYRT_MSG "Copyright Silicom Ltd."
|
||||
#define PROG_NAME "bprdctl_util"
|
||||
#define UTIL_VER "1.0.13"
|
||||
|
||||
|
||||
#define OK 0
|
||||
#define ERROR 1
|
||||
|
||||
#define HELP_ENTRY "help"
|
||||
#define INFO_ENTRY "info"
|
||||
#define IF_SCAN_ENTRY "if_scan"
|
||||
|
||||
#define SET_TX_ENTRY "set_tx"
|
||||
#define GET_TX_ENTRY "get_tx"
|
||||
#define SET_TPL_ENTRY "set_tpl"
|
||||
#define GET_TPL_ENTRY "get_tpl"
|
||||
#define GET_DEV_NUM_ENTRY "get_dev_num"
|
||||
|
||||
#define IS_BYPASS_ENTRY "is_bypass"
|
||||
#define GET_BYPASS_SLAVE_ENTRY "get_bypass_slave"
|
||||
#define GET_BYPASS_CAPS_ENTRY "get_bypass_caps"
|
||||
#define GET_WD_SET_CAPS_ENTRY "get_wd_set_caps"
|
||||
#define SET_BYPASS_ENTRY "set_bypass"
|
||||
#define GET_BYPASS_ENTRY "get_bypass"
|
||||
#define GET_BYPASS_CHANGE_ENTRY "get_bypass_change"
|
||||
#define SET_DIS_BYPASS_ENTRY "set_dis_bypass"
|
||||
#define GET_DIS_BYPASS_ENTRY "get_dis_bypass"
|
||||
#define SET_BYPASS_PWOFF_ENTRY "set_bypass_pwoff"
|
||||
#define GET_BYPASS_PWOFF_ENTRY "get_bypass_pwoff"
|
||||
#define SET_BYPASS_PWUP_ENTRY "set_bypass_pwup"
|
||||
#define GET_BYPASS_PWUP_ENTRY "get_bypass_pwup"
|
||||
#define SET_STD_NIC_ENTRY "set_std_nic"
|
||||
#define GET_STD_NIC_ENTRY "get_std_nic"
|
||||
#define SET_BYPASS_WD_ENTRY "set_bypass_wd"
|
||||
#define GET_BYPASS_WD_ENTRY "get_bypass_wd"
|
||||
#define GET_WD_EXPIRE_TIME_ENTRY "get_wd_time_expire"
|
||||
#define RESET_BYPASS_WD_TIMER_ENTRY "reset_bypass_wd"
|
||||
#define SET_TX_ENTRY "set_tx"
|
||||
#define GET_TX_ENTRY "get_tx"
|
||||
#define BYPASS_ENABLE "on"
|
||||
#define BYPASS_DISABLE "off"
|
||||
#define TAP_MODE "tap"
|
||||
#define BYPASS_MODE "bypass"
|
||||
#define SET_TAP_ENTRY "set_tap"
|
||||
#define GET_TAP_ENTRY "get_tap"
|
||||
#define GET_TAP_CHANGE_ENTRY "get_tap_change"
|
||||
#define SET_DIS_TAP_ENTRY "set_dis_tap"
|
||||
#define GET_DIS_TAP_ENTRY "get_dis_tap"
|
||||
#define SET_TAP_PWUP_ENTRY "set_tap_pwup"
|
||||
#define GET_TAP_PWUP_ENTRY "get_tap_pwup"
|
||||
#define SET_WD_EXP_MODE_ENTRY "set_wd_exp_mode"
|
||||
#define GET_WD_EXP_MODE_ENTRY "get_wd_exp_mode"
|
||||
#define SET_FORCE_LINK_ENTRY "set_force_link_on"
|
||||
#define GET_FORCE_LINK_ENTRY "get_force_link_on"
|
||||
|
||||
#define SET_BP_WAIT_AT_PWUP_ENTRY "set_wait_at_pwup"
|
||||
#define GET_BP_WAIT_AT_PWUP_ENTRY "get_wait_at_pwup"
|
||||
#define SET_BP_HW_RESET_ENTRY "set_hw_reset"
|
||||
#define GET_BP_HW_RESET_ENTRY "get_hw_reset"
|
||||
|
||||
#define SET_DISC_PORT_ENTRY "set_disc_port"
|
||||
#define GET_DISC_PORT_ENTRY "get_disc_port"
|
||||
#define SET_DISC_PORT_PWUP_ENTRY "set_disc_port_pwup"
|
||||
#define GET_DISC_PORT_PWUP_ENTRY "get_disc_port_pwup"
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
#define BYPASS_ENABLE "on"
|
||||
#define BYPASS_DISABLE "off"
|
||||
#define IF_NAME "eth"
|
||||
#define ALL_NAME "all "
|
||||
|
||||
|
||||
#define IF_NAME "eth"
|
||||
|
||||
struct bp_cap {
|
||||
int flag;
|
||||
char *desc;
|
||||
} bp_cap, *pbp_cap;
|
||||
|
||||
|
||||
|
||||
struct bp_cap bp_cap_array[]={
|
||||
{BP_CAP , BP_CAP_MSG},
|
||||
{BP_STATUS_CAP , BP_STATUS_CAP_MSG},
|
||||
{BP_STATUS_CHANGE_CAP , BP_STATUS_CHANGE_CAP_MSG},
|
||||
{SW_CTL_CAP , SW_CTL_CAP_MSG},
|
||||
{BP_DIS_CAP , BP_DIS_CAP_MSG},
|
||||
{BP_DIS_STATUS_CAP , BP_DIS_STATUS_CAP_MSG},
|
||||
{STD_NIC_CAP , STD_NIC_CAP_MSG},
|
||||
{BP_PWOFF_ON_CAP , BP_PWOFF_ON_CAP_MSG},
|
||||
{BP_PWOFF_OFF_CAP , BP_PWOFF_OFF_CAP_MSG},
|
||||
{BP_PWOFF_CTL_CAP , BP_PWOFF_CTL_CAP_MSG},
|
||||
{BP_PWUP_ON_CAP , BP_PWUP_ON_CAP_MSG},
|
||||
{BP_PWUP_OFF_CAP , BP_PWUP_OFF_CAP_MSG},
|
||||
{BP_PWUP_CTL_CAP , BP_PWUP_CTL_CAP_MSG},
|
||||
{WD_CTL_CAP , WD_CTL_CAP_MSG},
|
||||
{WD_STATUS_CAP , WD_STATUS_CAP_MSG},
|
||||
{WD_TIMEOUT_CAP , WD_TIMEOUT_CAP_MSG},
|
||||
{TX_CTL_CAP , TX_CTL_CAP_MSG},
|
||||
{TX_STATUS_CAP , TX_STATUS_CAP_MSG},
|
||||
{TAP_CAP , TAP_CAP_MSG},
|
||||
{TAP_STATUS_CAP , TAP_STATUS_CAP_MSG},
|
||||
{TAP_STATUS_CHANGE_CAP , TAP_STATUS_CHANGE_CAP_MSG},
|
||||
{TAP_DIS_CAP , TAP_DIS_CAP_MSG},
|
||||
{TAP_DIS_STATUS_CAP , TAP_DIS_STATUS_CAP_MSG},
|
||||
{TAP_PWUP_ON_CAP , TAP_PWUP_ON_CAP_MSG},
|
||||
{TAP_PWUP_OFF_CAP , TAP_PWUP_OFF_CAP_MSG},
|
||||
{TAP_PWUP_CTL_CAP , TAP_PWUP_CTL_CAP_MSG},
|
||||
{NIC_CAP_NEG , NIC_CAP_NEG_MSG},
|
||||
{TPL_CAP , TPL_CAP_MSG},
|
||||
{DISC_CAP , DISC_CAP_MSG},
|
||||
{DISC_DIS_CAP , DISC_DIS_CAP_MSG},
|
||||
{DISC_PWUP_CTL_CAP , DISC_PWUP_CTL_CAP_MSG},
|
||||
|
||||
{0,NULL}
|
||||
} ;
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
23
bprdctl_start
Executable file
23
bprdctl_start
Executable file
|
|
@ -0,0 +1,23 @@
|
|||
#!/bin/sh
|
||||
drv_name="bprdctl_mod"
|
||||
dev_node="bprdctl"
|
||||
if grep '^staff:' /etc/group > /dev/null; then
|
||||
group="staff"
|
||||
else
|
||||
group="wheel"
|
||||
fi
|
||||
|
||||
# remove old device node
|
||||
rm -f /dev/${dev_node}?
|
||||
|
||||
# load the driver
|
||||
modprobe ${drv_name}
|
||||
|
||||
# extract major number for device
|
||||
major=`cat /proc/devices | awk "\\$2==\"$dev_node\" {print \\$1}"`
|
||||
|
||||
# make new node
|
||||
mknod /dev/${dev_node}0 c $major 0
|
||||
ln -sf /dev/${dev_node}0 /dev/${dev_node}
|
||||
chgrp $group /dev/${dev_node}0
|
||||
chmod 644 /dev/${dev_node}0
|
||||
7
bprdctl_stop
Executable file
7
bprdctl_stop
Executable file
|
|
@ -0,0 +1,7 @@
|
|||
#!/bin/sh
|
||||
|
||||
/sbin/rmmod bprdctl_mod $* || exit 1
|
||||
|
||||
rm -f /dev/bprdctl0 /dev/bprdctl
|
||||
|
||||
exit 0
|
||||
237
bypass.h
Executable file
237
bypass.h
Executable file
|
|
@ -0,0 +1,237 @@
|
|||
/**************************************************************************
|
||||
|
||||
Copyright (c) 2006-2013, Silicom
|
||||
All rights reserved.
|
||||
|
||||
Redistribution and use in source and binary forms, with or without
|
||||
modification, are permitted provided that the following conditions are met:
|
||||
|
||||
1. Redistributions of source code must retain the above copyright notice,
|
||||
this list of conditions and the following disclaimer.
|
||||
|
||||
2. Redistributions in binary form must reproduce the above copyright
|
||||
notice, this list of conditions and the following disclaimer in the
|
||||
documentation and/or other materials provided with the distribution.
|
||||
|
||||
3. Neither the name of the Silicom nor the names of its
|
||||
contributors may be used to endorse or promote products derived from
|
||||
this software without specific prior written permission.
|
||||
|
||||
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
|
||||
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
POSSIBILITY OF SUCH DAMAGE.
|
||||
|
||||
***************************************************************************/
|
||||
|
||||
#ifndef BYPASS_H
|
||||
#define BYPASS_H
|
||||
|
||||
/* Bypass related */
|
||||
|
||||
#define SYNC_CMD_VAL 2 /* 10b */
|
||||
#define SYNC_CMD_LEN 2
|
||||
|
||||
#define WR_CMD_VAL 2 /* 10b */
|
||||
#define WR_CMD_LEN 2
|
||||
|
||||
#define RD_CMD_VAL 1 /* 10b */
|
||||
#define RD_CMD_LEN 2
|
||||
|
||||
#define ADDR_CMD_LEN 4
|
||||
|
||||
#define WR_DATA_LEN 8
|
||||
#define RD_DATA_LEN 8
|
||||
|
||||
|
||||
#define PIC_SIGN_REG_ADDR 0x7
|
||||
#define PIC_SIGN_VALUE 0xcd
|
||||
|
||||
|
||||
#define STATUS_REG_ADDR 0
|
||||
#define WDT_EN_MASK 0x01 //BIT_0
|
||||
#define CMND_EN_MASK 0x02 //BIT_1
|
||||
#define DIS_BYPASS_CAP_MASK 0x04 //BIT_2 /* Bypass Cap is disable*/
|
||||
#define DFLT_PWRON_MASK 0x08 //BIT_3
|
||||
#define BYPASS_OFF_MASK 0x10 //BIT_4
|
||||
#define BYPASS_FLAG_MASK 0x20 //BIT_5
|
||||
#define STD_NIC_MASK (DIS_BYPASS_CAP_MASK | BYPASS_OFF_MASK | DFLT_PWRON_MASK)
|
||||
#define WD_EXP_FLAG_MASK 0x40 //BIT_6
|
||||
#define DFLT_PWROFF_MASK 0x80 //BIT_7
|
||||
#define STD_NIC_PWOFF_MASK (DIS_BYPASS_CAP_MASK | BYPASS_OFF_MASK | DFLT_PWRON_MASK | DFLT_PWROFF_MASK)
|
||||
|
||||
|
||||
#define PRODUCT_CAP_REG_ADDR 0x5
|
||||
#define BYPASS_SUPPORT_MASK 0x01 //BIT_0
|
||||
#define TAP_SUPPORT_MASK 0x02 //BIT_1
|
||||
#define NORMAL_UNSUPPORT_MASK 0x04 /*BIT_2*/
|
||||
#define DISC_SUPPORT_MASK 0x08 //BIT_3
|
||||
#define TPL2_SUPPORT_MASK 0x10 //BIT_4
|
||||
#define DISC_PORT_SUPPORT_MASK 0x20 //BIT_5
|
||||
|
||||
|
||||
|
||||
#define STATUS_TAP_REG_ADDR 0x6
|
||||
#define WDTE_TAP_BPN_MASK 0x01 //BIT_1 /* 1 when wdt expired -> TAP, 0 - Bypass */
|
||||
#define DIS_TAP_CAP_MASK 0x04 //BIT_2 /* TAP Cap is disable*/
|
||||
#define DFLT_PWRON_TAP_MASK 0x08 //BIT_3
|
||||
#define TAP_OFF_MASK 0x10 //BIT_4
|
||||
#define TAP_FLAG_MASK 0x20 //BIT_5
|
||||
#define TX_DISA_MASK 0x40
|
||||
#define TX_DISB_MASK 0x80
|
||||
|
||||
#define STD_NIC_TAP_MASK (DIS_TAP_CAP_MASK | TAP_OFF_MASK | DFLT_PWRON_TAP_MASK)
|
||||
|
||||
#define STATUS_DISC_REG_ADDR 13
|
||||
#define WDTE_DISC_BPN_MASK 0x01 //BIT_0 /* 1 when wdt expired -> TAP, 0 - Bypass */
|
||||
#define STD_NIC_ON_MASK 0x02 //BIT_1
|
||||
#define DIS_DISC_CAP_MASK 0x04 //BIT_2 /* TAP Cap is disable*/
|
||||
#define DFLT_PWRON_DISC_MASK 0x08 //BIT_3
|
||||
#define DISC_OFF_MASK 0x10 //BIT_4
|
||||
#define DISC_FLAG_MASK 0x20 //BIT_5
|
||||
#define TPL2_FLAG_MASK 0x40 //BIT_6
|
||||
#define STD_NIC_DISC_MASK DIS_DISC_CAP_MASK
|
||||
|
||||
#define CONT_CONFIG_REG_ADDR 12
|
||||
#define EN_HW_RESET_MASK 0x2 /* BIT_1 */
|
||||
#define WAIT_AT_PWUP_MASK 0x1 /* BIT_0 */
|
||||
|
||||
|
||||
|
||||
#define VER_REG_ADDR 0x1
|
||||
#define BP_FW_VER_A0 0xa0
|
||||
#define BP_FW_VER_A1 0xa1
|
||||
|
||||
#define INT_VER_MASK 0xf0
|
||||
#define EXT_VER_MASK 0xf
|
||||
/* */
|
||||
#define PXG2BPI_VER 0x0
|
||||
#define PXG2TBPI_VER 0x1
|
||||
#define PXE2TBPI_VER 0x2
|
||||
#define PXG4BPFI_VER 0x4
|
||||
#define BP_FW_EXT_VER7 0x6
|
||||
#define BP_FW_EXT_VER8 0x8
|
||||
#define BP_FW_EXT_VER9 0x9
|
||||
|
||||
#define OLD_IF_VER -1
|
||||
|
||||
#define CMND_REG_ADDR 10 /* 1010b */
|
||||
#define WDT_REG_ADDR 4
|
||||
#define TMRL_REG_ADDR 2
|
||||
#define TMRH_REG_ADDR 3
|
||||
|
||||
/* NEW_FW */
|
||||
#define WDT_INTERVAL 5 //20
|
||||
#define WDT_CMND_INTERVAL 200 //50
|
||||
#define CMND_INTERVAL 200 //100 /* usec */
|
||||
#define PULSE_TIME 100
|
||||
|
||||
/* OLD_FW */
|
||||
#define INIT_CMND_INTERVAL 40
|
||||
#define PULSE_INTERVAL 5
|
||||
#define WDT_TIME_CNT 3
|
||||
|
||||
/* Intel Commands */
|
||||
|
||||
#define CMND_OFF_INT 0xf
|
||||
#define PWROFF_BYPASS_ON_INT 0x5
|
||||
#define BYPASS_ON_INT 0x6
|
||||
#define DIS_BYPASS_CAP_INT 0x4
|
||||
#define RESET_WDT_INT 0x1
|
||||
|
||||
/* Intel timing */
|
||||
|
||||
#define BYPASS_DELAY_INT 4 /* msec */
|
||||
#define CMND_INTERVAL_INT 2 /* msec */
|
||||
|
||||
/* Silicom Commands */
|
||||
#define CMND_ON 0x4
|
||||
#define CMND_OFF 0x2
|
||||
#define BYPASS_ON 0xa
|
||||
#define BYPASS_OFF 0x8
|
||||
#define PORT_LINK_EN 0xe
|
||||
#define PORT_LINK_DIS 0xc
|
||||
#define WDT_ON 0x10 /* 0x1f (11111) - max*/
|
||||
#define TIMEOUT_UNIT 100
|
||||
#define TIMEOUT_MAX_STEP 15
|
||||
#define WDT_TIMEOUT_MIN 100 /* msec */
|
||||
#define WDT_TIMEOUT_MAX 3276800 /* msec */
|
||||
#define WDT_AUTO_MIN_INT 500
|
||||
#define WDT_TIMEOUT_DEF WDT_TIMEOUT_MIN
|
||||
#define WDT_OFF 0x6
|
||||
#define WDT_RELOAD 0x9
|
||||
#define RESET_CONT 0x20
|
||||
#define DIS_BYPASS_CAP 0x22
|
||||
#define EN_BYPASS_CAP 0x24
|
||||
#define BYPASS_STATE_PWRON 0x26
|
||||
#define NORMAL_STATE_PWRON 0x28
|
||||
#define BYPASS_STATE_PWROFF 0x27
|
||||
#define NORMAL_STATE_PWROFF 0x29
|
||||
#define TAP_ON 0xb
|
||||
#define TAP_OFF 0x9
|
||||
#define TAP_STATE_PWRON 0x2a
|
||||
#define DIS_TAP_CAP 0x2c
|
||||
#define EN_TAP_CAP 0x2e
|
||||
#define STD_NIC_OFF 0x86
|
||||
#define STD_NIC_ON 0x84
|
||||
#define DISC_ON 0x85
|
||||
#define DISC_OFF 0x8a
|
||||
#define DISC_STATE_PWRON 0x87
|
||||
#define DIS_DISC_CAP 0x88
|
||||
#define EN_DISC_CAP 0x89
|
||||
#define TPL2_ON 0x8c
|
||||
#define TPL2_OFF 0x8b
|
||||
#define BP_WAIT_AT_PWUP_EN 0x80
|
||||
#define BP_WAIT_AT_PWUP_DIS 0x81
|
||||
#define BP_HW_RESET_EN 0x82
|
||||
#define BP_HW_RESET_DIS 0x83
|
||||
|
||||
#define TX_DISA 0x8d
|
||||
#define TX_DISB 0x8e
|
||||
#define TX_ENA 0xA0
|
||||
#define TX_ENB 0xA1
|
||||
|
||||
#define TX_DISA_PWRUP 0xA2
|
||||
#define TX_DISB_PWRUP 0xA3
|
||||
#define TX_ENA_PWRUP 0xA4
|
||||
#define TX_ENB_PWRUP 0xA5
|
||||
|
||||
|
||||
#define BYPASS_CAP_DELAY 35 /* msec */
|
||||
#define DFLT_PWRON_DELAY 10 /* msec */
|
||||
#define LATCH_DELAY 15 /* msec */
|
||||
#define EEPROM_WR_DELAY 20 /* msec */
|
||||
|
||||
#define BP_LINK_MON_DELAY 4 /* sec */
|
||||
|
||||
|
||||
#define BP_FW_EXT_VER0 0xa0
|
||||
#define BP_FW_EXT_VER1 0xa1
|
||||
#define BP_FW_EXT_VER2 0xb1
|
||||
|
||||
#define BP_OK 0
|
||||
#define BP_NOT_CAP -1
|
||||
#define WDT_STATUS_EXP -2
|
||||
#define WDT_STATUS_UNKNOWN -1
|
||||
#define WDT_STATUS_EN 1
|
||||
#define WDT_STATUS_DIS 0
|
||||
|
||||
|
||||
#define ETH_P_BPTEST 0xabba
|
||||
|
||||
|
||||
#define BPTEST_DATA_LEN 60
|
||||
|
||||
|
||||
|
||||
|
||||
#endif /* BYPASS_H*/
|
||||
|
||||
|
||||
335
common.mk
Executable file
335
common.mk
Executable file
|
|
@ -0,0 +1,335 @@
|
|||
################################################################################
|
||||
#
|
||||
# Intel(R) 10GbE PCI Express Linux Network Driver
|
||||
# Copyright(c) 1999 - 2017 Intel Corporation.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify it
|
||||
# under the terms and conditions of the GNU General Public License,
|
||||
# version 2, as published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
# more details.
|
||||
#
|
||||
# The full GNU General Public License is included in this distribution in
|
||||
# the file called "COPYING".
|
||||
#
|
||||
# Contact Information:
|
||||
# Linux NICS <linux.nics@intel.com>
|
||||
# e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
|
||||
# Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
|
||||
#
|
||||
################################################################################
|
||||
|
||||
# common Makefile rules useful for out-of-tree Linux driver builds
|
||||
#
|
||||
# Usage: include common.mk
|
||||
#
|
||||
# After including, you probably want to add a minimum_kver_check call
|
||||
#
|
||||
# Required Variables:
|
||||
# DRIVER
|
||||
# -- Set to the lowercase driver name
|
||||
|
||||
#####################
|
||||
# Helpful functions #
|
||||
#####################
|
||||
|
||||
readlink = $(shell readlink -f ${1})
|
||||
|
||||
# helper functions for converting kernel version to version codes
|
||||
get_kver = $(or $(word ${2},$(subst ., ,${1})),0)
|
||||
get_kvercode = $(shell [ "${1}" -ge 0 -a "${1}" -le 255 2>/dev/null ] && \
|
||||
[ "${2}" -ge 0 -a "${2}" -le 255 2>/dev/null ] && \
|
||||
[ "${3}" -ge 0 -a "${3}" -le 255 2>/dev/null ] && \
|
||||
printf %d $$(( ( ${1} << 16 ) + ( ${2} << 8 ) + ( ${3} ) )) )
|
||||
|
||||
################
|
||||
# depmod Macro #
|
||||
################
|
||||
|
||||
cmd_depmod = /sbin/depmod $(if ${SYSTEM_MAP_FILE},-e -F ${SYSTEM_MAP_FILE}) \
|
||||
$(if $(strip ${INSTALL_MOD_PATH}),-b ${INSTALL_MOD_PATH}) \
|
||||
-a ${KVER}
|
||||
|
||||
################
|
||||
# dracut Macro #
|
||||
################
|
||||
|
||||
cmd_initrd := $(shell \
|
||||
if which dracut > /dev/null 2>&1 ; then \
|
||||
echo "dracut --force"; \
|
||||
elif which update-initramfs > /dev/null 2>&1 ; then \
|
||||
echo "update-initramfs -u"; \
|
||||
fi )
|
||||
|
||||
#####################
|
||||
# Environment tests #
|
||||
#####################
|
||||
|
||||
DRIVER_UPPERCASE := $(shell echo ${DRIVER} | tr "[:lower:]" "[:upper:]")
|
||||
|
||||
ifeq (,${BUILD_KERNEL})
|
||||
BUILD_KERNEL=$(shell uname -r)
|
||||
endif
|
||||
|
||||
# Kernel Search Path
|
||||
# All the places we look for kernel source
|
||||
KSP := /lib/modules/${BUILD_KERNEL}/source \
|
||||
/lib/modules/${BUILD_KERNEL}/build \
|
||||
/usr/src/linux-${BUILD_KERNEL} \
|
||||
/usr/src/linux-$(${BUILD_KERNEL} | sed 's/-.*//') \
|
||||
/usr/src/kernel-headers-${BUILD_KERNEL} \
|
||||
/usr/src/kernel-source-${BUILD_KERNEL} \
|
||||
/usr/src/linux-$(${BUILD_KERNEL} | sed 's/\([0-9]*\.[0-9]*\)\..*/\1/') \
|
||||
/usr/src/linux \
|
||||
/usr/src/kernels/${BUILD_KERNEL} \
|
||||
/usr/src/kernels
|
||||
|
||||
# prune the list down to only values that exist and have an include/linux
|
||||
# sub-directory. We can't use include/config because some older kernels don't
|
||||
# have this.
|
||||
test_dir = $(shell [ -e ${dir}/include/linux ] && echo ${dir})
|
||||
KSP := $(foreach dir, ${KSP}, ${test_dir})
|
||||
|
||||
# we will use this first valid entry in the search path
|
||||
ifeq (,${KSRC})
|
||||
KSRC := $(firstword ${KSP})
|
||||
endif
|
||||
|
||||
ifeq (,${KSRC})
|
||||
$(warning *** Kernel header files not in any of the expected locations.)
|
||||
$(warning *** Install the appropriate kernel development package, e.g.)
|
||||
$(error kernel-devel, for building kernel modules and try again)
|
||||
else
|
||||
ifeq (/lib/modules/${BUILD_KERNEL}/source, ${KSRC})
|
||||
KOBJ := /lib/modules/${BUILD_KERNEL}/build
|
||||
else
|
||||
KOBJ := ${KSRC}
|
||||
endif
|
||||
endif
|
||||
|
||||
# Version file Search Path
|
||||
VSP := ${KOBJ}/include/generated/utsrelease.h \
|
||||
${KOBJ}/include/linux/utsrelease.h \
|
||||
${KOBJ}/include/linux/version.h \
|
||||
${KOBJ}/include/generated/uapi/linux/version.h \
|
||||
/boot/vmlinuz.version.h
|
||||
|
||||
# Config file Search Path
|
||||
CSP := ${KOBJ}/include/generated/autoconf.h \
|
||||
${KOBJ}/include/linux/autoconf.h \
|
||||
/boot/vmlinuz.autoconf.h
|
||||
|
||||
# System.map Search Path (for depmod)
|
||||
MSP := ${KSRC}/System.map \
|
||||
/boot/System.map-${BUILD_KERNEL}
|
||||
|
||||
# prune the lists down to only files that exist
|
||||
test_file = $(shell [ -f ${file} ] && echo ${file})
|
||||
VSP := $(foreach file, ${VSP}, ${test_file})
|
||||
CSP := $(foreach file, ${CSP}, ${test_file})
|
||||
MSP := $(foreach file, ${MSP}, ${test_file})
|
||||
|
||||
|
||||
# and use the first valid entry in the Search Paths
|
||||
ifeq (,${VERSION_FILE})
|
||||
VERSION_FILE := $(firstword ${VSP})
|
||||
endif
|
||||
|
||||
ifeq (,${CONFIG_FILE})
|
||||
CONFIG_FILE := $(firstword ${CSP})
|
||||
endif
|
||||
|
||||
ifeq (,${SYSTEM_MAP_FILE})
|
||||
SYSTEM_MAP_FILE := $(firstword ${MSP})
|
||||
endif
|
||||
|
||||
ifeq (,$(wildcard ${VERSION_FILE}))
|
||||
$(error Linux kernel source not configured - missing version header file)
|
||||
endif
|
||||
|
||||
ifeq (,$(wildcard ${CONFIG_FILE}))
|
||||
$(error Linux kernel source not configured - missing autoconf.h)
|
||||
endif
|
||||
|
||||
ifeq (,$(wildcard ${SYSTEM_MAP_FILE}))
|
||||
$(warning Missing System.map file - depmod will not check for missing symbols)
|
||||
endif
|
||||
|
||||
#######################
|
||||
# Linux Version Setup #
|
||||
#######################
|
||||
|
||||
# The following command line parameter is intended for development of KCOMPAT
|
||||
# against upstream kernels such as net-next which have broken or non-updated
|
||||
# version codes in their Makefile. They are intended for debugging and
|
||||
# development purpose only so that we can easily test new KCOMPAT early. If you
|
||||
# don't know what this means, you do not need to set this flag. There is no
|
||||
# arcane magic here.
|
||||
|
||||
# Convert LINUX_VERSION into LINUX_VERSION_CODE
|
||||
ifneq (${LINUX_VERSION},)
|
||||
LINUX_VERSION_CODE=$(call get_kvercode,$(call get_kver,${LINUX_VERSION},1),$(call get_kver,${LINUX_VERSION},2),$(call get_kver,${LINUX_VERSION},3))
|
||||
endif
|
||||
|
||||
# Honor LINUX_VERSION_CODE
|
||||
ifneq (${LINUX_VERSION_CODE},)
|
||||
$(warning Forcing target kernel to build with LINUX_VERSION_CODE of ${LINUX_VERSION_CODE}$(if ${LINUX_VERSION}, from LINUX_VERSION=${LINUX_VERSION}). Do this at your own risk.)
|
||||
KVER_CODE := ${LINUX_VERSION_CODE}
|
||||
EXTRA_CFLAGS += -DLINUX_VERSION_CODE=${LINUX_VERSION_CODE}
|
||||
endif
|
||||
|
||||
# Determine SLE_LOCALVERSION_CODE for SuSE SLE >= 11 (needed by kcompat)
|
||||
# This assumes SuSE will continue setting CONFIG_LOCALVERSION to the string
|
||||
# appended to the stable kernel version on which their kernel is based with
|
||||
# additional versioning information (up to 3 numbers), a possible abbreviated
|
||||
# git SHA1 commit id and a kernel type, e.g. CONFIG_LOCALVERSION=-1.2.3-default
|
||||
# or CONFIG_LOCALVERSION=-999.gdeadbee-default
|
||||
ifeq (1,$(shell ${CC} -E -dM ${CONFIG_FILE} 2> /dev/null |\
|
||||
grep -m 1 CONFIG_SUSE_KERNEL | awk '{ print $$3 }'))
|
||||
|
||||
ifneq (10,$(shell ${CC} -E -dM ${CONFIG_FILE} 2> /dev/null |\
|
||||
grep -m 1 CONFIG_SLE_VERSION | awk '{ print $$3 }'))
|
||||
|
||||
LOCALVERSION := $(shell ${CC} -E -dM ${CONFIG_FILE} 2> /dev/null |\
|
||||
grep -m 1 CONFIG_LOCALVERSION | awk '{ print $$3 }' |\
|
||||
cut -d'-' -f2 | sed 's/\.g[[:xdigit:]]\{7\}//')
|
||||
LOCALVER_A := $(shell echo ${LOCALVERSION} | cut -d'.' -f1)
|
||||
LOCALVER_B := $(shell echo ${LOCALVERSION} | cut -s -d'.' -f2)
|
||||
LOCALVER_C := $(shell echo ${LOCALVERSION} | cut -s -d'.' -f3)
|
||||
SLE_LOCALVERSION_CODE := $(shell expr ${LOCALVER_A} \* 65536 + \
|
||||
0${LOCALVER_B} \* 256 + 0${LOCALVER_C})
|
||||
EXTRA_CFLAGS += -DSLE_LOCALVERSION_CODE=${SLE_LOCALVERSION_CODE}
|
||||
endif
|
||||
endif
|
||||
|
||||
EXTRA_CFLAGS += -DVER_STR_SET='\"$(MOD_VER)\"'
|
||||
EXTRA_CFLAGS += -DBP_READ_REG
|
||||
EXTRA_CFLAGS += -DPMC_FIX_FLAG
|
||||
EXTRA_CFLAGS += -DBP_SYNC_FLAG
|
||||
EXTRA_CFLAGS += -DBP_10G
|
||||
#EXTRA_CFLAGS += -DADI_RANGELEY_SUPPORT
|
||||
#EXTRA_CFLAGS += -BP_HW_WD_CNT
|
||||
#EXTRA_CFLAGS += -DBPVM_KVM
|
||||
|
||||
|
||||
|
||||
#EXTRA_CFLAGS += -DBP_SELF_TEST
|
||||
#EXTRA_CFLAGS += -DBP_LINK_FAIL_NOTIFIER
|
||||
#EXTRA_CFLAGS += -DBP_PROC_SUPPORT
|
||||
#EXTRA_CFLAGS += -DBP_DBI_FLAG
|
||||
|
||||
EXTRA_CFLAGS += ${CFLAGS_EXTRA}
|
||||
|
||||
# get the kernel version - we use this to find the correct install path
|
||||
KVER := $(shell ${CC} ${EXTRA_CFLAGS} -E -dM ${VERSION_FILE} | grep UTS_RELEASE | \
|
||||
awk '{ print $$3 }' | sed 's/\"//g')
|
||||
|
||||
# assume source symlink is the same as build, otherwise adjust KOBJ
|
||||
ifneq (,$(wildcard /lib/modules/${KVER}/build))
|
||||
ifneq (${KSRC},$(call readlink,/lib/modules/${KVER}/build))
|
||||
KOBJ=/lib/modules/${KVER}/build
|
||||
endif
|
||||
endif
|
||||
|
||||
ifeq (${KVER_CODE},)
|
||||
KVER_CODE := $(shell ${CC} ${EXTRA_CFLAGS} -E -dM ${VSP} 2> /dev/null |\
|
||||
grep -m 1 LINUX_VERSION_CODE | awk '{ print $$3 }' | sed 's/\"//g')
|
||||
endif
|
||||
|
||||
# minimum_kver_check
|
||||
#
|
||||
# helper function to provide uniform output for different drivers to abort the
|
||||
# build based on kernel version check. Usage: "$(call minimum_kver_check,2,6,XX)".
|
||||
define _minimum_kver_check
|
||||
ifeq (0,$(shell [ ${KVER_CODE} -lt $(call get_kvercode,${1},${2},${3}) ]; echo "$$?"))
|
||||
$$(warning *** Aborting the build.)
|
||||
$$(error This driver is not supported on kernel versions older than ${1}.${2}.${3})
|
||||
endif
|
||||
endef
|
||||
minimum_kver_check = $(eval $(call _minimum_kver_check,${1},${2},${3}))
|
||||
|
||||
################
|
||||
# Manual Pages #
|
||||
################
|
||||
|
||||
MANSECTION = 7
|
||||
|
||||
ifeq (,${MANDIR})
|
||||
# find the best place to install the man page
|
||||
MANPATH := $(shell (manpath 2>/dev/null || echo $MANPATH) | sed 's/:/ /g')
|
||||
ifneq (,${MANPATH})
|
||||
# test based on inclusion in MANPATH
|
||||
test_dir = $(findstring ${dir}, ${MANPATH})
|
||||
else
|
||||
# no MANPATH, test based on directory existence
|
||||
test_dir = $(shell [ -e ${dir} ] && echo ${dir})
|
||||
endif
|
||||
# our preferred install path
|
||||
# should /usr/local/man be in here ?
|
||||
MANDIR := /usr/share/man /usr/man
|
||||
MANDIR := $(foreach dir, ${MANDIR}, ${test_dir})
|
||||
MANDIR := $(firstword ${MANDIR})
|
||||
endif
|
||||
ifeq (,${MANDIR})
|
||||
# fallback to /usr/man
|
||||
MANDIR := /usr/man
|
||||
endif
|
||||
|
||||
####################
|
||||
# CCFLAGS variable #
|
||||
####################
|
||||
|
||||
# set correct CCFLAGS variable for kernels older than 2.6.24
|
||||
ifeq (0,$(shell [ ${KVER_CODE} -lt $(call get_kvercode,2,6,24) ]; echo $$?))
|
||||
CCFLAGS_VAR := EXTRA_CFLAGS
|
||||
else
|
||||
CCFLAGS_VAR := ccflags-y
|
||||
endif
|
||||
|
||||
#################
|
||||
# KBUILD_OUTPUT #
|
||||
#################
|
||||
|
||||
# Only set KBUILD_OUTPUT if the real paths of KOBJ and KSRC differ
|
||||
ifneq ($(call readlink,${KSRC}),$(call readlink,${KOBJ}))
|
||||
export KBUILD_OUTPUT ?= ${KOBJ}
|
||||
endif
|
||||
|
||||
############################
|
||||
# Module Install Directory #
|
||||
############################
|
||||
|
||||
# Default to using updates/drivers/net/ethernet/intel/ path, since depmod since
|
||||
# v3.1 defaults to checking updates folder first, and only checking kernels/
|
||||
# and extra afterwards. We use updates instead of kernel/* due to desire to
|
||||
# prevent over-writing built-in modules files.
|
||||
export INSTALL_MOD_DIR ?= updates/drivers/net/ethernet/intel/${DRIVER}
|
||||
|
||||
######################
|
||||
# Kernel Build Macro #
|
||||
######################
|
||||
|
||||
# kernel build function
|
||||
# ${1} is the kernel build target
|
||||
# ${2} may contain any extra rules to pass directly to the sub-make process
|
||||
#
|
||||
# This function is expected to be executed by
|
||||
# @+$(call kernelbuild,<target>,<extra parameters>)
|
||||
# from within a Makefile recipe.
|
||||
#
|
||||
# The following variables are expected to be defined for its use:
|
||||
# GCC_I_SYS -- if set it will enable use of gcc-i-sys.sh wrapper to use -isystem
|
||||
# CCFLAGS_VAR -- the CCFLAGS variable to set extra CFLAGS
|
||||
# EXTRA_CFLAGS -- a set of extra CFLAGS to pass into the ccflags-y variable
|
||||
# KSRC -- the location of the kernel source tree to build against
|
||||
# DRIVER_UPPERCASE -- the uppercase name of the kernel module, set from DRIVER
|
||||
#
|
||||
kernelbuild = ${MAKE} $(if ${GCC_I_SYS},CC="${GCC_I_SYS}") \
|
||||
${CCFLAGS_VAR}="${EXTRA_CFLAGS}" \
|
||||
-C "${KSRC}" \
|
||||
CONFIG_${DRIVER_UPPERCASE}=m \
|
||||
M="${CURDIR}" \
|
||||
${2} ${1}
|
||||
585
libbp_rd.h
Executable file
585
libbp_rd.h
Executable file
|
|
@ -0,0 +1,585 @@
|
|||
/**************************************************************************
|
||||
|
||||
Copyright (c) 2006-2013, Silicom
|
||||
All rights reserved.
|
||||
|
||||
Redistribution and use in source and binary forms, with or without
|
||||
modification, are permitted provided that the following conditions are met:
|
||||
|
||||
1. Redistributions of source code must retain the above copyright notice,
|
||||
this list of conditions and the following disclaimer.
|
||||
|
||||
2. Redistributions in binary form must reproduce the above copyright
|
||||
notice, this list of conditions and the following disclaimer in the
|
||||
documentation and/or other materials provided with the distribution.
|
||||
|
||||
3. Neither the name of the Silicom nor the names of its
|
||||
contributors may be used to endorse or promote products derived from
|
||||
this software without specific prior written permission.
|
||||
|
||||
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
|
||||
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
POSSIBILITY OF SUCH DAMAGE.
|
||||
|
||||
***************************************************************************/
|
||||
|
||||
#define BP_CAP 0x01 //BIT_0
|
||||
#define BP_STATUS_CAP 0x02 //BIT_1
|
||||
#define BP_STATUS_CHANGE_CAP 0x04 //BIT_2
|
||||
#define SW_CTL_CAP 0x08 //BIT_3
|
||||
#define BP_DIS_CAP 0x10 //BIT_4
|
||||
#define BP_DIS_STATUS_CAP 0x20 //BIT_5
|
||||
#define STD_NIC_CAP 0x40 //BIT_6
|
||||
#define BP_PWOFF_ON_CAP 0x80 //BIT_7
|
||||
#define BP_PWOFF_OFF_CAP 0x0100 //BIT_8
|
||||
#define BP_PWOFF_CTL_CAP 0x0200 //BIT_9
|
||||
#define BP_PWUP_ON_CAP 0x0400 //BIT_10
|
||||
#define BP_PWUP_OFF_CAP 0x0800 //BIT_11
|
||||
#define BP_PWUP_CTL_CAP 0x1000 //BIT_12
|
||||
#define WD_CTL_CAP 0x2000 //BIT_13
|
||||
#define WD_STATUS_CAP 0x4000 //BIT_14
|
||||
#define WD_TIMEOUT_CAP 0x8000 //BIT_15
|
||||
#define TX_CTL_CAP 0x10000 //BIT_16
|
||||
#define TX_STATUS_CAP 0x20000 //BIT_17
|
||||
#define TAP_CAP 0x40000 //BIT_18
|
||||
#define TAP_STATUS_CAP 0x80000 //BIT_19
|
||||
#define TAP_STATUS_CHANGE_CAP 0x100000 //BIT_20
|
||||
#define TAP_DIS_CAP 0x200000 //BIT_21
|
||||
#define TAP_DIS_STATUS_CAP 0x400000 //BIT_22
|
||||
#define TAP_PWUP_ON_CAP 0x800000 //BIT_23
|
||||
#define TAP_PWUP_OFF_CAP 0x1000000 //BIT 24
|
||||
#define TAP_PWUP_CTL_CAP 0x2000000 //BIT 25
|
||||
#define NIC_CAP_NEG 0x4000000 //BIT 26
|
||||
|
||||
#define WD_MIN_TIME_GET(desc) (desc & 0xf)
|
||||
#define WD_STEP_COUNT_GET(desc) (desc>>5) & 0xf
|
||||
#define WDT_STEP_TIME 0x10
|
||||
|
||||
|
||||
struct bp_info {
|
||||
char prod_name[14];
|
||||
unsigned char fw_ver;
|
||||
};
|
||||
|
||||
/**
|
||||
* is_bypass - check if device is a Bypass controlling device
|
||||
* @if_index: network device index
|
||||
*
|
||||
* Output:
|
||||
* 1 - if device is bypass controlling device,
|
||||
* 0 - if device is bypass slave device
|
||||
* -1 - device not support Bypass
|
||||
**/
|
||||
int is_bypass_rd(int if_index);
|
||||
|
||||
/**
|
||||
* get_bypass_slave - get second port participate in the Bypass pair
|
||||
* @if_index: network device index
|
||||
*
|
||||
* Output:
|
||||
* network device index of the slave device
|
||||
* -1 - on failure (device not support Bypass or it's a slave device)
|
||||
**/
|
||||
int get_bypass_slave_rd(int if_index);
|
||||
|
||||
/**
|
||||
* get_bypass_caps - get second port participate in the Bypass pair
|
||||
* @if_index: network device index
|
||||
*
|
||||
* Output:
|
||||
* flags word on success;flag word is a 32-bit mask word with each bit defines different
|
||||
* capability as described bellow.
|
||||
* Value of 1 for supporting this feature. 0 for not supporting this feature.
|
||||
* -1 - on failure (if the device is not capable of the operation or not a Bypass device)
|
||||
* Bit feature description
|
||||
*
|
||||
* 0 BP_CAP The interface is Bypass capable in general
|
||||
*
|
||||
* 1 BP_STATUS_CAP The interface can report of the current Bypass mode
|
||||
*
|
||||
* 2 BP_STATUS_CHANGE_CAP The interface can report on a change to bypass mode from
|
||||
* the last time the mode was defined
|
||||
*
|
||||
* 3 SW_CTL_CAP The interface is Software controlled capable for bypass/non bypass modes.
|
||||
*
|
||||
* 4 BP_DIS_CAP The interface is capable of disabling the Bypass mode at all times.
|
||||
* This mode will retain its mode even during power loss and also after
|
||||
* power recovery. This will overcome on any bypass operation due to
|
||||
* watchdog timeout or set bypass command.
|
||||
*
|
||||
* 5 BP_DIS_STATUS_CAP The interface can report of the current DIS_BP_CAP
|
||||
*
|
||||
* 6 STD_NIC_CAP The interface is capable to be configured to operate as standard, non Bypass,
|
||||
* NIC interface (have direct connection to interfaces at all power modes)
|
||||
*
|
||||
* 7 BP_PWOFF_NO_CAP The interface can be in Bypass mode at power off state
|
||||
*
|
||||
* 8 BP_PWOFF_OFF_CAP The interface can disconnect the Bypass mode at power off state without
|
||||
* effecting all the other states of operation
|
||||
*
|
||||
* 9 BP_PWOFF_CTL_CAP The behavior of the Bypass mode at Power-off state can be controlled by
|
||||
* software without effecting any other state
|
||||
*
|
||||
*10 BP_PWUP_ON_CAP The interface can be in Bypass mode when power is turned on
|
||||
* (until the system take control of the bypass functionality)
|
||||
*
|
||||
*11 BP_PWUP_OFF_CAP The interface can disconnect from Bypass mode when power is turned on
|
||||
* (until the system take control of the bypass functionality)
|
||||
*
|
||||
*12 BP_PWUP_CTL_CAP The behavior of the Bypass mode at Power-up can be controlled by software
|
||||
*
|
||||
*13 WD_CTL_CAP The interface has watchdog capabilities to turn to Bypass mode when not reset
|
||||
* for defined period of time.
|
||||
*
|
||||
*14 WD_STATUS_CAP The interface can report on the watchdog status (Active/inactive)
|
||||
*
|
||||
*15 WD_TIMEOUT_CAP The interface can report the time left till watchdog triggers to Bypass mode.
|
||||
*
|
||||
*16-31 RESERVED
|
||||
*
|
||||
* **/
|
||||
int get_bypass_caps_rd(int if_index);
|
||||
|
||||
/**
|
||||
* get_wd_set_caps - Obtain watchdog timer setting capabilities
|
||||
* @if_index: network device index
|
||||
*
|
||||
* Output:
|
||||
*
|
||||
* Set of numbers defining the various parameters of the watchdog capable
|
||||
* to be set to as described bellow.
|
||||
* -1 - on failure (device not support Bypass or it's a slave device)
|
||||
*
|
||||
* Bit feature description
|
||||
*
|
||||
* 0-3 WD_MIN_TIME The interface WD minimal time period in 100mS units
|
||||
*
|
||||
* 4 WD_STEP_TIME The steps of the WD timer in
|
||||
* 0 - for linear steps (WD_MIN_TIME * X)
|
||||
* 1 - for multiply by 2 from previous step (WD_MIN_TIME * 2^X)
|
||||
*
|
||||
* 5-8 WD_STEP_COUNT Number of steps the WD timer supports in 2^X
|
||||
* (X bit available for defining the value)
|
||||
*
|
||||
*
|
||||
*
|
||||
**/
|
||||
int get_wd_set_caps_rd(int if_index);
|
||||
|
||||
/**
|
||||
* set_bypass - set Bypass state
|
||||
* @if_index: network device index of the controlling device
|
||||
* @bypass_mode: bypass mode (1=on, 0=off)
|
||||
* Output:
|
||||
* 0 - on success
|
||||
* -1 - on failure (device not support Bypass or it's a slave device)
|
||||
**/
|
||||
int set_bypass_rd(int if_index, int bypass_mode);
|
||||
|
||||
/**
|
||||
* get_bypass - Get Bypass mode state
|
||||
* @if_index: network device index of the controlling device
|
||||
* Output:
|
||||
* 0/1 - (off/on) on success
|
||||
* -1 - on failure (device not support Bypass or it's a slave device)
|
||||
**/
|
||||
int get_bypass_rd(int if_index);
|
||||
|
||||
/**
|
||||
* get_bypass_change - Get change of Bypass mode state from last status check
|
||||
* @if_index: network device index of the controlling device
|
||||
* Output:
|
||||
* 0/1 - (off/on) on success
|
||||
* -1 - on failure (device not support Bypass or it's a slave device)
|
||||
**/
|
||||
int get_bypass_change_rd(int if_index);
|
||||
|
||||
/**
|
||||
* set_dis_bypass - Set Disable Bypass mode
|
||||
* @if_index: network device index of the controlling device
|
||||
* @dis_bypass: disable bypass(1=dis, 0=en)
|
||||
* Output:
|
||||
* 0 - on success
|
||||
* -1 - on failure (device is not capable of the operation ordevice not support Bypass
|
||||
* or it's a slave device)
|
||||
**/
|
||||
int set_dis_bypass_rd(int if_index, int dis_bypass);
|
||||
|
||||
/**
|
||||
* get_dis_bypass - Get Disable Bypass mode state
|
||||
* @if_index: network device index of the controlling device
|
||||
* Output:
|
||||
* 0/1 - on success (normal Bypass mode/ Disable bypass)
|
||||
* -1 - on failure (device is not capable of the operation ordevice not support Bypass
|
||||
* or it's a slave device)
|
||||
**/
|
||||
int get_dis_bypass_rd(int if_index);
|
||||
|
||||
/**
|
||||
* set_bypass_pwoff - Set Bypass mode at power-off state
|
||||
* @if_index: network device index of the controlling device
|
||||
* @bypass_mode: bypass mode setting at power off state (1=BP en, 0=BP Dis)
|
||||
* Output:
|
||||
* 0 - on success
|
||||
* -1 - on failure (device is not capable of the operation ordevice not support Bypass
|
||||
* or it's a slave device)
|
||||
**/
|
||||
int set_bypass_pwoff_rd(int if_index, int bypass_mode);
|
||||
|
||||
|
||||
/**
|
||||
* get_bypass_pwoff - Get Bypass mode state at power-off state
|
||||
* @if_index: network device index of the controlling device
|
||||
* Output:
|
||||
* 0/1 - on success (Disable bypass at power off state / normal Bypass mode)
|
||||
* -1 - on failure (device is not capable of the operation ordevice not support Bypass
|
||||
* or it's a slave device)
|
||||
**/
|
||||
int get_bypass_pwoff_rd(int if_index);
|
||||
|
||||
/**
|
||||
* set_bypass_pwup - Set Bypass mode at power-up state
|
||||
* @if_index: network device index of the controlling device
|
||||
* @bypass_mode: bypass mode setting at power up state (1=BP en, 0=BP Dis)
|
||||
* Output:
|
||||
* 0 - on success
|
||||
* -1 - on failure (device is not capable of the operation ordevice not support Bypass
|
||||
* or it's a slave device)
|
||||
**/
|
||||
int set_bypass_pwup_rd(int if_index, int bypass_mode);
|
||||
|
||||
/**
|
||||
* get_bypass_pwup - Get Bypass mode state at power-up state
|
||||
* @if_index: network device index of the controlling device
|
||||
* Output:
|
||||
* 0/1 - on success (Disable bypass at power up state / normal Bypass mode)
|
||||
* -1 - on failure (device is not capable of the operation ordevice not support Bypass
|
||||
* or it's a slave device)
|
||||
**/
|
||||
int get_bypass_pwup_rd(int if_index);
|
||||
|
||||
/**
|
||||
* set_bypass_wd - Set watchdog state
|
||||
* @if_index: network device index of the controlling device
|
||||
* @ms_timeout: requested timeout (in ms units), 0 for disabling the watchdog timer
|
||||
* @ms_timeout_set(output): requested timeout (in ms units),
|
||||
* that the adapter supports and will be used by the watchdog
|
||||
* Output:
|
||||
* 0 - on success
|
||||
* -1 - on failure (device is not capable of the operation ordevice not support Bypass
|
||||
* or it's a slave device)
|
||||
**/
|
||||
int set_bypass_wd_rd(int if_index, int ms_timeout, int *ms_timeout_set);
|
||||
|
||||
/**
|
||||
* get_bypass_wd - Get watchdog state
|
||||
* @if_index: network device index of the controlling device
|
||||
* @ms_timeout (output): WDT timeout (in ms units),
|
||||
* -1 for unknown wdt status
|
||||
* 0 if WDT is disabled
|
||||
* Output:
|
||||
* 0 - on success
|
||||
* -1 - on failure (device is not capable of the operation ordevice not support Bypass
|
||||
* or it's a slave device)
|
||||
**/
|
||||
int get_bypass_wd_rd(int if_index, int *ms_timeout_set);
|
||||
|
||||
/**
|
||||
* get_wd_expire_time - Get watchdog expire
|
||||
* @if_index: network device index of the controlling device
|
||||
* @ms_time_left (output): time left till watchdog time expire,
|
||||
* -1 if WDT has expired
|
||||
* 0 if WDT is disabled
|
||||
* Output:
|
||||
* 0 - on success
|
||||
* -1 - on failure (device is not capable of the operation ordevice not support Bypass
|
||||
* or it's a slave device or unknown wdt status)
|
||||
**/
|
||||
int get_wd_expire_time_rd(int if_index, int *ms_time_left);
|
||||
|
||||
/**
|
||||
* reset_bypass_wd_timer - Reset watchdog timer
|
||||
* @if_index: network device index of the controlling device
|
||||
*
|
||||
* Output:
|
||||
* 1 - on success
|
||||
* 0 - watchdog is not configured
|
||||
* -1 - on failure (device is not capable of the operation ordevice not support Bypass
|
||||
* or it's a slave device or unknown wdt status)
|
||||
**/
|
||||
int reset_bypass_wd_timer_rd(int if_index);
|
||||
|
||||
/**
|
||||
* set_std_nic - Standard NIC mode of operation
|
||||
* @if_index: network device index of the controlling device
|
||||
* @nic_mode: 0/1 (Default Bypass mode / Standard NIC mode)
|
||||
*
|
||||
* Output:
|
||||
* 0 - on success
|
||||
* -1 - on failure (device is not capable of the operation ordevice not support Bypass
|
||||
* or it's a slave device)
|
||||
**/
|
||||
int set_std_nic_rd(int if_index, int nic_mode);
|
||||
|
||||
/**
|
||||
* get_std_nic - Get Standard NIC mode setting
|
||||
* @if_index: network device index of the controlling device
|
||||
*
|
||||
* Output:
|
||||
* 0/1 (Default Bypass mode / Standard NIC mode) on success
|
||||
* -1 - on failure (device is not capable of the operation ordevice not support Bypass
|
||||
* or it's a slave device)
|
||||
**/
|
||||
int get_std_nic_rd(int if_index);
|
||||
|
||||
/**
|
||||
* set_tx - set transmitter enable/disable
|
||||
* @if_index: network device index of the controlling device
|
||||
* @tx_state: 0/1 (Transmit Disable / Transmit Enable)
|
||||
*
|
||||
* Output:
|
||||
* 0 - on success
|
||||
* -1 - on failure (device is not capable of the operation )
|
||||
**/
|
||||
int set_tx_rd(int if_index, int tx_state);
|
||||
|
||||
/**
|
||||
* get_tx - get transmitter state (disable / enable)
|
||||
* @if_index: network device index of the controlling device
|
||||
*
|
||||
* Output:
|
||||
* 0/1 (ransmit Disable / Transmit Enable) on success
|
||||
* -1 - on failure (device is not capable of the operation ordevice not support Bypass)
|
||||
**/
|
||||
int get_tx_rd(int if_index);
|
||||
|
||||
|
||||
/**
|
||||
* set_tpl - set TPL enable/disable
|
||||
* @if_index: network device index of the controlling device
|
||||
* @tx_state: 0/1 (TPL Disable / TPL Enable)
|
||||
*
|
||||
* Output:
|
||||
* 0 - on success
|
||||
* -1 - on failure (device is not capable of the operation )
|
||||
**/
|
||||
int set_tpl_rd(int if_index, int tpl_state);
|
||||
|
||||
/**
|
||||
* get_tpl - get TPL state (disable / enable)
|
||||
* @if_index: network device index of the controlling device
|
||||
*
|
||||
* Output:
|
||||
* 0/1 (TPL Disable / TPL Enable) on success
|
||||
* -1 - on failure (device is not capable of the operation)
|
||||
**/
|
||||
int get_tpl_rd(int if_index);
|
||||
|
||||
|
||||
int get_bp_hw_reset_rd(int if_index);
|
||||
|
||||
int set_bp_hw_reset_rd(int if_index, int status);
|
||||
|
||||
|
||||
|
||||
#if 0
|
||||
/**
|
||||
* set_tap - set TAP state
|
||||
* @if_index: network device index of the controlling device
|
||||
* @tap_mode: 1 tap mode , 0 normal nic mode
|
||||
* Output:
|
||||
* 0 - on success
|
||||
* -1 - on failure (device not support TAP or it's a slave device)
|
||||
**/
|
||||
int set_tap_rd(int if_index, int tap_mode);
|
||||
|
||||
/**
|
||||
* get_tap - Get TAP mode state
|
||||
* @if_index: network device index of the controlling device
|
||||
* Output:
|
||||
* 0/1 - (off/on) on success
|
||||
* -1 - on failure (device not support TAP or it's a slave device)
|
||||
**/
|
||||
int get_tap_rd(int if_index);
|
||||
|
||||
/**
|
||||
* get_tap_change - Get change of TAP mode state from last status check
|
||||
* @if_index: network device index of the controlling device
|
||||
* Output:
|
||||
* 0/1 - (off/on) on success
|
||||
* -1 - on failure (device not support TAP or it's a slave device)
|
||||
**/
|
||||
int get_tap_change_rd(int if_index);
|
||||
|
||||
/**
|
||||
* set_dis_tap - Set Disable TAP mode
|
||||
* @if_index: network device index of the controlling device
|
||||
* @dis_tap: disable tap(1=dis, 0=en)
|
||||
* Output:
|
||||
* 0 - on success
|
||||
* -1 - on failure (device is not capable of the operation ordevice not support TAP
|
||||
* or it's a slave device)
|
||||
**/
|
||||
int set_dis_tap_rd(int if_index, int dis_tap);
|
||||
|
||||
/**
|
||||
* get_dis_tap - Get Disable TAP mode state
|
||||
* @if_index: network device index of the controlling device
|
||||
* Output:
|
||||
* 0/1 - on success (normal TAP mode/ Disable TAP)
|
||||
* -1 - on failure (device is not capable of the operation ordevice not support TAP
|
||||
* or it's a slave device)
|
||||
**/
|
||||
int get_dis_tap_rd(int if_index);
|
||||
|
||||
/**
|
||||
* set_tap_pwup - Set TAP mode at power-up state
|
||||
* @if_index: network device index of the controlling device
|
||||
* @bypass_mode: tap mode setting at power up state (1=TAP en, 0=TAP Dis)
|
||||
* Output:
|
||||
* 0 - on success
|
||||
* -1 - on failure (device is not capable of the operation ordevice not support TAP
|
||||
* or it's a slave device)
|
||||
**/
|
||||
int set_tap_pwup_rd(int if_index, int tap_mode);
|
||||
|
||||
/**
|
||||
* get_tap_pwup - Get TAP mode state at power-up state
|
||||
* @if_index: network device index of the controlling device
|
||||
* Output:
|
||||
* 0/1 - on success (Disable TAP at power up state / normal TAP mode)
|
||||
* -1 - on failure (device is not capable of the operation ordevice not support TAP
|
||||
* or it's a slave device)
|
||||
**/
|
||||
int get_tap_pwup_rd(int if_index);
|
||||
#endif
|
||||
/**
|
||||
* set_wd_exp_mode - Set adapter state when WDT expired.
|
||||
* @if_index: network device index of the controlling device
|
||||
* @bypass_mode: adapter mode (1=tap mode, 0=bypass mode)
|
||||
* Output:
|
||||
* 0 - on success
|
||||
* -1 - on failure (device not support Bypass or it's a slave device)
|
||||
**/
|
||||
int set_wd_exp_mode_rd(int if_index, int bypass_mode);
|
||||
|
||||
/**
|
||||
* get_wd_exp_mode - Get adapter state when WDT expired.
|
||||
* @if_index: network device index of the controlling device
|
||||
* Output:
|
||||
* 0/1 - (bypass/tap) on success
|
||||
* -1 - on failure (device not support Bypass or it's a slave device)
|
||||
**/
|
||||
int get_wd_exp_mode_rd(int if_index);
|
||||
|
||||
/**
|
||||
* set_wd_autoreset - reset WDT periodically.
|
||||
* @if_index: network device index of the controlling device
|
||||
* @bypass_mode: adapter mode (1=tap mode, 0=bypass mode)
|
||||
* Output:
|
||||
* 1 - on success
|
||||
* -1 - on failure (device is not capable of the operation ordevice not support Bypass
|
||||
* or it's a slave device or unknown wdt status)
|
||||
**/
|
||||
int set_wd_autoreset_rd(int if_index, int time);
|
||||
|
||||
/**
|
||||
* set_wd_autoreset - reset WDT periodically.
|
||||
* @if_index: network device index of the controlling device
|
||||
* @bypass_mode: adapter mode (1=tap mode, 0=bypass mode)
|
||||
* Output:
|
||||
* 1 - on success
|
||||
* -1 - on failure (device is not capable of the operation ordevice not support Bypass
|
||||
* or it's a slave device or unknown wdt status)
|
||||
**/
|
||||
int get_wd_autoreset_rd(int if_index);
|
||||
/**
|
||||
* set_disc - set DISC state
|
||||
* @if_index: network device index of the controlling device
|
||||
* @tap_mode: 1 DISC mode , 0 normal nic mode
|
||||
* Output:
|
||||
* 0 - on success
|
||||
* -1 - on failure (device not support disconnect or it's a slave device)
|
||||
**/
|
||||
int set_bp_disc_rd(int if_index, int disc_mode);
|
||||
|
||||
/**
|
||||
* get_disc - Get disc mode state
|
||||
* @if_index: network device index of the controlling device
|
||||
* Output:
|
||||
* 0/1 - (off/on) on success
|
||||
* -1 - on failure (device not support disconnect or it's a slave device)
|
||||
**/
|
||||
int get_bp_disc_rd(int if_index);
|
||||
|
||||
/**
|
||||
* get_disc_change - Get change of DISC mode state from last status check
|
||||
* @if_index: network device index of the controlling device
|
||||
* Output:
|
||||
* 0/1 - (off/on) on success
|
||||
* -1 - on failure (device not support disconnect or it's a slave device)
|
||||
**/
|
||||
int get_bp_disc_change_rd(int if_index);
|
||||
|
||||
/**
|
||||
* set_dis_disc - Set Disable DISC mode
|
||||
* @if_index: network device index of the controlling device
|
||||
* @dis_disc: disable disconnect(1=dis, 0=en)
|
||||
* Output:
|
||||
* 0 - on success
|
||||
* -1 - on failure (device is not capable of the operation ordevice not support DISC
|
||||
* or it's a slave device)
|
||||
**/
|
||||
int set_bp_dis_disc_rd(int if_index, int dis_disc);
|
||||
|
||||
/**
|
||||
* get_dis_disc - Get Disable DISC mode state
|
||||
* @if_index: network device index of the controlling device
|
||||
* Output:
|
||||
* 0/1 - on success (normal DISC mode/ Disable DISC)
|
||||
* -1 - on failure (device is not capable of the operation ordevice not support TAP
|
||||
* or it's a slave device)
|
||||
**/
|
||||
int get_bp_dis_disc_rd(int if_index);
|
||||
|
||||
/**
|
||||
* set_disc_pwup - Set DISC mode at power-up state
|
||||
* @if_index: network device index of the controlling device
|
||||
* @disc_mode: DISC mode setting at power up state (1= en, 0= Dis)
|
||||
* Output:
|
||||
* 0 - on success
|
||||
* -1 - on failure (device is not capable of the operation ordevice not support DISC
|
||||
* or it's a slave device)
|
||||
**/
|
||||
int set_bp_disc_pwup_rd(int if_index, int disc_mode);
|
||||
|
||||
/**
|
||||
* get_disc_pwup - Get DISC mode state at power-up state
|
||||
* @if_index: network device index of the controlling device
|
||||
* Output:
|
||||
* 0/1 - on success (Disable DISC at power up state / normal DISC mode)
|
||||
* -1 - on failure (device is not capable of the operation ordevice not support DISC
|
||||
* or it's a slave device)
|
||||
**/
|
||||
int get_bp_disc_pwup_rd(int if_index);
|
||||
|
||||
|
||||
|
||||
int get_bypass_info_rd(int if_index, struct bp_info *bp_info);
|
||||
int bp_if_scan_rd(void);
|
||||
/*int get_dev_num_rd(void);*/
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
100
readme.txt
Executable file
100
readme.txt
Executable file
|
|
@ -0,0 +1,100 @@
|
|||
Silicom Linux Bypass-SD Control Utility
|
||||
|
||||
1. Compiling, installing and loading the software.
|
||||
|
||||
Compiling and installing the software in the system directory:
|
||||
# make install
|
||||
|
||||
2. Software loading:
|
||||
# bprdctl_start
|
||||
|
||||
3. Using the software.
|
||||
|
||||
3.1 Utility.
|
||||
|
||||
Usage: bprdctl_util <if_index|bus:slot.function> <command> [parameters]
|
||||
bprdctl_util <info|help>
|
||||
<if_index> - interface name, for example, eth0, or all for all Bypass-SD/TAP-SD Control devices
|
||||
<command> - bypass control command (see Commands List).
|
||||
[parameters] - set_bypass_wd command:
|
||||
WDT timeout interval, msec (0 for disabling WDT).
|
||||
set_bypass/set_bypass_pwoff/set_bypass_pwup/set_dis_bypass commands:
|
||||
on/off for enable/disable Bypass
|
||||
set_std_nic command:
|
||||
on/off for enable/disable Standard NIC mode
|
||||
set_tx command:
|
||||
on/off for enable/disable transmit
|
||||
set_tpl command:
|
||||
on/off for enable/disable TPL
|
||||
set_hw_reset command:
|
||||
on/off for enable/disable hw_reset
|
||||
set_tap/set_tap_pwup/set_dis_tap commands:
|
||||
on/off for enable/disable TAP
|
||||
set_disc/set_disc_pwup/set_dis_disc commands:
|
||||
on/off for enable/disable Disc
|
||||
set_wd_exp_mode command:
|
||||
bypass/tap/disc for bypass/tap/disc mode
|
||||
set_wd_autoreset command:
|
||||
WDT autoreset interval, msec (0 for disabling WDT autoreset).
|
||||
if_scan - refresh the list of network interfaces.
|
||||
info - print Program Information.
|
||||
help - print this message.
|
||||
Commands List:
|
||||
is_bypass - check if device is a Bypass/TAP controlling device
|
||||
get_bypass_slave - get the second port participate in the Bypass/TAP pair
|
||||
get_bypass_caps - obtain Bypass/TAP capabilities information
|
||||
get_wd_set_caps - obtain watchdog timer settings capabilities
|
||||
get_bypass_info - get bypass/TAP info
|
||||
set_bypass - set Bypass mode state
|
||||
get_bypass - get Bypass mode state
|
||||
get_bypass_change - get change of Bypass mode state from last status check
|
||||
set_dis_bypass - set Disable Bypass mode
|
||||
get_dis_bypass - get Disable Bypass mode state
|
||||
set_bypass_pwoff - set Bypass mode at power-off state
|
||||
get_bypass_pwoff - get Bypass mode at power-off state
|
||||
set_bypass_pwup - set Bypass mode at power-up state
|
||||
get_bypass_pwup - get Bypass mode at power-up state
|
||||
set_std_nic - set Standard NIC mode of operation
|
||||
get_std_nic - get Standard NIC mode settings
|
||||
set_bypass_wd - set watchdog state
|
||||
get_bypass_wd - get watchdog state
|
||||
get_wd_time_expire - get watchdog expired time
|
||||
reset_bypass_wd - reset watchdog timer
|
||||
set_tx - set transmit enable / disable
|
||||
get_tx - get transmitter state (enabled / disabled)
|
||||
set_tpl - set TPL enable / disable
|
||||
get_tpl - get TPL state (enabled / disabled)
|
||||
set_hw_reset - set hw_reset enable / disable
|
||||
get_hw_reset - get hw_reset (enabled / disabled)
|
||||
set_tap - set TAP mode state
|
||||
get_tap - get TAP mode state
|
||||
get_tap_change - get change of TAP mode state from last status check
|
||||
set_dis_tap - set Disable TAP mode
|
||||
get_dis_tap - get Disable TAP mode state
|
||||
set_tap_pwup - set TAP mode at power-up state
|
||||
get_tap_pwup - get TAP mode at power-up state
|
||||
set_disc - set Disc mode state
|
||||
get_disc - get Disc mode state
|
||||
get_disc_change - get change of Disc mode state from last status check
|
||||
set_dis_disc - set Disable Disc mode
|
||||
get_dis_disc - get Disable Disc mode state
|
||||
set_disc_pwup - set Disc mode at power-up state
|
||||
get_disc_pwup - get Disc mode at power-up state
|
||||
set_wd_exp_mode - set adapter state when WDT expired
|
||||
get_wd_exp_mode - get adapter state when WDT expired
|
||||
set_wd_autoreset - set WDT autoreset mode
|
||||
get_wd_autoreset - get WDT autoreset mode
|
||||
|
||||
Example: bprdctl_util eth0 set_bypass_wd 5000
|
||||
bprdctl_util all set_bypass on
|
||||
bprdctl_util eth0 set_wd_exp_mode tap
|
||||
bprdctl_util 0b:00.0 get_bypass_info
|
||||
|
||||
4. Software unloading.
|
||||
|
||||
# bprdctl_stop
|
||||
|
||||
5. Uninstall.
|
||||
|
||||
# make uninstall
|
||||
|
||||
46
release.txt
Executable file
46
release.txt
Executable file
|
|
@ -0,0 +1,46 @@
|
|||
Release Notes
|
||||
Silicom Linux Bypass-SD Control Utility
|
||||
Version 1.0.13
|
||||
05/09/2019
|
||||
v1.0.13
|
||||
- Added support for kernel 4.15
|
||||
|
||||
v1.0.12
|
||||
- Fixed mng port detection for adapters with PLX
|
||||
|
||||
v1.0.11
|
||||
- Added support for Bypass 100G
|
||||
|
||||
v1.0.10
|
||||
- Added support for SET_TPL for 40G adapter.
|
||||
|
||||
v1.0.9
|
||||
- Added support for SET_TX for 40G adapter.
|
||||
|
||||
v1.0.8
|
||||
- Added support for PE310G4DBiR-T.
|
||||
|
||||
v1.0.7
|
||||
- Removed debug printout.
|
||||
|
||||
v1.0.6
|
||||
- Added mux semaphore support.
|
||||
|
||||
v1.0.1.3
|
||||
- Fixed get_wd_expire.
|
||||
|
||||
v1.0.1.2
|
||||
- Fixed get_bypass_slave for 2x40.
|
||||
|
||||
v1.0.1.2
|
||||
- Fixed device_num (all) for 4x10.
|
||||
- Fixed help.
|
||||
|
||||
v1.0.0
|
||||
- Initial version, lock free.
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
Loading…
Reference in a new issue