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Upstream release 1.0.7

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Silicom Ltd 2016-04-20 14:59:33 +00:00 committed by Shoghi
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include/libbprd.h Executable file
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/**
* get_bypass_caps_vm - get second port participate in the Bypass pair
* @if_index: network device index
*
* Output:
* flags word on success;flag word is a 32-bit mask word with each bit defines different
* capability as described bellow.
* Value of 1 for supporting this feature. 0 for not supporting this feature.
* -1 - on failure (if the device is not capable of the operation or not a Bypass device)
* Bit feature description
*
* 0 BP_CAP The interface is Bypass capable in general
*
* 1 BP_STATUS_CAP The interface can report of the current Bypass mode
*
* 2 BP_STATUS_CHANGE_CAP The interface can report on a change to bypass mode from
* the last time the mode was defined
*
* 3 SW_CTL_CAP The interface is Software controlled capable for bypass/non bypass modes.
*
* 4 BP_DIS_CAP The interface is capable of disabling the Bypass mode at all times.
* This mode will retain its mode even during power loss and also after
* power recovery. This will overcome on any bypass operation due to
* watchdog timeout or set bypass command.
*
* 5 BP_DIS_STATUS_CAP The interface can report of the current DIS_BP_CAP
*
* 6 STD_NIC_CAP The interface is capable to be configured to operate as standard, non Bypass,
* NIC interface (have direct connection to interfaces at all power modes)
*
* 7 BP_PWOFF_NO_CAP The interface can be in Bypass mode at power off state
*
* 8 BP_PWOFF_OFF_CAP The interface can disconnect the Bypass mode at power off state without
* effecting all the other states of operation
*
* 9 BP_PWOFF_CTL_CAP The behavior of the Bypass mode at Power-off state can be controlled by
* software without effecting any other state
*
*10 BP_PWUP_ON_CAP The interface can be in Bypass mode when power is turned on
* (until the system take control of the bypass functionality)
*
*11 BP_PWUP_OFF_CAP The interface can disconnect from Bypass mode when power is turned on
* (until the system take control of the bypass functionality)
*
*12 BP_PWUP_CTL_CAP The behavior of the Bypass mode at Power-up can be controlled by software
*
*13 WD_CTL_CAP The interface has watchdog capabilities to turn to Bypass mode when not reset
* for defined period of time.
*
*14 WD_STATUS_CAP The interface can report on the watchdog status (Active/inactive)
*
*15 WD_TIMEOUT_CAP The interface can report the time left till watchdog triggers to Bypass mode.
*
*16-31 RESERVED
*
* **/
int get_bypass_caps_rd_fn(int dev, int port);
/**
* get_wd_set_caps - Obtain watchdog timer setting capabilities
* @if_index: network device index
*
* Output:
*
* Set of numbers defining the various parameters of the watchdog capable
* to be set to as described bellow.
* -1 - on failure (device not support Bypass or it's a slave device)
*
* Bit feature description
*
* 0-3 WD_MIN_TIME The interface WD minimal time period in 100mS units
*
* 4 WD_STEP_TIME The steps of the WD timer in
* 0 - for linear steps (WD_MIN_TIME * X)
* 1 - for multiply by 2 from previous step (WD_MIN_TIME * 2^X)
*
* 5-8 WD_STEP_COUNT Number of steps the WD timer supports in 2^X
* (X bit available for defining the value)
*
*
*
**/
int get_wd_set_caps_rd_fn(int dev, int port);
/**
* set_bypass - set Bypass state
* @if_index: network device index of the controlling device
* @bypass_mode: bypass mode (1=on, 0=off)
* Output:
* 0 - on success
* -1 - on failure (device not support Bypass or it's a slave device)
**/
int set_bypass_rd_fn(int dev, int port, int bypass_mode);
int set_tpl_rd_fn(int dev, int port, int tpl_mode);
int set_tx_rd_fn(int dev, int port, int tx_mode);
int set_reset_rd_fn(int dev, int port, int mode);
int set_bp_wait_at_pwup_rd_fn(int dev, int port, int bp_wait_at_pwup);
/**
* set_disc - set Disconnect state
* @if_index: network device index of the controlling device
* @disc_mode: disc mode (1=on, 0=off)
* Output:
* 0 - on success
* -1 - on failure (device not support Bypass or it's a slave device)
**/
int set_disc_rd_fn(int dev, int port, int disc_mode);
/**
* get_bypass - Get Bypass mode state
* Output:
* 0/1 - (off/on) on success
* -1 - on failure (device not support Bypass or it's a slave device)
**/
int get_bypass_rd_fn(int dev, int port);
int get_tpl_rd_fn(int dev, int port);
int get_bypass_rd_fn(int dev, int port);
int get_tx_rd_fn(int dev, int port);
int set_bp_hw_reset_rd_fn(int dev, int port, int bp_hw_reset);
int get_bp_hw_reset_rd_fn(int dev, int port);
int get_bp_wait_at_pwup_rd_fn(int dev, int port);
int is_bypass_rd_fn(int dev, int port);
int get_bypass_slave_rd_fn(int dev, int port, int *s_port);
/**
* get_disc - Get Disconnect mode state
* Output:
* 0/1 - (off/on) on success
* -1 - on failure (device not support Bypass or it's a slave device)
**/
int get_disc_rd_fn(int dev, int port);
/**
* get_bypass_change - Get change of Bypass mode state from last status check
* Output:
* 0/1 - (off/on) on success
* -1 - on failure (device not support Bypass or it's a slave device)
**/
int get_bypass_change_rd_fn(int dev, int port);
/**
* get_disc_change - Get change of Disconnect mode state from last status check
* Output:
* 0/1 - (off/on) on success
* -1 - on failure (device not support Bypass or it's a slave device)
**/
int get_disc_change_rd_fn(int dev, int port);
/**
* set_bypass_pwoff - Set Bypass mode at power-off state
* @if_index: network device index of the controlling device
* @bypass_mode: bypass mode setting at power off state (1=BP en, 0=BP Dis)
* Output:
* 0 - on success
* -1 - on failure (device is not capable of the operation ordevice not support Bypass
* or it's a slave device)
**/
int set_bypass_pwoff_rd_fn(int dev, int port, int bypass_mode);
/**
* get_bypass_pwoff - Get Bypass mode state at power-off state
* @if_index: network device index of the controlling device
* Output:
* 0/1 - on success (Disable bypass at power off state / normal Bypass mode)
* -1 - on failure (device is not capable of the operation ordevice not support Bypass
* or it's a slave device)
**/
int get_bypass_pwoff_rd_fn(int dev, int port);
/**
* set_bypass_pwup - Set Bypass mode at power-up state
* @if_index: network device index of the controlling device
* @bypass_mode: bypass mode setting at power up state (1=BP en, 0=BP Dis)
* Output:
* 0 - on success
* -1 - on failure (device is not capable of the operation ordevice not support Bypass
* or it's a slave device)
**/
int set_bypass_pwup_rd_fn(int dev, int port, int bypass_mode);
/**
* set_disc_pwup - Set Disconnect mode at power-up state
* @disc_mode: disc mode setting at power up state (1=BP en, 0=BP Dis)
* Output:
* 0 - on success
* -1 - on failure (device is not capable of the operation ordevice not support Bypass
* or it's a slave device)
**/
int set_disc_pwup_rd_fn(int dev, int port, int disc_mode);
/**
* get_bypass_pwup - Get Bypass mode state at power-up state
* @if_index: network device index of the controlling device
* Output:
* 0/1 - on success (Disable bypass at power up state / normal Bypass mode)
* -1 - on failure (device is not capable of the operation ordevice not support Bypass
* or it's a slave device)
**/
int get_bypass_pwup_rd_fn(int dev, int port);
/**
* get_disc_pwup - Get Disconnect mode state at power-up state
* Output:
* 0/1 - on success
* * -1 - on failure (device is not capable of the operation ordevice not support Bypass
* or it's a slave device)
**/
int get_disc_pwup_rd_fn(int dev, int port);
int set_bypass_wd_rd_fn(int dev, int port, int timeout);
/**
* get_bypass_wd - Get watchdog state
* @if_index: network device index of the controlling device
* @ms_timeout (output): WDT timeout (in ms units),
* -1 for unknown wdt status
* 0 if WDT is disabled
* Output:
* 0 - on success
* -1 - on failure (device is not capable of the operation ordevice not support Bypass
* or it's a slave device)
**/
int get_bypass_wd_rd_fn(int dev, int port, int *ms_timeout_set);
/**
* get_wd_expire_time - Get watchdog expire
* @if_index: network device index of the controlling device
* @ms_time_left (output): time left till watchdog time expire,
* -1 if WDT has expired
* 0 if WDT is disabled
* Output:
* 0 - on success
* -1 - on failure (device is not capable of the operation ordevice not support Bypass
* or it's a slave device or unknown wdt status)
**/
int get_wd_expire_time_rd_fn(int dev, int port, int *ms_time_left);
int get_wd_expire_rd_fn(int dev, int port);
/**
* reset_bypass_wd_timer - Reset watchdog timer
* @if_index: network device index of the controlling device
*
* Output:
* 1 - on success
* 0 - watchdog is not configured
* -1 - on failure (device is not capable of the operation ordevice not support Bypass
* or it's a slave device or unknown wdt status)
**/
int reset_bypass_wd_timer_rd_fn(int dev, int port);
/**
* set_std_nic - Standard NIC mode of operation
* @if_index: network device index of the controlling device
* @nic_mode: 0/1 (Default Bypass mode / Standard NIC mode)
*
* Output:
* 0 - on success
* -1 - on failure (device is not capable of the operation ordevice not support Bypass
* or it's a slave device)
**/
int set_std_nic_rd_fn(int dev, int port, int nic_mode);
/**
* get_std_nic - Get Standard NIC mode setting
* @if_index: network device index of the controlling device
*
* Output:
* 0/1 (Default Bypass mode / Standard NIC mode) on success
* -1 - on failure (device is not capable of the operation ordevice not support Bypass
* or it's a slave device)
**/
int get_std_nic_rd_fn(int dev, int port);
/**
* set_wd_exp_mode - Set adapter state when WDT expired.
* @if_index: network device index of the controlling device
* @bypass_mode: adapter mode (0/1/2 mode)
* Output:
* 0 - on success
* -1 - on failure (device not support Bypass or it's a slave device)
**/
int set_wd_exp_mode_rd_fn(int dev, int port, int mode);
/**
* get_wd_exp_mode - Get adapter state when WDT expired.
* @if_index: network device index of the controlling device
* Output:
* 0/1/2 - (bypass/tap) on success
* -1 - on failure (device not support Bypass or it's a slave device)
**/
int get_wd_exp_mode_rd_fn(int dev, int port);
int get_bypass_info_rd_fn(int dev, int port, char *dev_name, unsigned char *add_param);
int set_bp_manuf_rd_fn(int dev, int port);
/**
* set_dis_bypass - Set Disable Bypass mode
* @if_index: network device index of the controlling device
* @dis_bypass: disable bypass(1=dis, 0=en)
* Output:
* 0 - on success
* -1 - on failure (device is not capable of the operation ordevice not support Bypass
* or it's a slave device)
**/
int set_dis_bypass_rd_fn(int dev, int port, int dis_bypass);
/**
* set_dis_disc - Set Disable Disconnect mode
* @dis_bypass: disable disc(1=dis, 0=en)
* Output:
* 0 - on success
* -1 - on failure (device is not capable of the operation ordevice not support Bypass
* or it's a slave device)
**/
int set_dis_disc_rd_fn(int dev, int port, int dis_disc);
/**
* get_dis_bypass - Get Disable Bypass mode state
* @if_index: network device index of the controlling device
* Output:
* 0/1 - on success (normal Bypass mode/ Disable Bypass)
* -1 - on failure (device is not capable of the operation ordevice not support Bypass
* or it's a slave device)
**/
int get_dis_bypass_rd_fn(int dev, int port);
/**
* get_dis_disc - Get Disable Disconnect mode state
* @if_index: network device index of the controlling device
* Output:
* 0/1 - on success (normal Disc mode/ Disable Disc)
* -1 - on failure (device is not capable of the operation ordevice not support Bypass
* or it's a slave device)
**/
int get_dis_disc_rd_fn(int dev, int port);
int set_bp_blink_rd_fn(int dev, int port, int ms_timeout);
#define BP_CAP 0x01 //BIT_0
#define BP_STATUS_CAP 0x02 //BIT_1
#define BP_STATUS_CHANGE_CAP 0x04 //BIT_2
#define SW_CTL_CAP 0x08 //BIT_3
#define BP_DIS_CAP 0x10 //BIT_4
#define BP_DIS_STATUS_CAP 0x20 //BIT_5
#define STD_NIC_CAP 0x40 //BIT_6
#define BP_PWOFF_ON_CAP 0x80 //BIT_7
#define BP_PWOFF_OFF_CAP 0x0100 //BIT_8
#define BP_PWOFF_CTL_CAP 0x0200 //BIT_9
#define BP_PWUP_ON_CAP 0x0400 //BIT_10
#define BP_PWUP_OFF_CAP 0x0800 //BIT_11
#define BP_PWUP_CTL_CAP 0x1000 //BIT_12
#define WD_CTL_CAP 0x2000 //BIT_13
#define WD_STATUS_CAP 0x4000 //BIT_14
#define WD_TIMEOUT_CAP 0x8000 //BIT_15
#define TX_CTL_CAP 0x10000 //BIT_16
#define TX_STATUS_CAP 0x20000 //BIT_17
#define TAP_CAP 0x40000 //BIT_18
#define TAP_STATUS_CAP 0x80000 //BIT_19
#define TAP_STATUS_CHANGE_CAP 0x100000 //BIT_20
#define TAP_DIS_CAP 0x200000 //BIT_21
#define TAP_DIS_STATUS_CAP 0x400000 //BIT_22
#define TAP_PWUP_ON_CAP 0x800000 //BIT_23
#define TAP_PWUP_OFF_CAP 0x1000000 //BIT 24
#define TAP_PWUP_CTL_CAP 0x2000000 //BIT 25
#define NIC_CAP_NEG 0x4000000 //BIT 26
#define TPL_CAP 0x8000000 //BIT 27
#define DISC_CAP 0x10000000 //BIT 28
#define DISC_DIS_CAP 0x20000000 //BIT 29
#define DISC_PWUP_CTL_CAP 0x40000000 //BIT 30
#define WD_MIN_TIME_GET(desc) (desc & 0xf)
#define WD_STEP_COUNT_GET(desc) (desc>>5) & 0xf
#define WDT_STEP_TIME 0x10

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#ifndef __BP_CMD_H__
#define __BP_CMD_H__
//#define FW_HEADER_DEF 1
#ifndef FW_HEADER_DEF
typedef unsigned int U32_T; /* 32-bit unsigned */
typedef unsigned short int U16_T; /* 16-bit unsigned */
typedef unsigned char U8_T; /* 8-bit unsigned */
#endif
typedef U8_T byte;
#ifndef FW_HEADER_DEF
#pragma pack(push) /* push current alignment to stack */
#pragma pack(1) /* set alignment to 1 byte boundary */
#endif
/******************************************************\
* *
* COMMUNICATION PROTOCOL SPECIFICATION *
* *
* <COMMAND_ID><COMMAND_LEN><COMMAND_DATA> *
* *
\******************************************************/
/*
* BP cmd IDs
*/
#define CMD_GET_BYPASS_CAPS 1
#define CMD_GET_WD_SET_CAPS 2
#define CMD_SET_BYPASS 3
#define CMD_GET_BYPASS 4
#define CMD_GET_BYPASS_CHANGE 5
#define CMD_SET_BYPASS_WD 6
#define CMD_GET_BYPASS_WD 7
#define CMD_GET_WD_EXPIRE_TIME 8
#define CMD_RESET_BYPASS_WD_TIMER 9
#define CMD_SET_DIS_BYPASS 10
#define CMD_GET_DIS_BYPASS 11
#define CMD_SET_BYPASS_PWOFF 12
#define CMD_GET_BYPASS_PWOFF 13
#define CMD_SET_BYPASS_PWUP 14
#define CMD_GET_BYPASS_PWUP 15
#define CMD_SET_STD_NIC 16
#define CMD_GET_STD_NIC 17
#define CMD_SET_TAP 18
#define CMD_GET_TAP 19
#define CMD_GET_TAP_CHANGE 20
#define CMD_SET_DIS_TAP 21
#define CMD_GET_DIS_TAP 22
#define CMD_SET_TAP_PWUP 23
#define CMD_GET_TAP_PWUP 24
#define CMD_SET_WD_EXP_MODE 25
#define CMD_GET_WD_EXP_MODE 26
#define CMD_SET_DISC 27
#define CMD_GET_DISC 28
#define CMD_GET_DISC_CHANGE 29
#define CMD_SET_DIS_DISC 30
#define CMD_GET_DIS_DISC 31
#define CMD_SET_DISC_PWUP 32
#define CMD_GET_DISC_PWUP 33
#define CMD_SET_DISC_PWOFF 34
#define CMD_GET_DISC_PWOFF 35
#define CMD_GET_BYPASS_CAPS_EX 36
#define CMD_SET_HOST_PWOFF_MODE 37
#define CMD_GET_HOST_PWOFF_MODE 38
#define CMD_SET_HOST_PWUP_MODE 39
#define CMD_GET_HOST_PWUP_MODE 40
#define CMD_SET_DISC_PORT 41
#define CMD_GET_DISC_PORT 42
#define CMD_SET_DISC_PORT_PWUP 43
#define CMD_GET_DISC_PORT_PWUP 44
#define CMD_SET_WD_RST_RESTORE_MODE 45
#define CMD_GET_WD_RST_RESTORE_MODE 46
#define CMD_SET_TPL 47
#define CMD_GET_TPL 48
#define CMD_SET_TX 49
#define CMD_GET_TX 50
#define CMD_GET_BYPASS_INFO 100
#define CMD_GET_BP_WAIT_AT_PWUP 101
#define CMD_SET_BP_WAIT_AT_PWUP 102
#define CMD_GET_BP_HW_RESET 103
#define CMD_SET_BP_HW_RESET 104
#define CMD_SET_BP_MANUF 105
//#define CMD_RESERVED 131-132
#define CMD_GET_DEV_INFO 133
//#define CMD_RESERVED 132-139
typedef U8_T cmd_id_t;
/*
* BP cmd response codes
*/
#define BP_ERR_OK 1
#define BP_ERR_NOT_CAP 2
#define BP_ERR_DEV_BUSY 3
#define BP_ERR_INVAL_DEV_NUM 4
#define BP_ERR_INVAL_STATE 5
#define BP_ERR_INVAL_PARAM 6
#define BP_ERR_UNSUPPORTED_PARAM 7
#define BP_ERR_INVAL_CMD 8
#define BP_ERR_UNSUPPORTED_CMD 9
#define BP_ERR_INTERNAL 10
#define BP_ERR_UNKNOWN 11
typedef U8_T cmd_rsp_id_t;
typedef U8_T cmd_bp_board_t;
/*
* BP device info
*/
typedef struct _cmd_bp_info_t{
cmd_bp_board_t dev_id;
byte fw_ver;
}cmd_bp_info_t;
/*
* Disc port
*/
typedef struct _disc_port_t{
U8_T mode;
U8_T port_num;
}disc_port_t;
/*
* Tx disable
*/
typedef struct _tx_dis_t{
U8_T mode;
U8_T port_num;
}tx_dis_t;
/*
* Device info
*/
typedef union _cmd_dev_info_t{
U8_T info_id;
struct {
U8_T dev_id;
U8_T dev_rev;
U8_T eeprom_ver;
U8_T eeprom_rev;
}dev_ver;
U8_T bds_rev[4];
U8_T fw_ver[4];
U8_T hw_ver[4];
U32_T fw_build;
union {
U8_T part0[4];
U8_T part1[2];
}mac_addr;
union {
U8_T sn0[4];
U8_T sn1[4];
U8_T sn2[4];
U8_T sn3[4];
}sn;
}cmd_dev_info_t;
/*
* BP command device number
*/
#define DEV_NUM_MAX 4
typedef U8_T cmd_dev_num_t;
/*
* BP command data lenth type
*/
typedef U8_T cmd_data_len_t;
/*
* BP command data structure
*/
typedef union _cmd_data_t{
#if 0
/*
* CMD_GET_BYPASS_CAPS
*/
/*
* CMD_GET_BYPASS_CAPS_EX (1st double word)
*/
#define BP_CAP BIT0
#define BP_STATUS_CAP BIT1
#define BP_STATUS_CHANGE_CAP BIT2
#define SW_CTL_CAP BIT3
#define BP_DIS_CAP BIT4
#define BP_DIS_STATUS_CAP BIT5
#define STD_NIC_CAP BIT6
#define BP_PWOFF_ON_CAP BIT7
#define BP_PWOFF_OFF_CAP BIT8
#define BP_PWOFF_CTL_CAP BIT9
#define BP_PWUP_ON_CAP BIT10
#define BP_PWUP_OFF_CAP BIT11
#define BP_PWUP_CTL_CAP BIT12
#define WD_CTL_CAP BIT13
#define WD_STATUS_CAP BIT14
#define WD_TIMEOUT_CAP BIT15
#define TX_CTL_CAP BIT16
#define TX_STATUS_CAP BIT17
#define TAP_CAP BIT18
#define TAP_STATUS_CAP BIT19
#define TAP_STATUS_CHANGE_CAP BIT20
#define TAP_DIS_CAP BIT21
#define TAP_DIS_STATUS_CAP BIT22
#define TAP_PWUP_ON_CAP BIT23
#define TAP_PWUP_OFF_CAP BIT24
#define TAP_PWUP_CTL_CAP BIT25
#define NIC_CAP_NEG BIT26
#define TPL_CAP BIT27
#define DISC_CAP BIT28
#define DISC_DIS_CAP BIT29
#define DISC_PWUP_CTL_CAP BIT30
#define BP_CAPS_EX_CAP BIT31
#endif
U32_T bypass_caps;
/*
* CMD_GET_BYPASS_CAPS_EX (2nd double word)
*/
#if 0
#define DISC_PWOFF_CTL_CAP BIT0
#define BP_HOST_PWOFF_CTL_CAP BIT1
#define BP_HOST_PWUP_CTL_CAP BIT2
#define DISC_HOST_PWOFF_CTL_CAP BIT3
#define DISC_HOST_PWUP_CTL_CAP BIT4
#define NORMAL_HOST_PWOFF_CTL_CAP BIT5
#define NORMAL_HOST_PWUP_CTL_CAP BIT6
#define TAP_HOST_PWOFF_CTL_CAP BIT7
#define TAP_HOST_PWUP_CTL_CAP BIT8
#define DISC_PORT_CAP BIT9
#define DISC_PORT_PWUP_CTL_CAP BIT10
#endif
U32_T bypass_caps_ex;
/*
* CMD_GET_WD_SET_CAPS
*/
/* --------------------------------------------------------------------------------------
* Bit feature description Products
* ---------------------------------------------------------------------------------------
* 0-3 WD_MIN_TIME The interface WD minimal time period in PXG2/4BP - 5 (500mS)
* 100mS units All the other
* products - 1(100mS)
* ---------------------------------------------------------------------------------------
* 4 WD_STEP_TIME The steps of the WD timer in PXG2/4BP - 0
* 0 - for linear steps (WD_MIN_TIME * X) All the other
* 1 - for multiply by 2 from previous step products - 1
* (WD_MIN_TIME * 2^X)
* ---------------------------------------------------------------------------------------
* 5-8 WD_STEP_COUNT Number of register bits available for PXG2/4BP -7
* configuring the WD timer. From that the All the other
* number of steps the WD timer will have is products - 4
* 2^X (X number of bits available for
* defining the value)
* ---------------------------------------------------------------------------------------
* 9-31 RESERVED Reserved, should be ignored.
* -------------------------------------------------------------------------------------*/
U32_T wd_set_caps;
/*
* CMD_SET_BYPASS
*/
/*
* CMD_GET_BYPASS
*/
/* #define BYPASS_OFF 0 */
/* #define BYPASS_ON 1 */
U8_T bypass_mode;
/*
* CMD_GET_BYPASS_CHANGE
*/
#define BYPASS_NOT_CHANGED 0
#define BYPASS_CHANGED 1
U8_T bypass_change;
/*
* CMD_SET_BYPASS_WD
*/
/*
* CMD_GET_BYPASS_WD
*/
U32_T timeout;
U32_T timeout_set;
/*
* CMD_GET_WD_EXPIRE_TIME
*/
U32_T time_left;
/*
* CMD_SET_DIS_BYPASS
*/
/*
* CMD_GET_DIS_BYPASS
*/
#define DIS_BYPASS_ENABLE 0
#define DIS_BYPASS_DISABLE 1
U8_T dis_bypass;
/*
* CMD_SET_BYPASS_PWOFF
*/
/*
* CMD_GET_BYPASS_PWOFF
*/
#define BYPASS_PWOFF_DIS 0
#define BYPASS_PWOFF_EN 1
U8_T bypass_pwoff;
/*
* CMD_SET_BYPASS_PWUP
*/
/*
* CMD_GET_BYPASS_PWUP
*/
#define BYPASS_PWUP_DIS 0
#define BYPASS_PWUP_EN 1
U8_T bypass_pwup;
/*
* CMD_SET_HOST_PWOFF_MODE
*/
/*
* CMD_GET_HOST_PWOFF_MODE
*/
#define HOST_PWOFF_MODE_BYPASS 0
#define HOST_PWOFF_MODE_TAP 1
#define HOST_PWOFF_MODE_DISC 2
#define HOST_PWOFF_MODE_NORMAL 3
U8_T host_pwoff_mode;
/*
* CMD_SET_HOST_PWUP_MODE
*/
/*
* CMD_GET_HOST_PWUP_MODE
*/
#define HOST_PWUP_MODE_BYPASS 0
#define HOST_PWUP_MODE_TAP 1
#define HOST_PWUP_MODE_DISC 2
#define HOST_PWUP_MODE_NORMAL 3
U8_T host_pwup_mode;
/*
* CMD_SET_STD_NIC
*/
/*
* CMD_GET_STD_NIC
*/
#define STD_NIC_DIS 0
#define STD_NIC_EN 1
U8_T std_nic;
/*
* CMD_SET_TAP
*/
/*
* CMD_GET_TAP
*/
/* #define TAP_OFF 0 */
/* #define TAP_ON 1 */
U8_T tap_mode;
/*
* CMD_GET_TAP_CHANGE
*/
#define TAP_NOT_CHANGED 0
#define TAP_CHANGED 1
U8_T tap_change;
/*
* CMD_SET_DIS_TAP
*/
/*
* CMD_GET_DIS_TAP
*/
#define DIS_TAP_ENABLE 0
#define DIS_TAP_DISABLE 1
U8_T dis_tap;
/*
* CMD_SET_TAP_PWUP
*/
/*
* CMD_GET_TAP_PWUP
*/
#define TAP_PWUP_DIS 0
#define TAP_PWUP_EN 1
U8_T tap_pwup;
/*
* CMD_SET_WD_EXP_MODE
*/
/*
* CMD_GET_WD_EXP_MODE
*/
#define WD_EXP_MODE_BYPASS 0
#define WD_EXP_MODE_TAP 1
#define WD_EXP_MODE_DISC 2
#define WD_EXP_MODE_NORMAL 3
U8_T wd_exp_mode;
/*
* CMD_SET_WD_RST_RESTORE_MODE
*/
/*
* CMD_GET_WD_RST_RESTORE_MODE
*/
#define WD_RST_RESTORE_MODE_BYPASS 0
#define WD_RST_RESTORE_MODE_TAP 1
#define WD_RST_RESTORE_MODE_DISC 2
#define WD_RST_RESTORE_MODE_NORMAL 3
#define WD_RST_RESTORE_MODE_LAST_STATE 4
#define WD_RST_RESTORE_MODE_STAY_OFF 5
U8_T wd_rst_restore_mode;
/*
* CMD_SET_DISC
*/
/*
* CMD_GET_DISC
*/
/* #define DISC_OFF 0 */
/* #define DISC_ON 1 */
U8_T disc_mode;
/*
* CMD_GET_DISC_CHANGE
*/
#define DISC_NOT_CHANGED 0
#define DISC_CHANGED 1
U8_T disc_change;
/*
* CMD_SET_DIS_DISC
*/
/*
* CMD_GET_DIS_DISC
*/
#define DIS_DISC_ENABLE 0
#define DIS_DISC_DISABLE 1
U8_T dis_disc;
/*
* CMD_SET_DISC_PWUP
*/
/*
* CMD_GET_DISC_PWUP
*/
#define DISC_PWUP_DIS 0
#define DISC_PWUP_EN 1
U8_T disc_pwup;
/*
* CMD_SET_DISC_PWOFF
*/
/*
* CMD_GET_DISC_PWOFF
*/
#define DISC_PWOFF_DIS 0
#define DISC_PWOFF_EN 1
U8_T disc_pwoff;
/*
* CMD_SET_DISC_PORT
*/
/*
* CMD_GET_DISC_PORT
*/
#define DISC_PORT_OFF 0
#define DISC_PORT_ON 1
disc_port_t disc_port;
/*
* CMD_SET_DISC_PORT_PWUP
*/
/*
* CMD_GET_DISC_PORT_PWUP
*/
#define DISC_PORT_PWUP_DIS 0
#define DISC_PORT_PWUP_EN 1
disc_port_t disc_port_pwup;
/*
* CMD_SET_TPL
*/
/*
* CMD_GET_TPL
*/
#define TPL_OFF 0
#define TPL_ON 1
U8_T tpl_mode;
/*
* CMD_SET_TX
*/
/*
* CMD_GET_TX
*/
#define TX_OFF 0
#define TX_ON 1
tx_dis_t tx_dis;
/*
* CMD_GET_BYPASS_INFO
*/
cmd_bp_info_t bypass_info;
/*
* CMD_GET_DEV_INFO
*/
#define DEV_INFO_DEV_VER 0
#define DEV_INFO_FW_VER 1
#define DEV_INFO_MAC_PART0 2
#define DEV_INFO_MAC_PART1 3
#define DEV_INFO_SN_PART0 4
#define DEV_INFO_SN_PART1 5
#define DEV_INFO_SN_PART2 6
#define DEV_INFO_SN_PART3 7
#define DEV_INFO_FW_BUILD 8
#define DEV_INFO_BDS_REV 9
#define DEV_INFO_HW_REV 10
cmd_dev_info_t dev_info;
/*
* CMD_GET_BP_WAIT_AT_PWUP
*/
/*
* CMD_SET_BP_WAIT_AT_PWUP
*/
/* #define BP_WAIT_AT_PWUP_DIS 0 */
/* #define BP_WAIT_AT_PWUP_EN 1 */
U8_T bp_wait_at_pwup;
/*
* CMD_GET_BP_HW_RESET
*/
/*
* CMD_SET_BP_HW_RESET
*/
/* #define BP_HW_RESET_DIS 0 */
/* #define BP_HW_RESET_EN 1 */
U8_T bp_hw_reset;
}cmd_data_t;
/******************************************************\
* *
* <DEV_NUM><COMMAND_ID><COMMAND_LEN><COMMAND_DATA> *
* *
\******************************************************/
#define BP_CMD_PACKET_SIZE ( sizeof(cmd_dev_num_t) \
+ sizeof(cmd_id_t) \
+ sizeof(cmd_data_len_t) \
+ sizeof(cmd_data_t) )
typedef union _bp_cmd_t
{
byte cmd_bytes[BP_CMD_PACKET_SIZE]; // For Byte Access
struct {
cmd_dev_num_t cmd_dev_num;
cmd_id_t cmd_id;
cmd_data_len_t cmd_data_len;
cmd_data_t cmd_data;
}cmd;
}bp_cmd_t;
/******************************************************\
* *
* <RET_CODE><COMMAND_LEN><COMMAND_DATA> *
* *
\******************************************************/
#define BP_RSP_PACKET_SIZE ( sizeof(cmd_rsp_id_t) \
+ sizeof(cmd_data_len_t) \
+ sizeof(cmd_data_t) )
typedef union _bp_cmd_rsp_t
{
byte cmd_bytes[BP_RSP_PACKET_SIZE]; // For Byte Access
struct {
cmd_rsp_id_t rsp_id;
cmd_data_len_t rsp_data_len;
cmd_data_t rsp_data;
}rsp;
}bp_cmd_rsp_t;
#ifndef FW_HEADER_DEF
#pragma pack(pop) /* push current alignment to stack */
#endif
#endif /* End of __BP_CMD_H__ */

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#ifndef BYPASS_H
#define BYPASS_H
#include <sys/types.h>
#include <sys/socket.h>
#include <sys/io.h>
#include <fcntl.h> /* open */
#include <unistd.h>
#include <string.h>
#include <stdlib.h>
#include <sys/ioctl.h>
#include <stdio.h>
#include <string.h>
#include <errno.h>
#include <net/if.h>
#include <arpa/inet.h>
#endif

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/**************************************************************************
Copyright (c) 2006-2013, Silicom
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
3. Neither the name of the Silicom nor the names of its
contributors may be used to endorse or promote products derived from
this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
***************************************************************************/
/* Bypass related */
#define SYNC_CMD_VAL 2 /* 10b */
#define SYNC_CMD_LEN 2
#define WR_CMD_VAL 2 /* 10b */
#define WR_CMD_LEN 2
#define RD_CMD_VAL 1 /* 10b */
#define RD_CMD_LEN 2
#define ADDR_CMD_LEN 4
#define WR_DATA_LEN 8
#define RD_DATA_LEN 8
#define PIC_SIGN_REG_ADDR 0x7
#define PIC_SIGN_VALUE 0xcd
#define STATUS_REG_ADDR 0
#define WDT_EN_MASK 0x01 //BIT_0
#define CMND_EN_MASK 0x02 //BIT_1
#define DIS_BYPASS_CAP_MASK 0x04 //BIT_2 /* Bypass Cap is disable*/
#define DFLT_PWRON_MASK 0x08 //BIT_3
#define BYPASS_OFF_MASK 0x10 //BIT_4
#define BYPASS_FLAG_MASK 0x20 //BIT_5
#define STD_NIC_MASK (DIS_BYPASS_CAP_MASK | BYPASS_OFF_MASK | DFLT_PWRON_MASK)
#define WD_EXP_FLAG_MASK 0x40 //BIT_6
#define DFLT_PWROFF_MASK 0x80 //BIT_7
#define STD_NIC_PWOFF_MASK (DIS_BYPASS_CAP_MASK | BYPASS_OFF_MASK | DFLT_PWRON_MASK | DFLT_PWROFF_MASK)
#define PRODUCT_CAP_REG_ADDR 0x5
#define BYPASS_SUPPORT_MASK 0x01 //BIT_0
#define TAP_SUPPORT_MASK 0x02 //BIT_1
#define NORMAL_UNSUPPORT_MASK 0x04 /*BIT_2*/
#define DISC_SUPPORT_MASK 0x08 //BIT_3
#define TPL2_SUPPORT_MASK 0x10 //BIT_4
#define DISC_PORT_SUPPORT_MASK 0x20 //BIT_5
#define STATUS_TAP_REG_ADDR 0x6
#define WDTE_TAP_BPN_MASK 0x01 //BIT_1 /* 1 when wdt expired -> TAP, 0 - Bypass */
#define DIS_TAP_CAP_MASK 0x04 //BIT_2 /* TAP Cap is disable*/
#define DFLT_PWRON_TAP_MASK 0x08 //BIT_3
#define TAP_OFF_MASK 0x10 //BIT_4
#define TAP_FLAG_MASK 0x20 //BIT_5
#define TX_DISA_MASK 0x40
#define TX_DISB_MASK 0x80
#define STD_NIC_TAP_MASK (DIS_TAP_CAP_MASK | TAP_OFF_MASK | DFLT_PWRON_TAP_MASK)
#define STATUS_DISC_REG_ADDR 13
#define WDTE_DISC_BPN_MASK 0x01 //BIT_0 /* 1 when wdt expired -> TAP, 0 - Bypass */
#define STD_NIC_ON_MASK 0x02 //BIT_1
#define DIS_DISC_CAP_MASK 0x04 //BIT_2 /* TAP Cap is disable*/
#define DFLT_PWRON_DISC_MASK 0x08 //BIT_3
#define DISC_OFF_MASK 0x10 //BIT_4
#define DISC_FLAG_MASK 0x20 //BIT_5
#define TPL2_FLAG_MASK 0x40 //BIT_6
#define STD_NIC_DISC_MASK DIS_DISC_CAP_MASK
#define CONT_CONFIG_REG_ADDR 12
#define EN_HW_RESET_MASK 0x2 /* BIT_1 */
#define WAIT_AT_PWUP_MASK 0x1 /* BIT_0 */
#define VER_REG_ADDR 0x1
#define BP_FW_VER_A0 0xa0
#define BP_FW_VER_A1 0xa1
#define INT_VER_MASK 0xf0
#define EXT_VER_MASK 0xf
/* */
#define PXG2BPI_VER 0x0
#define PXG2TBPI_VER 0x1
#define PXE2TBPI_VER 0x2
#define PXG4BPFI_VER 0x4
#define BP_FW_EXT_VER7 0x6
#define BP_FW_EXT_VER8 0x8
#define BP_FW_EXT_VER9 0x9
#define OLD_IF_VER -1
#define CMND_REG_ADDR 10 /* 1010b */
#define WDT_REG_ADDR 4
#define TMRL_REG_ADDR 2
#define TMRH_REG_ADDR 3
/* NEW_FW */
#define WDT_INTERVAL 5 //20
#define WDT_CMND_INTERVAL 200 //50
#define CMND_INTERVAL 200 //100 /* usec */
#define PULSE_TIME 100
/* OLD_FW */
#define INIT_CMND_INTERVAL 40
#define PULSE_INTERVAL 5
#define WDT_TIME_CNT 3
/* Intel Commands */
#define CMND_OFF_INT 0xf
#define PWROFF_BYPASS_ON_INT 0x5
#define BYPASS_ON_INT 0x6
#define DIS_BYPASS_CAP_INT 0x4
#define RESET_WDT_INT 0x1
/* Intel timing */
#define BYPASS_DELAY_INT 4 /* msec */
#define CMND_INTERVAL_INT 2 /* msec */
/* Silicom Commands */
#define CMND_ON 0x4
#define CMND_OFF 0x2
#define BYPASS_ON 0xa
#define BYPASS_OFF 0x8
#define PORT_LINK_EN 0xe
#define PORT_LINK_DIS 0xc
#define WDT_ON 0x10 /* 0x1f (11111) - max*/
#define TIMEOUT_UNIT 100
#define TIMEOUT_MAX_STEP 15
#define WDT_TIMEOUT_MIN 100 /* msec */
#define WDT_TIMEOUT_MAX 3276800 /* msec */
#define WDT_AUTO_MIN_INT 500
#define WDT_TIMEOUT_DEF WDT_TIMEOUT_MIN
#define WDT_OFF 0x6
#define WDT_RELOAD 0x9
#define RESET_CONT 0x20
#define DIS_BYPASS_CAP 0x22
#define EN_BYPASS_CAP 0x24
#define BYPASS_STATE_PWRON 0x26
#define NORMAL_STATE_PWRON 0x28
#define BYPASS_STATE_PWROFF 0x27
#define NORMAL_STATE_PWROFF 0x29
#define TAP_ON 0xb
#define TAP_OFF 0x9
#define TAP_STATE_PWRON 0x2a
#define DIS_TAP_CAP 0x2c
#define EN_TAP_CAP 0x2e
#define STD_NIC_OFF 0x86
#define STD_NIC_ON 0x84
#define DISC_ON 0x85
#define DISC_OFF 0x8a
#define DISC_STATE_PWRON 0x87
#define DIS_DISC_CAP 0x88
#define EN_DISC_CAP 0x89
#define TPL2_ON 0x8c
#define TPL2_OFF 0x8b
#define BP_WAIT_AT_PWUP_EN 0x80
#define BP_WAIT_AT_PWUP_DIS 0x81
#define BP_HW_RESET_EN 0x82
#define BP_HW_RESET_DIS 0x83
#define TX_DISA 0x8d
#define TX_DISB 0x8e
#define TX_ENA 0xA0
#define TX_ENB 0xA1
#define TX_DISA_PWRUP 0xA2
#define TX_DISB_PWRUP 0xA3
#define TX_ENA_PWRUP 0xA4
#define TX_ENB_PWRUP 0xA5
#define BYPASS_CAP_DELAY 35 /* msec */
#define DFLT_PWRON_DELAY 10 /* msec */
#define LATCH_DELAY 15 /* msec */
#define EEPROM_WR_DELAY 20 /* msec */
#define BP_LINK_MON_DELAY 4 /* sec */
#define BP_FW_EXT_VER0 0xa0
#define BP_FW_EXT_VER1 0xa1
#define BP_FW_EXT_VER2 0xb1
#define BP_OK 0
#define BP_NOT_CAP -1
#define WDT_STATUS_EXP -2
#define WDT_STATUS_UNKNOWN -1
#define WDT_STATUS_EN 1
#define WDT_STATUS_DIS 0
#define ETH_P_BPTEST 0xabba
#define BPTEST_DATA_LEN 60

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#include "libbprd.h"
#include "bplib.h"
#include "bp_cmd.h"
#include "librdi.h"
#include "bypass.h"
static int bp_cmd_request(int dev, bp_cmd_t *bp_cmd_buf, bp_cmd_rsp_t *bp_rsp_buf);
static int bp_cmd_request(int dev, bp_cmd_t *bp_cmd_buf, bp_cmd_rsp_t *bp_rsp_buf) {
int ret_val;
int try_num = 10;
rdi_bp_query_data_t rdi_bp_query_data;
/* atomic_set(&pbpctl_dev->wdt_busy,1); */
/*
* Send command
*/
while (try_num--) {
memset(bp_rsp_buf, 0, sizeof(bp_cmd_rsp_t));
memset(&rdi_bp_query_data, 0, sizeof(rdi_bp_query_data_t));
rdi_bp_query_data.data.num = sizeof(bp_cmd_t);
memcpy(&rdi_bp_query_data.data.list[0], bp_cmd_buf, sizeof(bp_cmd_t));
usleep(CMND_INTERVAL);
if ((ret_val = rdi_bp_write(dev, 0x57, &rdi_bp_query_data, RDI_FLCM_DEV)<0)) {
printf("bp_cmd_request(write): Not supported!\n");
continue;
// return 0;
}
usleep(CMND_INTERVAL);
#if 1
/*
* Receive replay
*/
memset(&rdi_bp_query_data, 0, sizeof(rdi_bp_query_data_t));
rdi_bp_query_data.data.num=sizeof(bp_cmd_rsp_t);
if ((ret_val = rdi_bp_read(dev, 0x57, &rdi_bp_query_data, RDI_FLCM_DEV))<0) {
printf("bp_cmd_request(read): Not supported!\n");
continue;
//return 0;
}
#endif
// if (bp_rsp_buf->rsp.rsp_id != BP_ERR_OK)
// continue;
memcpy(bp_rsp_buf, &rdi_bp_query_data.data.list[0], sizeof(bp_cmd_rsp_t));
if (bp_rsp_buf->rsp.rsp_id != BP_ERR_OK)
continue;
#if 1
if (bp_rsp_buf->rsp.rsp_id != BP_ERR_OK)
printf("bp_cmd_request(got err code or corrupted data!) (%x %x %x %x %x %x)\n",
bp_rsp_buf->cmd_bytes[0],bp_rsp_buf->cmd_bytes[1],bp_rsp_buf->cmd_bytes[2],
bp_rsp_buf->cmd_bytes[3],bp_rsp_buf->cmd_bytes[4],bp_rsp_buf->cmd_bytes[5]);
#endif
break;
}
/*atomic_set(&pbpctl_dev->wdt_busy,0);*/
if(!try_num)
return 0;
return 1;
}
int is_bypass_port_rd_fn(int dev, int port){
return(((port == 1)||(port == 3)) ? 1:0);
}
int is_bypass_rd_fn(int dev, int port){
bp_cmd_t bp_cmd_buf;
bp_cmd_rsp_t bp_rsp_buf;
int ret=-1;
memset(&bp_cmd_buf, 0, sizeof(bp_cmd_buf));
memset(&bp_rsp_buf, 0, sizeof(bp_cmd_rsp_t));
bp_cmd_buf.cmd.cmd_dev_num = (port == 1)? 0:1;
bp_cmd_buf.cmd.cmd_id = CMD_GET_BYPASS;
if(bp_cmd_request(dev, &bp_cmd_buf, &bp_rsp_buf)) {
if(!is_bypass_port_rd_fn(dev, port))
return 0;
return 1;
}
return -1;
}
int set_bypass_rd_fn (int dev, int port, int bypass_mode){
bp_cmd_t bp_cmd_buf;
bp_cmd_rsp_t bp_rsp_buf;
int ret=-1;
if(!is_bypass_port_rd_fn(dev, port))
return ret;
memset(&bp_cmd_buf, 0, sizeof(bp_cmd_buf));
memset(&bp_rsp_buf, 0, sizeof(bp_cmd_rsp_t));
bp_cmd_buf.cmd.cmd_dev_num= (port == 1)? 0:1;
bp_cmd_buf.cmd.cmd_id=CMD_SET_BYPASS;
bp_cmd_buf.cmd.cmd_data.bypass_mode=bypass_mode?1:0;
if(bp_cmd_request(dev, &bp_cmd_buf, &bp_rsp_buf)) {
if (bp_rsp_buf.rsp.rsp_id == BP_ERR_OK) {
ret=0;
}
}
usleep(LATCH_DELAY*1000);
return ret;
}
int get_wd_expire_rd_fn (int dev, int port){
int ret=-1, gpio = 0;
if(!is_bypass_port_rd_fn(dev, port))
return ret;
gpio = (port==1)?9:10;
if ((rdi_set_gpio_dir(dev, gpio, 0, 0, RDI_FLCM_DEV))<0) {
printf("Fail\n");
fflush(stdout);
return -1;
}
if ((ret = rdi_get_gpio(dev, gpio, RDI_FLCM_DEV))<0) {
printf("Fail\n");
fflush(stdout);
return -1;
}
return (ret==0?0:1);
}
int get_bypass_rd_fn (int dev, int port){
bp_cmd_t bp_cmd_buf;
bp_cmd_rsp_t bp_rsp_buf;
int ret=-1;
if(!is_bypass_port_rd_fn(dev, port))
return ret;
memset(&bp_cmd_buf, 0, sizeof(bp_cmd_buf));
memset(&bp_rsp_buf, 0, sizeof(bp_cmd_rsp_t));
bp_cmd_buf.cmd.cmd_dev_num = (port == 1)? 0:1;
bp_cmd_buf.cmd.cmd_id = CMD_GET_BYPASS;
if(bp_cmd_request(dev, &bp_cmd_buf, &bp_rsp_buf)) {
if (bp_rsp_buf.rsp.rsp_id == BP_ERR_OK) {
if (bp_rsp_buf.rsp.rsp_data.bypass_pwoff == BYPASS_PWOFF_EN)
ret = 1;
else if (bp_rsp_buf.rsp.rsp_data.bypass_pwoff == BYPASS_PWOFF_DIS)
ret = 0;
}
}
return ret;
}
int get_bypass_change_rd_fn(int dev, int port){
bp_cmd_t bp_cmd_buf;
bp_cmd_rsp_t bp_rsp_buf;
int ret = -1;
if(!is_bypass_port_rd_fn(dev, port))
return ret;
memset(&bp_cmd_buf, 0, sizeof(bp_cmd_buf));
memset(&bp_rsp_buf, 0, sizeof(bp_cmd_rsp_t));
bp_cmd_buf.cmd.cmd_dev_num = (port == 1)? 0:1;;
bp_cmd_buf.cmd.cmd_id = CMD_GET_BYPASS_CHANGE;
if(bp_cmd_request(dev, &bp_cmd_buf, &bp_rsp_buf)) {
if (bp_rsp_buf.rsp.rsp_data.bypass_change == BYPASS_CHANGED)
ret = 1;
else if (bp_rsp_buf.rsp.rsp_data.bypass_change == BYPASS_NOT_CHANGED)
ret = 0;
}
return ret;
}
int set_dis_bypass_rd_fn(int dev, int port, int dis_bypass){
bp_cmd_t bp_cmd_buf;
bp_cmd_rsp_t bp_rsp_buf;
int ret=-1;
if(!is_bypass_port_rd_fn(dev, port))
return ret;
memset(&bp_cmd_buf, 0, sizeof(bp_cmd_buf));
memset(&bp_rsp_buf, 0, sizeof(bp_cmd_rsp_t));
bp_cmd_buf.cmd.cmd_dev_num = (port == 1)? 0:1;
bp_cmd_buf.cmd.cmd_id = CMD_SET_DIS_BYPASS;
bp_cmd_buf.cmd.cmd_data.dis_bypass =
dis_bypass?DIS_BYPASS_DISABLE:DIS_BYPASS_ENABLE;
if(bp_cmd_request(dev, &bp_cmd_buf, &bp_rsp_buf)) {
if (bp_rsp_buf.rsp.rsp_id == BP_ERR_OK) {
ret=0;
}
}
usleep(BYPASS_CAP_DELAY*1000);
return ret;
}
int get_dis_bypass_rd_fn(int dev, int port){
bp_cmd_t bp_cmd_buf;
bp_cmd_rsp_t bp_rsp_buf;
int ret=-1;
if(!is_bypass_port_rd_fn(dev, port))
return ret;
memset(&bp_cmd_buf, 0, sizeof(bp_cmd_buf));
memset(&bp_rsp_buf, 0, sizeof(bp_cmd_rsp_t));
bp_cmd_buf.cmd.cmd_dev_num = (port == 1)? 0:1;
bp_cmd_buf.cmd.cmd_id = CMD_GET_DIS_BYPASS;
if(bp_cmd_request(dev, &bp_cmd_buf, &bp_rsp_buf)) {
if (bp_rsp_buf.rsp.rsp_data.dis_bypass==DIS_BYPASS_DISABLE)
ret=1;
else if (bp_rsp_buf.rsp.rsp_data.dis_bypass==DIS_BYPASS_ENABLE)
ret=0;
}
return ret;
}
int set_bypass_pwoff_rd_fn (int dev, int port, int bypass_mode){
bp_cmd_t bp_cmd_buf;
bp_cmd_rsp_t bp_rsp_buf;
int ret = -1;
if(!is_bypass_port_rd_fn(dev, port))
return ret;
memset(&bp_cmd_buf, 0, sizeof(bp_cmd_buf));
memset(&bp_rsp_buf, 0, sizeof(bp_cmd_rsp_t));
bp_cmd_buf.cmd.cmd_dev_num = (port == 1)? 0:1;
bp_cmd_buf.cmd.cmd_id = CMD_SET_BYPASS_PWOFF;
bp_cmd_buf.cmd.cmd_data.bypass_pwoff =
bypass_mode?BYPASS_PWOFF_EN:BYPASS_PWOFF_DIS;
if(bp_cmd_request(dev, &bp_cmd_buf, &bp_rsp_buf)) {
if (bp_rsp_buf.rsp.rsp_id == BP_ERR_OK) {
ret=0;
}
}
usleep(EEPROM_WR_DELAY*1000);
return ret;
}
int get_bypass_pwoff_rd_fn(int dev, int port){
bp_cmd_t bp_cmd_buf;
bp_cmd_rsp_t bp_rsp_buf;
int ret = -1;
if(!is_bypass_port_rd_fn(dev, port))
return ret;
memset(&bp_cmd_buf, 0, sizeof(bp_cmd_buf));
memset(&bp_rsp_buf, 0, sizeof(bp_cmd_rsp_t));
bp_cmd_buf.cmd.cmd_dev_num = (port == 1)? 0:1;
bp_cmd_buf.cmd.cmd_id = CMD_GET_BYPASS_PWOFF;
if(bp_cmd_request(dev, &bp_cmd_buf, &bp_rsp_buf)) {
if (bp_rsp_buf.rsp.rsp_id == BP_ERR_OK) {
if (bp_rsp_buf.rsp.rsp_data.bypass_pwoff == BYPASS_PWOFF_EN)
ret = 1;
else if (bp_rsp_buf.rsp.rsp_data.bypass_pwoff == BYPASS_PWOFF_DIS)
ret = 0;
}
}
return ret;
}
int set_bypass_pwup_rd_fn(int dev, int port, int bypass_mode){
bp_cmd_t bp_cmd_buf;
bp_cmd_rsp_t bp_rsp_buf;
int ret = -1;
if(!is_bypass_port_rd_fn(dev, port))
return ret;
memset(&bp_cmd_buf, 0, sizeof(bp_cmd_buf));
memset(&bp_rsp_buf, 0, sizeof(bp_cmd_rsp_t));
bp_cmd_buf.cmd.cmd_dev_num = (port == 1)? 0:1;
bp_cmd_buf.cmd.cmd_id = CMD_SET_BYPASS_PWUP;
bp_cmd_buf.cmd.cmd_data.bypass_pwup =
bypass_mode?BYPASS_PWUP_EN:BYPASS_PWUP_DIS;
if(bp_cmd_request(dev, &bp_cmd_buf, &bp_rsp_buf)) {
if (bp_rsp_buf.rsp.rsp_id == BP_ERR_OK) {
ret=0;
}
}
usleep(EEPROM_WR_DELAY*1000);
return ret;
}
int get_bypass_pwup_rd_fn(int dev, int port){
bp_cmd_t bp_cmd_buf;
bp_cmd_rsp_t bp_rsp_buf;
int ret = -1;
if(!is_bypass_port_rd_fn(dev, port))
return ret;
memset(&bp_cmd_buf, 0, sizeof(bp_cmd_buf));
memset(&bp_rsp_buf, 0, sizeof(bp_cmd_rsp_t));
bp_cmd_buf.cmd.cmd_dev_num = (port == 1)? 0:1;
bp_cmd_buf.cmd.cmd_id = CMD_GET_BYPASS_PWUP;
if(bp_cmd_request(dev, &bp_cmd_buf, &bp_rsp_buf)) {
if (bp_rsp_buf.rsp.rsp_id == BP_ERR_OK) {
if (bp_rsp_buf.rsp.rsp_data.bypass_pwup == BYPASS_PWUP_EN)
ret=1;
else if (bp_rsp_buf.rsp.rsp_data.bypass_pwup == BYPASS_PWUP_DIS)
ret=0;
}
}
return ret;
}
int set_bypass_wd_rd_fn(int dev, int port, int timeout){
bp_cmd_t bp_cmd_buf;
bp_cmd_rsp_t bp_rsp_buf;
int ret = -1;
if(!is_bypass_port_rd_fn(dev, port))
return ret;
memset(&bp_cmd_buf, 0, sizeof(bp_cmd_buf));
memset(&bp_rsp_buf, 0, sizeof(bp_cmd_rsp_t));
bp_cmd_buf.cmd.cmd_dev_num = (port == 1)? 0:1;
bp_cmd_buf.cmd.cmd_id = CMD_SET_BYPASS_WD;
bp_cmd_buf.cmd.cmd_data.timeout = htonl(timeout);
if(bp_cmd_request(dev, &bp_cmd_buf, &bp_rsp_buf)) {
if (bp_rsp_buf.rsp.rsp_id == BP_ERR_OK) {
ret = ntohl(bp_rsp_buf.rsp.rsp_data.timeout_set);
}
}
return ret;
}
int get_bypass_wd_rd_fn(int dev, int port, int *timeout){
bp_cmd_t bp_cmd_buf;
bp_cmd_rsp_t bp_rsp_buf;
int ret = -1;
if(!is_bypass_port_rd_fn(dev, port))
return ret;
memset(&bp_cmd_buf, 0, sizeof(bp_cmd_buf));
memset(&bp_rsp_buf, 0, sizeof(bp_cmd_rsp_t));
bp_cmd_buf.cmd.cmd_dev_num = (port == 1)? 0:1;
bp_cmd_buf.cmd.cmd_id = CMD_GET_BYPASS_WD;
if(bp_cmd_request(dev, &bp_cmd_buf, &bp_rsp_buf)) {
if (bp_rsp_buf.rsp.rsp_id == BP_ERR_OK) {
*timeout = ntohl(bp_rsp_buf.rsp.rsp_data.timeout_set);
ret = 0;
}
}
return ret;
}
int get_wd_expire_time_rd_fn(int dev, int port, int *time_left){
bp_cmd_t bp_cmd_buf;
bp_cmd_rsp_t bp_rsp_buf;
int ret=-1;
if(!is_bypass_port_rd_fn(dev, port))
return ret;
memset(&bp_cmd_buf, 0, sizeof(bp_cmd_buf));
memset(&bp_rsp_buf, 0, sizeof(bp_cmd_rsp_t));
bp_cmd_buf.cmd.cmd_dev_num = (port == 1)? 0:1;
bp_cmd_buf.cmd.cmd_id=CMD_GET_WD_EXPIRE_TIME;
if(bp_cmd_request(dev, &bp_cmd_buf, &bp_rsp_buf)) {
if (bp_rsp_buf.rsp.rsp_id == BP_ERR_OK) {
*time_left = ntohl(bp_rsp_buf.rsp.rsp_data.time_left);
if (*time_left == 0)
ret = 0;
else ret = 1;
}
}
return ret;
}
int reset_bypass_wd_timer_rd_fn(int dev, int port){
int ret=-1, gpio = 0;
unsigned int val;
unsigned int subdevice;
if(!is_bypass_port_rd_fn(dev, port))
return ret;
if ((ret = rdi_get_reg(dev, 0x12000b, (unsigned int *)&val, RDI_FLCM_DEV))<0) {
printf("Fail\n");
fflush(stdout);
return -1;
}
subdevice = (val >> 16) & 0xffff;
if(subdevice == 0)
gpio = (port==1)?10:11;
else
gpio = (port==1)?9:10;
if ((rdi_set_gpio_dir(dev, gpio, 1, 1 , RDI_FLCM_DEV))<0) {
printf("Fail\n");
fflush(stdout);
return -1;
}
if ((rdi_set_gpio_dir(dev, gpio, 1, 0 , RDI_FLCM_DEV))<0) {
printf("Fail\n");
fflush(stdout);
return -1;
}
usleep(WDT_INTERVAL);
if ((rdi_set_gpio_dir(dev, gpio, 1, 1 , RDI_FLCM_DEV))<0) {
printf("Fail\n");
fflush(stdout);
return -1;
}
return 1;
}
int get_wd_set_caps_rd_fn(int dev, int port){
bp_cmd_t bp_cmd_buf;
bp_cmd_rsp_t bp_rsp_buf;
int ret=-1;
if(!is_bypass_port_rd_fn(dev, port))
return ret;
memset(&bp_cmd_buf, 0, sizeof(bp_cmd_buf));
memset(&bp_rsp_buf, 0, sizeof(bp_cmd_rsp_t));
bp_cmd_buf.cmd.cmd_dev_num = (port == 1)? 0:1;
bp_cmd_buf.cmd.cmd_id = CMD_GET_WD_SET_CAPS;
if(bp_cmd_request(dev, &bp_cmd_buf, &bp_rsp_buf)) {
if (bp_rsp_buf.rsp.rsp_id == BP_ERR_OK) {
if (bp_rsp_buf.rsp.rsp_id == BP_ERR_OK)
ret=ntohl(bp_rsp_buf.rsp.rsp_data.wd_set_caps);
}
}
return ret;
}
int set_std_nic_rd_fn(int dev, int port, int nic_mode){
bp_cmd_t bp_cmd_buf;
bp_cmd_rsp_t bp_rsp_buf;
int ret = -1;
if(!is_bypass_port_rd_fn(dev, port))
return ret;
memset(&bp_cmd_buf, 0, sizeof(bp_cmd_buf));
memset(&bp_rsp_buf, 0, sizeof(bp_cmd_rsp_t));
bp_cmd_buf.cmd.cmd_dev_num = (port == 1)? 0:1;
bp_cmd_buf.cmd.cmd_id=CMD_SET_STD_NIC;
bp_cmd_buf.cmd.cmd_data.std_nic =
nic_mode?STD_NIC_EN:STD_NIC_DIS;
if(bp_cmd_request(dev, &bp_cmd_buf, &bp_rsp_buf)) {
if (bp_rsp_buf.rsp.rsp_id == BP_ERR_OK) {
ret=0;
}
}
usleep(BYPASS_CAP_DELAY*1000);
return ret;
}
int get_std_nic_rd_fn(int dev, int port){
bp_cmd_t bp_cmd_buf;
bp_cmd_rsp_t bp_rsp_buf;
int ret=-1;
if(!is_bypass_port_rd_fn(dev, port))
return ret;
memset(&bp_cmd_buf, 0, sizeof(bp_cmd_buf));
memset(&bp_rsp_buf, 0, sizeof(bp_cmd_rsp_t));
bp_cmd_buf.cmd.cmd_dev_num = (port == 1)? 0:1;
bp_cmd_buf.cmd.cmd_id = CMD_GET_STD_NIC;
if(bp_cmd_request(dev, &bp_cmd_buf, &bp_rsp_buf)) {
if (bp_rsp_buf.rsp.rsp_id == BP_ERR_OK) {
if (bp_rsp_buf.rsp.rsp_data.std_nic==STD_NIC_EN)
ret=1;
else if (bp_rsp_buf.rsp.rsp_data.std_nic==STD_NIC_DIS)
ret=0;
}
}
return ret;
}
int set_disc_rd_fn (int dev, int port, int disc_mode){
bp_cmd_t bp_cmd_buf;
bp_cmd_rsp_t bp_rsp_buf;
int ret=-1;
if(!is_bypass_port_rd_fn(dev, port))
return ret;
memset(&bp_cmd_buf, 0, sizeof(bp_cmd_buf));
memset(&bp_rsp_buf, 0, sizeof(bp_cmd_rsp_t));
bp_cmd_buf.cmd.cmd_dev_num = (port == 1)? 0:1;
bp_cmd_buf.cmd.cmd_id = CMD_SET_DISC;
bp_cmd_buf.cmd.cmd_data.disc_mode=disc_mode?1:0;
if(bp_cmd_request(dev, &bp_cmd_buf, &bp_rsp_buf)) {
if (bp_rsp_buf.rsp.rsp_id == BP_ERR_OK) {
ret=0;
}
}
usleep(LATCH_DELAY*1000);
return ret;
}
int get_disc_rd_fn(int dev, int port){
bp_cmd_t bp_cmd_buf;
bp_cmd_rsp_t bp_rsp_buf;
int ret = -1;
if(!is_bypass_port_rd_fn(dev, port))
return ret;
memset(&bp_cmd_buf, 0, sizeof(bp_cmd_buf));
memset(&bp_rsp_buf, 0, sizeof(bp_cmd_rsp_t));
bp_cmd_buf.cmd.cmd_dev_num = (port == 1)? 0:1;
bp_cmd_buf.cmd.cmd_id = CMD_GET_DISC;
if(bp_cmd_request(dev, &bp_cmd_buf, &bp_rsp_buf)) {
if (bp_rsp_buf.rsp.rsp_id == BP_ERR_OK) {
if (bp_rsp_buf.rsp.rsp_data.disc_mode==1)
ret=1;
else if (bp_rsp_buf.rsp.rsp_data.disc_mode==0)
ret=0;
}
}
return ret;
}
int set_disc_pwup_rd_fn(int dev, int port, int disc_mode){
bp_cmd_t bp_cmd_buf;
bp_cmd_rsp_t bp_rsp_buf;
int ret=-1;
if(!is_bypass_port_rd_fn(dev, port))
return ret;
memset(&bp_cmd_buf, 0, sizeof(bp_cmd_buf));
memset(&bp_rsp_buf, 0, sizeof(bp_cmd_rsp_t));
bp_cmd_buf.cmd.cmd_dev_num = (port == 1)? 0:1;
bp_cmd_buf.cmd.cmd_id = CMD_SET_DISC_PWUP;
bp_cmd_buf.cmd.cmd_data.disc_pwup =
disc_mode?DISC_PWUP_EN:DISC_PWUP_DIS;
if(bp_cmd_request(dev, &bp_cmd_buf, &bp_rsp_buf)) {
if (bp_rsp_buf.rsp.rsp_id == BP_ERR_OK) {
ret=0;
}
}
usleep(EEPROM_WR_DELAY*1000);
return ret;
}
int get_disc_pwup_rd_fn(int dev, int port){
bp_cmd_t bp_cmd_buf;
bp_cmd_rsp_t bp_rsp_buf;
int ret = -1;
if(!is_bypass_port_rd_fn(dev, port))
return ret;
memset(&bp_cmd_buf, 0, sizeof(bp_cmd_buf));
memset(&bp_rsp_buf, 0, sizeof(bp_cmd_rsp_t));
bp_cmd_buf.cmd.cmd_dev_num = (port == 1)? 0:1;
bp_cmd_buf.cmd.cmd_id = CMD_GET_DISC_PWUP;
if(bp_cmd_request(dev, &bp_cmd_buf, &bp_rsp_buf)) {
if (bp_rsp_buf.rsp.rsp_id == BP_ERR_OK) {
if (bp_rsp_buf.rsp.rsp_data.disc_pwup==DISC_PWUP_EN)
ret=1;
else if (bp_rsp_buf.rsp.rsp_data.disc_pwup==DISC_PWUP_DIS)
ret=0;
}
}
return ret;
}
int get_disc_change_rd_fn(int dev, int port){
bp_cmd_t bp_cmd_buf;
bp_cmd_rsp_t bp_rsp_buf;
int ret = -1;
if(!is_bypass_port_rd_fn(dev, port))
return ret;
memset(&bp_cmd_buf, 0, sizeof(bp_cmd_buf));
memset(&bp_rsp_buf, 0, sizeof(bp_cmd_rsp_t));
bp_cmd_buf.cmd.cmd_dev_num = (port == 1)? 0:1;
bp_cmd_buf.cmd.cmd_id = CMD_GET_DISC_CHANGE;
if(bp_cmd_request(dev, &bp_cmd_buf, &bp_rsp_buf)) {
if (bp_rsp_buf.rsp.rsp_id == BP_ERR_OK) {
if (bp_rsp_buf.rsp.rsp_data.disc_change==DISC_CHANGED)
ret=1;
else if (bp_rsp_buf.rsp.rsp_data.disc_change==DISC_NOT_CHANGED)
ret=0;
}
}
return ret;
}
int set_dis_disc_rd_fn(int dev, int port, int dis_param){
bp_cmd_t bp_cmd_buf;
bp_cmd_rsp_t bp_rsp_buf;
int ret = -1;
if(!is_bypass_port_rd_fn(dev, port))
return ret;
memset(&bp_cmd_buf, 0, sizeof(bp_cmd_buf));
memset(&bp_rsp_buf, 0, sizeof(bp_cmd_rsp_t));
bp_cmd_buf.cmd.cmd_dev_num = (port == 1)? 0:1;
bp_cmd_buf.cmd.cmd_id = CMD_SET_DIS_DISC;
bp_cmd_buf.cmd.cmd_data.dis_disc =
dis_param?DIS_DISC_DISABLE:DIS_DISC_ENABLE;
if(bp_cmd_request(dev, &bp_cmd_buf, &bp_rsp_buf)) {
if (bp_rsp_buf.rsp.rsp_id == BP_ERR_OK) {
ret=0;
}
}
usleep(BYPASS_CAP_DELAY*1000);
return ret;
}
int get_dis_disc_rd_fn(int dev, int port){
bp_cmd_t bp_cmd_buf;
bp_cmd_rsp_t bp_rsp_buf;
int ret = -1;
if(!is_bypass_port_rd_fn(dev, port))
return ret;
memset(&bp_cmd_buf, 0, sizeof(bp_cmd_buf));
memset(&bp_rsp_buf, 0, sizeof(bp_cmd_rsp_t));
bp_cmd_buf.cmd.cmd_dev_num = (port == 1)? 0:1;
bp_cmd_buf.cmd.cmd_id = CMD_GET_DIS_DISC;
if(bp_cmd_request(dev, &bp_cmd_buf, &bp_rsp_buf)) {
if (bp_rsp_buf.rsp.rsp_id == BP_ERR_OK) {
if (bp_rsp_buf.rsp.rsp_data.dis_disc == DIS_DISC_DISABLE)
ret=1;
else if (bp_rsp_buf.rsp.rsp_data.dis_disc == DIS_DISC_ENABLE)
ret=0;
}
}
return ret;
}
int get_wd_exp_mode_rd_fn(int dev, int port){
bp_cmd_t bp_cmd_buf;
bp_cmd_rsp_t bp_rsp_buf;
int ret = -1;
if(!is_bypass_port_rd_fn(dev, port))
return ret;
memset(&bp_cmd_buf, 0, sizeof(bp_cmd_buf));
memset(&bp_rsp_buf, 0, sizeof(bp_cmd_rsp_t));
bp_cmd_buf.cmd.cmd_dev_num = (port == 1)? 0:1;
bp_cmd_buf.cmd.cmd_id = CMD_GET_WD_EXP_MODE;
if(bp_cmd_request(dev, &bp_cmd_buf, &bp_rsp_buf)) {
if (bp_rsp_buf.rsp.rsp_id == BP_ERR_OK) {
ret=bp_rsp_buf.rsp.rsp_data.wd_exp_mode;
}
}
return ret;
}
int set_wd_exp_mode_rd_fn(int dev, int port, int param){
bp_cmd_t bp_cmd_buf;
bp_cmd_rsp_t bp_rsp_buf;
int ret = -1;
if(!is_bypass_port_rd_fn(dev, port))
return ret;
memset(&bp_cmd_buf, 0, sizeof(bp_cmd_buf));
memset(&bp_rsp_buf, 0, sizeof(bp_cmd_rsp_t));
bp_cmd_buf.cmd.cmd_dev_num = (port == 1)? 0:1;
bp_cmd_buf.cmd.cmd_id = CMD_SET_WD_EXP_MODE;
bp_cmd_buf.cmd.cmd_data.wd_exp_mode = param;
if(bp_cmd_request(dev, &bp_cmd_buf, &bp_rsp_buf)) {
if (bp_rsp_buf.rsp.rsp_id == BP_ERR_OK) {
ret=0;
}
}
usleep(BYPASS_CAP_DELAY*1000);
return ret;
}
int set_tx_rd_fn(int dev, int port, int tx_state){
bp_cmd_t bp_cmd_buf;
bp_cmd_rsp_t bp_rsp_buf;
int ret = -1;
memset(&bp_cmd_buf, 0, sizeof(bp_cmd_buf));
memset(&bp_rsp_buf, 0, sizeof(bp_cmd_rsp_t));
if ((!port) || (port > 4))
return -1;
if(is_bypass_port_rd_fn(dev, port)) {
bp_cmd_buf.cmd.cmd_dev_num = (port == 1)? 0:1;
bp_cmd_buf.cmd.cmd_data.tx_dis.port_num = 0;
}
else {
bp_cmd_buf.cmd.cmd_dev_num = (port == 2)? 0:1;
bp_cmd_buf.cmd.cmd_data.tx_dis.port_num = 1;
}
bp_cmd_buf.cmd.cmd_id = CMD_SET_TX;
bp_cmd_buf.cmd.cmd_data.tx_dis.mode = tx_state?TX_OFF:TX_ON;
if(bp_cmd_request(dev, &bp_cmd_buf, &bp_rsp_buf)) {
if (bp_rsp_buf.rsp.rsp_id == BP_ERR_OK) {
ret=0;
}
}
return ret;
}
int get_tx_rd_fn(int dev, int port){
bp_cmd_t bp_cmd_buf;
bp_cmd_rsp_t bp_rsp_buf;
int ret = -1;
memset(&bp_cmd_buf, 0, sizeof(bp_cmd_buf));
memset(&bp_rsp_buf, 0, sizeof(bp_cmd_rsp_t));
if ((!port) || (port > 4))
return -1;
if(is_bypass_port_rd_fn(dev, port)) {
bp_cmd_buf.cmd.cmd_dev_num = (port == 1)? 0:1;
bp_cmd_buf.cmd.cmd_data.tx_dis.port_num = 0;
}
else {
bp_cmd_buf.cmd.cmd_dev_num = (port == 2)? 0:1;
bp_cmd_buf.cmd.cmd_data.tx_dis.port_num = 1;
}
bp_cmd_buf.cmd.cmd_id = CMD_GET_TX;
if(bp_cmd_request(dev, &bp_cmd_buf, &bp_rsp_buf)) {
if (bp_rsp_buf.rsp.rsp_id == BP_ERR_OK) {
if (bp_rsp_buf.rsp.rsp_data.tx_dis.mode==TX_ON)
ret=0;
else if (bp_rsp_buf.rsp.rsp_data.tx_dis.mode==TX_OFF)
ret=1;
}
else return -1;
}
return ret;
}
int get_bypass_caps_rd_fn(int dev, int port){
bp_cmd_t bp_cmd_buf;
bp_cmd_rsp_t bp_rsp_buf;
int ret = -1;
memset(&bp_cmd_buf, 0, sizeof(bp_cmd_buf));
memset(&bp_rsp_buf, 0, sizeof(bp_cmd_rsp_t));
if ((!port) || (port > 4))
return -1;
if(is_bypass_port_rd_fn(dev, port)) {
bp_cmd_buf.cmd.cmd_dev_num = (port == 1)? 0:1;
}
else {
bp_cmd_buf.cmd.cmd_dev_num = (port == 2)? 0:1;
}
bp_cmd_buf.cmd.cmd_id = CMD_GET_BYPASS_CAPS;
if(bp_cmd_request(dev, &bp_cmd_buf, &bp_rsp_buf)) {
if (bp_rsp_buf.rsp.rsp_id == BP_ERR_OK) {
ret=(ntohl(bp_rsp_buf.rsp.rsp_data.bypass_caps));
if(!(is_bypass_port_rd_fn(dev, port))){
int ret1 = 0;
if(ret&TX_CTL_CAP)
ret1 = (TX_CTL_CAP|TX_STATUS_CAP);
return ret1;
}
}
}
return ret;
}
int get_bypass_caps_ex_rd_fn(int dev, int port){
bp_cmd_t bp_cmd_buf;
bp_cmd_rsp_t bp_rsp_buf;
int ret = -1;
if(!is_bypass_port_rd_fn(dev, port))
return ret;
memset(&bp_cmd_buf, 0, sizeof(bp_cmd_buf));
memset(&bp_rsp_buf, 0, sizeof(bp_cmd_rsp_t));
bp_cmd_buf.cmd.cmd_dev_num = (port == 1)? 0:1;;
bp_cmd_buf.cmd.cmd_id = CMD_GET_BYPASS_CAPS_EX;
if(bp_cmd_request(dev, &bp_cmd_buf, &bp_rsp_buf)) {
if (bp_rsp_buf.rsp.rsp_id == BP_ERR_OK) {
ret=ntohl(bp_rsp_buf.rsp.rsp_data.bypass_caps);
}
}
return ret;
}
int get_bypass_slave_rd_fn(int dev, int port, int *s_port) {
int ret = -1;
if ((!port) || (port > 4))
return -1;
ret = is_bypass_rd_fn(dev, port);
if(ret < 0)
return -1;
if(ret)
*s_port = (port == 1)? 2:4;
else
*s_port = port;
return ret;
}
int set_tpl_rd_fn(int dev, int port, int tpl_mode){
bp_cmd_t bp_cmd_buf;
bp_cmd_rsp_t bp_rsp_buf;
int ret = -1;
if(!is_bypass_port_rd_fn(dev, port))
return ret;
memset(&bp_cmd_buf, 0, sizeof(bp_cmd_buf));
memset(&bp_rsp_buf, 0, sizeof(bp_cmd_rsp_t));
bp_cmd_buf.cmd.cmd_dev_num = (port == 1)? 0:1;
bp_cmd_buf.cmd.cmd_id = CMD_SET_TPL;
bp_cmd_buf.cmd.cmd_data.tpl_mode = tpl_mode?TPL_ON:TPL_OFF;
if(bp_cmd_request(dev, &bp_cmd_buf, &bp_rsp_buf)) {
if (bp_rsp_buf.rsp.rsp_id == BP_ERR_OK) {
ret = 0;
}
}
return ret;
}
int get_tpl_rd_fn(int dev, int port){
bp_cmd_t bp_cmd_buf;
bp_cmd_rsp_t bp_rsp_buf;
int ret = -1;
if(!is_bypass_port_rd_fn(dev, port))
return ret;
memset(&bp_cmd_buf, 0, sizeof(bp_cmd_buf));
memset(&bp_rsp_buf, 0, sizeof(bp_cmd_rsp_t));
bp_cmd_buf.cmd.cmd_dev_num = (port == 1)? 0:1;
bp_cmd_buf.cmd.cmd_id = CMD_GET_TPL;
if(bp_cmd_request(dev, &bp_cmd_buf, &bp_rsp_buf)) {
if (bp_rsp_buf.rsp.rsp_data.tpl_mode == TPL_ON)
ret = 1;
else if (bp_rsp_buf.rsp.rsp_data.tpl_mode == TPL_OFF)
ret = 0;
}
return ret;
}
int set_bp_wait_at_pwup_rd_fn(int dev, int port, int bp_wait_at_pwup){
bp_cmd_t bp_cmd_buf;
bp_cmd_rsp_t bp_rsp_buf;
int ret = -1;
if(!is_bypass_port_rd_fn(dev, port))
return ret;
memset(&bp_cmd_buf, 0, sizeof(bp_cmd_buf));
memset(&bp_rsp_buf, 0, sizeof(bp_cmd_rsp_t));
bp_cmd_buf.cmd.cmd_dev_num = (port == 1)? 0:1;
bp_cmd_buf.cmd.cmd_id = CMD_SET_BP_WAIT_AT_PWUP;
bp_cmd_buf.cmd.cmd_data.bp_wait_at_pwup = bp_wait_at_pwup?1:0;
if(bp_cmd_request(dev, &bp_cmd_buf, &bp_rsp_buf)) {
if (bp_rsp_buf.rsp.rsp_id == BP_ERR_OK) {
ret=0;
}
}
usleep(EEPROM_WR_DELAY*1000);
return ret;
}
int get_bp_wait_at_pwup_rd_fn(int dev, int port){
bp_cmd_t bp_cmd_buf;
bp_cmd_rsp_t bp_rsp_buf;
int ret = -1;
if(!is_bypass_port_rd_fn(dev, port))
return ret;
memset(&bp_cmd_buf, 0, sizeof(bp_cmd_buf));
memset(&bp_rsp_buf, 0, sizeof(bp_cmd_rsp_t));
bp_cmd_buf.cmd.cmd_dev_num = (port == 1)? 0:1;
bp_cmd_buf.cmd.cmd_id = CMD_GET_BP_WAIT_AT_PWUP;
if(bp_cmd_request(dev, &bp_cmd_buf, &bp_rsp_buf)) {
if (bp_rsp_buf.rsp.rsp_data.bp_wait_at_pwup == 1)
ret = 1;
else if (bp_rsp_buf.rsp.rsp_data.bp_wait_at_pwup == 0)
ret = 0;
}
return ret;
}
int set_bp_hw_reset_rd_fn(int dev, int port, int bp_hw_reset){
bp_cmd_t bp_cmd_buf;
bp_cmd_rsp_t bp_rsp_buf;
int ret = -1;
if(!is_bypass_port_rd_fn(dev, port))
return ret;
memset(&bp_cmd_buf, 0, sizeof(bp_cmd_buf));
memset(&bp_rsp_buf, 0, sizeof(bp_cmd_rsp_t));
bp_cmd_buf.cmd.cmd_dev_num = (port == 1)? 0:1;
bp_cmd_buf.cmd.cmd_id = CMD_SET_BP_HW_RESET;
bp_cmd_buf.cmd.cmd_data.bp_hw_reset = bp_hw_reset?1:0;
if(bp_cmd_request(dev, &bp_cmd_buf, &bp_rsp_buf)) {
if (bp_rsp_buf.rsp.rsp_id == BP_ERR_OK) {
ret=0;
}
}
usleep(EEPROM_WR_DELAY*1000);
return ret;
}
int get_bp_hw_reset_rd_fn(int dev, int port){
bp_cmd_t bp_cmd_buf;
bp_cmd_rsp_t bp_rsp_buf;
int ret = -1;
if(!is_bypass_port_rd_fn(dev, port))
return ret;
memset(&bp_cmd_buf, 0, sizeof(bp_cmd_buf));
memset(&bp_rsp_buf, 0, sizeof(bp_cmd_rsp_t));
bp_cmd_buf.cmd.cmd_dev_num = (port == 1)? 0:1;
bp_cmd_buf.cmd.cmd_id = CMD_GET_BP_HW_RESET;
if(bp_cmd_request(dev, &bp_cmd_buf, &bp_rsp_buf)) {
if (bp_rsp_buf.rsp.rsp_data.bp_hw_reset == 1)
ret = 1;
else if (bp_rsp_buf.rsp.rsp_data.bp_hw_reset == 0)
ret = 0;
}
return ret;
}
typedef struct _bpmod_info_t {
unsigned int vendor;
unsigned int device;
unsigned int subvendor;
unsigned int subdevice;
unsigned int index;
char *bp_name;
} bpmod_info_t;
#define SILICOM_SVID 0x1374
static bpmod_info_t tx_ctl_pci_tbl[] = {
{0x8086, 0x15A4, SILICOM_SVID, 0x01B0, 0, "PE310G4DBiR-T"},
{0x8086, 0x15A4, 0x1B2E, 0x01B0, 0, "PE310G4DBiR-T-RB2"},
{0x8086, 0x15A4, 0x8086, 0x000, 0, "PE310G4DBiR"},
{0x8086, 0x15A4, SILICOM_SVID, 0x01B1, 0, "PE310G4DBiR-SRD"},
{0x8086, 0x15A4, 0x1B2E, 0x01B1, 0, "PE310G4DBiR-SRD-RB2"},
{0x8086, 0x15A4, SILICOM_SVID, 0x01B2, 0, "PE310G4DBiR-LRD"},
{0x8086, 0x15A4, 0x1B2E, 0x01B2, 0, "PE310G4DBiR-LRD-RB2"},
{0x8086, 0x15A4, SILICOM_SVID, 0x01B3, 0, "PE310G4DBiR-ERD"},
{0x8086, 0x15A4, 0x1B2E, 0x01B3, 0, "PE310G4DBiR-ERD-RB2"},
{0x8086, 0x15A4, SILICOM_SVID, 0x01B4, 0, "PE310G4DBiR-DA"},
{0x8086, 0x15A4, 0x1B2E, 0x01B4, 0, "PE310G4DBiR-DA-RB2"},
{0x8086, 0x15A4, SILICOM_SVID, 0x01B8, 0, "PE340G2DBIR-QS41"},
{0x8086, 0x15A4, 0x1B2E, 0x01B8, 0, "PE340G2DBIR-QS41-RB2"},
{0x8086, 0x15A4, SILICOM_SVID, 0x01B9, 0, "PE340G2DBIR-QS43"},
{0x8086, 0x15A4, 0x1B2E, 0x01B9, 0, "PE340G2DBIR-QS43-RB2"},
{0x8086, 0x15A4, SILICOM_SVID, 0x01BA, 0, "PE340G2DBIR-QL4"},
{0x8086, 0x15A4, 0x1B2E, 0x01BA, 0, "PE340G2DBIR-QL4-RB2"},
{0x8086, 0x15A4, SILICOM_SVID, 0x01C0, 0, "PE3100G2DQIR-QX4/QS4/QL4"},
{0x8086, 0x15A4, SILICOM_SVID, 0x01C1, 0, "PE3100G2DQIRL-QX4/QS4/QL4"},
{0x8086, 0x15A4, SILICOM_SVID, 0x01C2, 0, "PE3100G2DQIRM-QX4/QS4/QL4"},
{0x8086, 0x15A4, SILICOM_SVID, 0x01C8, 0, "PE325G2DSIR"},
/* required last entry */
{0,}
};
int get_bypass_info_rd_fn(int dev, int port, char *dev_name, unsigned char *add_param){
bp_cmd_t bp_cmd_buf;
bp_cmd_rsp_t bp_rsp_buf;
int ret = -1, idx = 0;
unsigned int val, vendor, device, subvendor;
unsigned int subdevice;
if(!is_bypass_port_rd_fn(dev, port))
return ret;
if ((ret = rdi_get_reg(dev, 0x120000, (unsigned int *)&val, RDI_FLCM_DEV))<0) {
printf("Fail\n");
fflush(stdout);
return -1;
}
vendor = val & 0xffff;
device = (val >> 16) & 0xffff;
if ((ret = rdi_get_reg(dev, 0x12000b, (unsigned int *)&val, RDI_FLCM_DEV))<0) {
printf("Fail\n");
fflush(stdout);
return -1;
}
subvendor = val & 0xffff;
subdevice = (val >> 16) & 0xffff;
for (idx = 0; tx_ctl_pci_tbl[idx].vendor; idx++) {
if((tx_ctl_pci_tbl[idx].vendor == vendor) &&
(tx_ctl_pci_tbl[idx].device == device) &&
(tx_ctl_pci_tbl[idx].subvendor == subvendor) &&
(tx_ctl_pci_tbl[idx].subdevice == subdevice))
break;
}
if(!tx_ctl_pci_tbl[idx].vendor)
return -1;
memset(&bp_cmd_buf, 0, sizeof(bp_cmd_buf));
memset(&bp_rsp_buf, 0, sizeof(bp_cmd_rsp_t));
bp_cmd_buf.cmd.cmd_dev_num = (port == 1)? 0:1;
bp_cmd_buf.cmd.cmd_id = CMD_GET_BYPASS_INFO;
if(bp_cmd_request(dev, &bp_cmd_buf, &bp_rsp_buf)) {
strcpy(dev_name, tx_ctl_pci_tbl[idx].bp_name);
/**add_param = bp_rsp_buf.rsp.rsp_data.bypass_info.fw_ver;*/
memcpy(add_param,(char *)&(bp_rsp_buf.rsp.rsp_data.bypass_info.fw_ver), 1);
ret=0;
}
return ret;
}
int set_bp_manuf_rd_fn(int dev, int port){
bp_cmd_t bp_cmd_buf;
bp_cmd_rsp_t bp_rsp_buf;
int ret = -1;
if(!is_bypass_port_rd_fn(dev, port))
return ret;
memset(&bp_cmd_buf, 0, sizeof(bp_cmd_buf));
memset(&bp_rsp_buf, 0, sizeof(bp_cmd_rsp_t));
bp_cmd_buf.cmd.cmd_dev_num = (port == 1)? 0:1;
bp_cmd_buf.cmd.cmd_id = CMD_SET_BP_MANUF;
if(bp_cmd_request(dev, &bp_cmd_buf, &bp_rsp_buf)) {
if (bp_rsp_buf.rsp.rsp_id == BP_ERR_OK) {
ret=0;
}
}
usleep(BYPASS_CAP_DELAY*1000);
return ret;
}

756
lib/librdi.h Executable file
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@ -0,0 +1,756 @@
#ifndef _LIBRDUSR_H_
#define _LIBRDUSR_H_
#pragma pack(push) /* push current alignment to stack */
#pragma pack(1) /* set alignment to 1 byte boundary */
enum rdi_conf {
RDI_INIT=1,
RDI_CLEAR,
RDI_CLEAR_GROUP,
RDI_SET_CFG,
RDI_SET_DROP,
RDI_SET_DIR,
RDI_SET_MIR,
RDI_GET_CFG,
RDI_INSTALL,
RDI_INSTALL_GROUP,
RDI_GET_CNT,
RDI_ENTRY_REMOVE,
RDI_ENTRY_QUERY,
RDI_ENTRY_QUERY_LIST,
RDI_GET_DEV_NUM,
RDI_SET_PORT_MASK,
RDI_GET_PORT_MASK,
RDI_SET_PERMIT,
RDI_SET_MOD0=49,
RDI_SET_MOD1=50,
RDI_SET_MOD2,
RDI_SET_L2_HASH,
RDI_SET_L3_HASH,
RDI_ADD_RULE,
RDI_LBG_QUERY_LIST,
RDI_LBG_PORT_QUERY_LIST,
RDI_LBG_REMOVE,
RDI_LBG_ADD,
RDI_LBG_PORT_REMOVE,
RDI_LBG_PORT_ADD,
RDI_GET_L2_HASH,
RDI_GET_L3_HASH,
RDI_GET_PORT_LINK,
RDI_GET_TEMP,
RDI_READ_PHY=100,
RDI_WRITE_PHY,
RDI_CPLD_READ,
RDI_CPLD_WRITE,
RDI_BP_READ,
RDI_BP_WRITE,
RDI_GET_GPIO_DIR,
RDI_SET_GPIO_DIR,
RDI_GET_GPIO,
RDI_SET_GPIO,
RDI_GET_REG,
RDI_SET_REG,
RDI_GET_VLAN_STAT=200,
RDI_GET_STAT,
RDI_GET_POWER,
} ;
enum rdi_action {
RDI_ACT_PERMIT=0,
RDI_ACT_DROP=1,
RDI_ACT_TRAP, //2
RDI_ACI_MIRROR, //3
RDI_ACT_LOG, //4
RDI_ACT_COUNT, //5
RDI_ACT_NOTIFY, //6
RDI_ACT_POLICE, //7
RDI_ACT_SET_VLAN, //8
RDI_ACT_SET_VLAN_PRI, //9
RDI_ACT_SET_SWITCH_PRI, //10
RDI_ACT_SET_DSCP, //11
RDI_ACT_SET_USER, //12
RDI_ACT_LOAD_BALANCE, //13
RDI_ACT_TRAP_ALWAYS, //14
RDI_ACT_REDIRECT, //15
RDI_ACT_NOROUTE, //16
RDI_ACT_ROUTE, //17
} ;
typedef struct rdi_udf_s {
short flag;
unsigned int offset;
unsigned int data;
unsigned int mask;
} rdi_udf_t;
typedef struct rdi_mac_s {
short flag;
unsigned char mac[6];
} rdi_mac_t;
typedef struct rdi_ip6_s {
short flag;
unsigned char ip[16];
} rdi_ip6_t;
typedef struct rdi_mem {
int group;
int rule_id;
int rule_act;
int port;
int redir_port;
int src_port;
int dst_port;
unsigned int src_ip;
unsigned int dst_ip;
unsigned int src_ip_mask;
unsigned int dst_ip_mask;
int src_port_mask;
int dst_port_mask;
int src_port_max;
int dst_port_max;
int ip_protocol;
int vlan;
int vlan_mask;
int vlan_max;
int mirror_port;
int mpls_type;
int mpls_label;
short mpls_exp_bits;
short mpls_s_bit;
int mpls_label_mask;
short mpls_exp_bits_mask;
short mpls_s_bit_mask;
int ether_type;
rdi_udf_t rdi_udf;
rdi_mac_t src_mac;
rdi_mac_t dst_mac;
rdi_ip6_t src_ip6;
rdi_ip6_t dst_ip6;
rdi_ip6_t src_ip6_mask;
rdi_ip6_t dst_ip6_mask;
int vlan_act;
int vlan_pri_act;
int vlan_tag;
int usr_act;
} rdi_mem_t;
typedef struct rdi_query_rule {
rdi_mem_t rdi_mem;
int ret;
} rdi_query_rule_t;
typedef struct rdi_id_list {
unsigned int rule_num;
unsigned char id_list[8192];
} rdi_id_list_t;
typedef struct rdi_query_list {
rdi_id_list_t rdi_id_list;
int ret;
}rdi_query_list_t;
typedef struct rdi_vlan_stat_cnt {
unsigned long long vland;
unsigned long long tvlan;
unsigned long long tvland;
}rdi_vlan_stat_cnt_t;
typedef struct rdib_stat_cnt {
unsigned long long total;
unsigned long long txnoerror;
unsigned long long rxnoerror;
unsigned long long rxdrop;
unsigned long long txdrop;
}rdib_stat_cnt_t;
typedef struct rdif_stat_cnt {
unsigned long long cntRxUcstPkts;
unsigned long long cntRxUcstPktsNonIP;
unsigned long long cntRxUcstPktsIPv4;
unsigned long long cntRxUcstPktsIPv6;
unsigned long long cntRxBcstPkts;
unsigned long long cntRxBcstPktsNonIP;
unsigned long long cntRxBcstPktsIPv4;
unsigned long long cntRxBcstPktsIPv6;
unsigned long long cntRxMcstPkts;
unsigned long long cntRxMcstPktsNonIP;
unsigned long long cntRxMcstPktsIPv4;
unsigned long long cntRxMcstPktsIPv6;
unsigned long long cntRxPausePkts;
unsigned long long cntRxCBPausePkts;
unsigned long long cntRxFCSErrors;
unsigned long long cntRxSymbolErrors;
unsigned long long cntRxFrameSizeErrors;
unsigned long long cntRxMinTo63Pkts;
unsigned long long cntRx64Pkts;
unsigned long long cntRx65to127Pkts;
unsigned long long cntRx128to255Pkts;
unsigned long long cntRx256to511Pkts;
unsigned long long cntRx512to1023Pkts;
unsigned long long cntRx1024to1522Pkts;
unsigned long long cntRx1523to2047Pkts;
unsigned long long cntRx2048to4095Pkts;
unsigned long long cntRx4096to8191Pkts;
unsigned long long cntRx8192to10239Pkts;
unsigned long long cntRx10240toMaxPkts;
unsigned long long cntRxFragmentPkts;
unsigned long long cntRxUndersizedPkts;
unsigned long long cntRxJabberPkts;
unsigned long long cntRxOversizedPkts;
unsigned long long cntRxGoodOctets;
unsigned long long cntRxOctetsNonIp;
unsigned long long cntRxOctetsIPv4;
unsigned long long cntRxOctetsIPv6;
unsigned long long cntRxBadOctets;
unsigned long long cntRxPriorityPkts;
unsigned long long cntRxPriorityOctets;
unsigned long long cntTxUcstPkts;
unsigned long long cntTxBcstPkts;
unsigned long long cntTxMcstPkts;
unsigned long long cntTxPausePkts;
unsigned long long cntTxFCSErroredPkts;
unsigned long long cntTxErrorDropPkts;
unsigned long long cntTxTimeOutPkts;
unsigned long long cntTxLoopbackPkts;
unsigned long long cntTxMinTo63Pkts;
unsigned long long cntTx64Pkts;
unsigned long long cntTx65to127Pkts;
unsigned long long cntTx128to255Pkts;
unsigned long long cntTx256to511Pkts;
unsigned long long cntTx512to1023Pkts;
unsigned long long cntTx1024to1522Pkts;
unsigned long long cntTx1523to2047Pkts;
unsigned long long cntTx2048to4095Pkts;
unsigned long long cntTx4096to8191Pkts;
unsigned long long cntTx8192to10239Pkts;
unsigned long long cntTx10240toMaxPkts;
unsigned long long cntTxOctets;
unsigned long long cntTxErrorOctets;
unsigned long long cntTxCMDropPkts;
unsigned long long cntFIDForwardedPkts;
unsigned long long cntFloodForwardedPkts;
unsigned long long cntSpeciallyHandledPkts;
unsigned long long cntParseErrDropPkts;
unsigned long long cntParityErrorPkts;
unsigned long long cntTrappedPkts;
unsigned long long cntPauseDropPkts;
unsigned long long cntSTPDropPkts;
unsigned long long cntReservedTrapPkts;
unsigned long long cntSecurityViolationPkts;
unsigned long long cntVLANTagDropPkts;
unsigned long long cntVLANIngressBVPkts;
unsigned long long cntVLANEgressBVPkts;
unsigned long long cntGlortMissDropPkts;
unsigned long long cntFFUDropPkts;
unsigned long long cntPolicerDropPkts;
unsigned long long cntTTLDropPkts;
unsigned long long cntCmPrivDropPkts;
unsigned long long cntSmp0DropPkts;
unsigned long long cntSmp1DropPkts;
unsigned long long cntRxHog0DropPkts;
unsigned long long cntRxHog1DropPkts;
unsigned long long cntTxHog0DropPkts;
unsigned long long cntTxHog1DropPkts;
unsigned long long cntRateLimit0DropPkts;
unsigned long long cntRateLimit1DropPkts;
unsigned long long cntBadSmpDropPkts;
unsigned long long cntTriggerDropRedirPkts;
unsigned long long cntTriggerDropPkts;
unsigned long long cntTriggerRedirPkts;
unsigned long long cntTriggerMirroredPkts;
unsigned long long cntBroadcastDropPkts;
unsigned long long cntDLFDropPkts;
unsigned long long cntRxCMDropPkts;
unsigned long long cntUnderrunPkts;
unsigned long long cntOverrunPkts;
unsigned long long cntCorruptedPkts;
unsigned long long cntStatsDropCountTx;
unsigned long long cntStatsDropCountRx;
} rdif_stat_cnt_t;
typedef struct _rdi_hashRotationValue {
/** The shift amount in the operation is one plus this value. */
unsigned char exponent;
/** The amount the input hash value is multiplied by before shifting. */
unsigned short mantissa;
} rdi_hashRotationValue;
#define RDI_L2_HASH_SMAC 1<<0
#define RDI_L2_HASH_DMAC 1<<1
#define RDI_L2_HASH_ETHER_TYPE 1<<2
#define RDI_L2_HASH_VLAN_ID 1<<3
#define RDI_L2_HASH_VLAN_PRI 1<<4
#define RDI_L2_HASH_SYM_MAC 1<<5
#define RDI_L2_HASH_VLAN2_ID 1<<6
#define RDI_L2_HASH_VLAN2_PRI 1<<7
#define RDI_L2_HASH_PROFILE_IDX 1<<24
typedef struct rdi_l2_hash {
unsigned int l2_hash_set;
/** Indicates the inclusion bit mask for the SMAC field.
* The valid range is 0 (disable) to 0xffffffffffff (all bits
* included). The default is 0xffffffffffff.
*
* Acts as a boolean
* and any value different then 0 will enable this specific key.
* */
unsigned int profile_index;
unsigned char src_mac_mask[6];
/** Indicates the inclusion bit mask for the DMAC field.
* The valid range is 0 (disable) to 0xffffffffffff (all bits
* included). The default is 0xffffffffffff.
*
* Acts as a boolean
* and any value different then 0 will enable this specific key.
*/
unsigned char dst_mac_mask[6];
/** Indicates the inclusion bit mask for the EtherType field.
* The valid range is 0 (disable) to 0xffff (all bits
* included). The default is 0xffff.
*
* Acts as a boolean
* and any value different then 0 will enable this specific key.
* */
unsigned int ether_type_mask;
/** Indicates the inclusion bit mask for the VLAN ID 1 field.
* The valid range is 0 (disable) to 0xfff (all bits
* included). The default is 0xfff.
*
* Acts as a boolean
* and any value different then 0 will enable this specific key.
*/
unsigned int vlan_id_mask;
/** Indicates the inclusion bit mask for the VLAN Priority 1 field.
* The valid range is 0 (disable) to 0xf. The default is 0xf (all
* bits included).
*
* Acts as a boolean
* and any value different then 0 will enable this specific key.
*/
unsigned int vlan_pri;
/** Indicates the inclusion bit mask for the VLAN ID 1 field.
* The valid range is 0 (disable) to 0xfff (all bits
* included). The default is 0xfff.
*
* Acts as a boolean
* and any value different then 0 will enable this specific key.
*/
unsigned int vlan2_id_mask;
/** Indicates the inclusion bit mask for the VLAN Priority 1 field.
* The valid range is 0 (disable) to 0xf. The default is 0xf (all
* bits included).
*
* Acts as a boolean
* and any value different then 0 will enable this specific key.
*/
unsigned int vlan2_pri;
/** Enable symmetrizing of the source and destination MAC fields.
* The default is FALSE.
*
* */
unsigned int sym_mac;
} rdi_l2_hash_t;
#define RDI_L3_HASH_SIP 1<<0
#define RDI_L3_HASH_DIP 1<<1
#define RDI_L3_HASH_SPORT 1<<2
#define RDI_L3_HASH_DPORT 1<<3
#define RDI_L3_HASH_DSCP 1<<4
#define RDI_L3_HASH_ISL_USR 1<<5
#define RDI_L3_HASH_PROTO 1<<6
#define RDI_L3_HASH_FLOW 1<<7
#define RDI_L3_HASH_SYM_L3_FIELDS 1<<8
#define RDI_L3_HASH_SYM_L4_FIELDS 1<<9
#define RDI_L3_HASH_CUSTOM 1<<10
#define RDI_L3_HASH_RND_NEXT_HOP 1<<11
#define RDI_L3_HASH_RND_OTHER 1<<12
#define RDI_L3_HASH_RND_ONLY 1<<13
typedef struct rdi_l3_hash {
unsigned int l3_hash_set;
unsigned int profile_index;
/** Indicates the inclusion byte mask for the SIP field. Each bit of this
* mask indicates a full byte of the SIP with bit 0 corresponding to
* byte 0, bit 1 to byte 1, etc. The valid range is 0 (disable) to
* 0xffff (all bytes included). The default is 0xffff.
* \lb\lb
* Acts as a boolean
* and any value different then 0 will enable this specific key.
*
* */
unsigned int src_ip_mask;
/** Indicates the inclusion byte mask for the DIP field. Each bit of this
* mask indicates a full byte of the SIP with bit 0 corresponding to
* byte 0, bit 1 to byte 1, etc. The valid range is 0 (disable) to
* 0xffff (all bytes included). The default is 0xffff.
* \lb\lb
* Acts as a boolean
* and any value different then 0 will enable this specific key.
*
* */
unsigned int dst_ip_mask;
/** Indicates the inclusion bit mask for the layer 4 source port.
* The valid range is 0 (disable) to 0xffff (all bits included).
* The default is 0xffff.
* \lb\lb
* Acts as a boolean
* and any value different then 0 will enable this specific key.
*
* */
unsigned int src_port_mask;
/** Indicates the inclusion bit mask for the layer 4 destination port.
* The valid range is 0 (disable) to 0xffff (all bits included).
* The default is 0xffff.
* \lb\lb
* Acts as a boolean
* and any value different then 0 will enable this specific key.
*
* */
unsigned int dst_port_mask;
/** Indicates the inclusion bit mask for the DSCP field value.
* The valid range is 0 (disable) to 0xff (all bits included).
* The default is 0xff.
*
* */
unsigned int dscp_mask;
/** Indicates the inclusion bit mask for the ISL_USER field value.
* The valid range is 0 (disable) to 0xff (all bits included).
* The default is 0.
*
* */
unsigned int isl_usr_mask;
/** Indicates the inclusion bit mask for the layer 3 protocol field
* value. The valid range is 0 (disable) to 0xff (all bits included).
* The default is 0xff.
* \lb\lb
* Acts as a boolean
* and any value different then 0 will enable this specific key.
*
* */
unsigned int proto_mask;
/** Indicates the inclusion byte mask for the custom parser field value.
* This value is dependent on the parser microcode and FFU rules. Each
* bit of this mask indicates a full byte of the custome parser field
* with bit 0 corresponding to byte 0, bit 1 to byte 1, etc. The valid
* range is 0 (disable) to 0xff (all bytes included). The default is 0.
*
* \chips FM6000 */
unsigned int custom_mask;
/** Indicates the inclusion bit mask for the IPv6 flow field value.
* The valid range is 0 (disabled) to 0xfffff (all bits included).
* The default is 0xfffff.
*
* */
unsigned int flow_mask;
/** Enable symmetrizing of the SIP & DIP fields. This ensures that frames
* with opposite SIP & DIP fields will hash the same with respect to
* those fields. The default is FALSE.
*
* */
unsigned char sym_l3_fields;
/** Enable symmetrizing of the layer 4 source and destination port fields.
* This ensures that frames with opposite source & destination port fields
* will hash the same with respect to those fields. The default is FALSE.
*
* */
unsigned char sym_l4_fields;
/** Enable use of the hardware PTable to facilitate improved hash results.
* Note that this will require configuring the PTable (register
* HASH_LAYER3_PTABLE). The default
* is FALSE.
*
* \chips FM6000 */
unsigned char use_ptable;
/** Enable producing a random value to the next-hop evaluation stage.
* Default is FALSE.
*
* \chips FM6000 */
unsigned char random_next_hop;
/** Enable producing a random value to other stages downstream of the
* hash calculation. Default is FALSE.
*
* \chips FM6000 */
unsigned char random_other;
/** If set to true, disable all hash computation except for the random
* outputs, if they are enabled. Default is FALSE.
*
* \chips FM6000 */
unsigned char random_only;
} rdi_l3_hash_t;
typedef union rdi_stat_cnt {
rdib_stat_cnt_t rdib;
rdif_stat_cnt_t rdif;
}rdi_stat_cnt_t;
typedef struct rdi_rule_stat_cnt {
unsigned long long counter;
}rdi_rule_stat_cnt_t;
typedef struct rdi_rule_stat {
rdi_rule_stat_cnt_t rdi_rule_stat_cnt;
int ret_val;
}rdi_rule_stat_t;
typedef struct rdi_stat {
rdi_stat_cnt_t rdi_stat_cnt;
int ret_val;
}rdi_stat_t;
typedef struct rdi_vlan_stat {
rdi_vlan_stat_cnt_t rdi_vlan_stat_cnt;
int ret_val;
}rdi_vlan_stat_t;
typedef struct rdi_sfi_diag {
unsigned short tx_power;
unsigned short rx_power;
unsigned int rsv[3];
} rdi_sfi_diag_t;
typedef enum rdi_type_s {
RDI_BCM_DEV=1,
RDI_FLCM_DEV
}rdi_type_t;
typedef struct if_rdi {
int rdi_cmd;
int unit;
int cfg;
rdi_mem_t rdi_mem;
int if_index; /* network device index of management interface */
int rule_id;
int group;
int port;
unsigned int mask;
rdi_query_list_t rdi_query_list;
rdi_rule_stat_t rdi_rule_stat;
rdi_vlan_stat_t rdi_vlan_stat;
rdi_stat_t rdi_stat;
rdi_l2_hash_t l2_hash;
rdi_l3_hash_t l3_hash;
int action;
/* diagnostic fieds */
int phy_addr;
int addr;
int dev;
int val;
} if_rdi_t;
typedef struct rdi_lbg_list {
int num;
int list[16];
} rdi_lbg_list_t;
typedef struct rdi_lbg_query_list {
rdi_lbg_list_t rdi_lbg_list;
int ret;
}rdi_lbg_query_list_t;
typedef struct if_rdi_lbg {
int rdi_cmd;
int unit;
rdi_lbg_query_list_t rdi_query_list;
int lbg;
int port;
} if_rdi_lbg_t;
typedef struct rdi_bp_data_list {
unsigned int num;
unsigned char list[8192];
} rdi_bp_data_t;
typedef struct rdi_bp_query_data {
rdi_bp_data_t data;
int ret;
}rdi_bp_query_data_t;
typedef struct if_rdi_bp {
int rdi_cmd;
int unit;
rdi_bp_query_data_t bp_query_data;
int dev;
int addr;
} if_rdi_bp_t;
typedef struct rdi_mask {
unsigned char ingress[16];
unsigned char egress[16];
int ret_val;
} rdi_mask_t;
typedef struct if_rdi_mask {
unsigned int rdi_cmd;
unsigned int unit;
rdi_mask_t mask;
} if_rdi_mask_t;
int rdi_get_dev_num(rdi_type_t rdi_type);
int rdi_init(int unit, int if_index, rdi_type_t rdi_type);
int rdi_set_mod0(int unit, rdi_type_t rdi_type);
int rdi_set_mod1(int unit, rdi_type_t rdi_type);
int rdi_set_mod2(int unit, rdi_type_t rdi_type);
int rdi_set_cfg(int unit, int cfg, rdi_type_t rdi_type);
int rdi_entry_remove(int unit, int rule_id, int group, rdi_type_t rdi_type);
int rdi_get_cfg(int unit, rdi_type_t rdi_type);
int rdi_get_temp(int unit, rdi_type_t rdi_type);
int rdi_add_rule_drop(int unit, rdi_mem_t *rdi_mem, rdi_type_t rdi_type);
int rdi_add_rule_permit(int unit, rdi_mem_t *rdi_mem, rdi_type_t rdi_type);
int rdi_add_rule(int unit, rdi_mem_t *rdi_mem, int action, rdi_type_t rdi_type);
int rdi_add_rule_dir(int unit, rdi_mem_t *rdi_mem, rdi_type_t rdi_type);
int rdi_add_rule_mir(int unit, rdi_mem_t *rdi_mem, rdi_type_t rdi_type);
int rdi_install_rules(int unit, rdi_type_t rdi_type);
int rdi_clear_rules(int unit, rdi_type_t rdi_type);
int rdi_install_rules_group(int unit, int group, rdi_type_t rdi_type);
int rdi_clear_rules_group(int unit, int group, rdi_type_t rdi_type);
int rdi_entry_query(int unit, rdi_mem_t *rdi_mem, rdi_type_t rdi_type);
int rdi_get_rule_counters(int unit, int rule_id, int group, void *val, rdi_type_t rdi_type);
int rdi_entry_query_list(int unit, int group, rdi_query_list_t *rdi_query_list, rdi_type_t rdi_type);
int rdi_get_vlan_stat(int unit, int port, rdi_vlan_stat_cnt_t *rdi_vlan_stat_cnt, rdi_type_t rdi_type);
int rdi_get_stat(int unit, int port, rdi_stat_cnt_t *val, rdi_type_t rdi_type);
int rdi_get_rule_stat(int unit, int rule_id, int group, rdi_rule_stat_cnt_t *rdi_rule_stat_cnt, rdi_type_t rdi_type);
int rdi_read_phy(int unit, int phy_addr, int dev, int addr, rdi_type_t rdi_type);
int rdi_write_phy(int unit, int phy_addr, int dev, int addr, int val, rdi_type_t rdi_type);
int rdi_get_gpio_dir(int unit, int gpio, rdi_type_t rdi_type);
int rdi_set_gpio_dir(int unit, int gpio, int dir, int val, rdi_type_t rdi_type);
int rdi_get_gpio(int unit, int gpio, rdi_type_t rdi_type);
int rdi_set_gpio(int unit, int gpio, int val, rdi_type_t rdi_type);
int rdi_get_reg(int unit, unsigned int addr, unsigned int *val, rdi_type_t rdi_type);
int rdi_set_reg(int unit, unsigned int addr, unsigned int val, rdi_type_t rdi_type);
int rdi_get_power(int unit, int port, rdi_sfi_diag_t *sfi_diag, rdi_type_t rdi_type);
int rdi_set_port_mask(int unit, int port, unsigned int mask, rdi_type_t rdi_type);
int rdi_get_port_mask(int unit, int port, unsigned char *mask, rdi_type_t rdi_type);
int rdi_set_mask(int unit, rdi_mask_t *mask, rdi_type_t rdi_type);
int rdi_get_mask(int unit, rdi_mask_t *mask, rdi_type_t rdi_type);
int rdi_cpld_write(int unit, int addr, unsigned int val, rdi_type_t rdi_type);
int rdi_cpld_read(int unit, int addr, unsigned char *val, rdi_type_t rdi_type);
int rdi_set_l2_hash(int unit, rdi_l2_hash_t *l2_hash, rdi_type_t rdi_type);
int rdi_set_l3_hash(int unit, rdi_l3_hash_t *l3_hash, rdi_type_t rdi_type);
int rdi_get_l2_hash(int unit, rdi_l2_hash_t *l2_hash, rdi_type_t rdi_type);
int rdi_get_l3_hash(int unit, rdi_l3_hash_t *l3_hash, rdi_type_t rdi_type);
int rdi_lbg_query_entry_list(int unit, struct rdi_lbg_query_list *rdi_lbg_query_list, rdi_type_t rdi_type);
int rdi_lbg_port_query_entry_list(int unit, int lbg, rdi_lbg_query_list_t *rdi_lbg_query_list, rdi_type_t rdi_type);
int rdi_lbg_remove(int unit, int lbg, rdi_type_t rdi_type);
int rdi_lbg_add(int unit, int *lbg, rdi_type_t rdi_type);
int rdi_lbg_port_remove(int unit, int lbg, int port, rdi_type_t rdi_type);
int rdi_lbg_port_add(int unit, int lbg, int port, rdi_type_t rdi_type);
int rdi_get_port_link(int unit, int port, rdi_type_t rdi_type);
int rdi_bp_read(int unit,int dev, rdi_bp_query_data_t *rdi_bp_query_data, rdi_type_t rdi_type);
int rdi_bp_write(int unit,int dev, rdi_bp_query_data_t *rdi_bp_query_data, rdi_type_t rdi_type);
#endif /* _RDD_LIB_H_ */

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TARGET= libbprd
PRDPATH= /usr/local/lib
MAJOR_VERSION= 1
MINOR_VERSION= 0
RELEASE_VERSION=7
SO_NAME= $(TARGET).so.$(MAJOR_VERSION)
TARGET_SL_NAME= $(TARGET).so.$(MAJOR_VERSION).$(MINOR_VERSION).$(RELEASE_VERSION)
LCFLAGS= -fPIC
CFLAGS= -Wall -g -I../include/
LDFLAGS= -shared -Wl,-rpath,/usr/local/lib -lpthread -lrdif
PREFIX=
all: $(TARGET_SL_NAME)
libbypass.o: libbypass.c
$(CC) $(CFLAGS) $(LCFLAGS) -DBP_VENDOR_SUPPORT -c libbypass.c
$(TARGET_SL_NAME): libbypass.o
$(CC) $(LDFLAGS) -Wl,-soname,$(SO_NAME) libbypass.o -o $(TARGET_SL_NAME)
install: $(TARGET_SL_NAME)
mkdir -p $(PREFIX)$(PRDPATH)
install $(TARGET_SL_NAME) $(PREFIX)$(PRDPATH)
ln -sf $(TARGET_SL_NAME) $(PREFIX)$(PRDPATH)/$(SO_NAME)
ln -sf $(SO_NAME) $(PREFIX)$(PRDPATH)/$(TARGET).so
mkdir -p $(PREFIX)/usr/include
install -m 444 ../include/libbprd.h $(PREFIX)/usr/include
clean:
rm -f libbypass.o $(TARGET_SL_NAME)
#libbypass.a: libbypass.o
# ar rcs libbypass.a libbypass.o

68
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%define name libbprd
%define version 1.0.7
%define major_version 1
%define minor_version 0
%define release_version 7
%define target_lib libbprd
Summary: Silicom Bypass Library
Name: %{name}
Version: %{version}
Release: %(uname -r | sed s/-/\./g).2
Vendor: Silicom, Ltd
License: GPL
Group: System Environment/Base
Source: libbprd-%{version}.tar.gz
BuildRoot: /var/tmp/%{name}-buildroot
#BuildRoot: %{_tmppath}/%{name}-%{version}-%{release}-root
#BuildRequires: librdi
%description
This package contains Silicom Bypass Library.
%prep
%setup -c -b 0
%build
cd ./libbprd-%{version}/lib
make
%install
cd ./libbprd-%{version}/lib
if [ -d /usr/include ]
then
mkdir -p $RPM_BUILD_ROOT/usr/include
echo "/usr/include/libbprd.h" >> $RPM_BUILD_DIR/file.list.%{name}
fi
if [ -d /usr/local/lib ]
then
mkdir -p $RPM_BUILD_ROOT/usr/local/lib
echo "/usr/local/lib/%{target_lib}.so.%{major_version}.%{minor_version}.%{release_version}" >> $RPM_BUILD_DIR/file.list.%{name}
echo "/usr/local/lib/%{target_lib}.so.%{major_version}" >> $RPM_BUILD_DIR/file.list.%{name}
echo "/usr/local/lib/%{target_lib}.so" >> $RPM_BUILD_DIR/file.list.%{name}
fi
make install PREFIX=$RPM_BUILD_ROOT
%post
depmod -a > /dev/null 2> /dev/null
exit 0
%postun
depmod -a > /dev/null 2> /dev/null
exit 0
%clean
rm -rf $RPM_BUILD_ROOT $RPM_BUILD_DIR/file.list.%{name}
%files -f ../file.list.%{name}
%doc ./libbprd-%{version}/readme.txt ./libbprd-%{version}/release.txt
%changelog

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Silicom Bypass RD User Level Library
Libbypass provides a function interface for interruction with Bypass functionality.
To install the library, type the following command:
# cd ./lib
# make install

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Release Notes
Silicom Bypass RD User Level Library
Version 1.0.6
v1.0.6
- Byte counts increased.
v1.0.5
- Fixed get_bypass_slave, is_bypass.
v1.0.3
- Initial version.