Commit graph

660 commits

Author SHA1 Message Date
DataHoarder 869141d344 Move CONFIG_RTE_FM10K_SWITCH_MANAGEMENT to common_base 2020-10-14 18:24:48 +02:00
Xiaojun Liu 475c6a430a net/fm10k: add basic functions for switch management
Add I2C to control the inside LED and PHY.
All the operations of I2C are using fm10k I2C register.
Add SBUS to communicate with spico(micro code in serdes)
by using fm10k SBUS register. This is like I2C operations.
Add registers defination, which include all the registers
will be used in the driver. Add switch management log API.
Add switch management structures. Modify Makefile to add
new files building. Add CONFIG_RTE_FM10K_MANAGEMENT=n
in config/common_linux.

Signed-off-by: Xiaojun Liu <xiaojun.liu@silicom.co.il>
2020-10-13 00:21:14 +02:00
Randy Schacher cf4f055a65 net/bnxt: remove EEM system memory support
Remove the memory management scheme for Extended Exact Match
using system memory. Using host memory scheme instead which
was the default anyway.

Fixes: b2da02480c ("net/bnxt: support EEM system memory")

Signed-off-by: Randy Schacher <stuart.schacher@broadcom.com>
Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Reviewed-by: Peter Spreadborough <peter.spreadborough@broadcom.com>
Reviewed-by: Farah Smith <farah.smith@broadcom.com>
2020-07-30 00:41:24 +02:00
Ruifeng Wang cc9035ffbb crypto/armv8: remove debug option
Typo in debug log switch macro caused debug log cannot be enabled.
Since no log used in data path, remove the debug option entirely
and have logs always enabled.

Resolved compilation error when debug log is enabled:
rte_armv8_pmd.c: In function ‘process_armv8_chained_op’:
rte_armv8_pmd.c:633:22: error: expected ‘)’ before ‘crypto_func’
  ARMV8_CRYPTO_ASSERT(crypto_func != NULL);
                      ^

Fixes: 169ca3db55 ("crypto/armv8: add PMD optimized for ARMv8 processors")
Cc: stable@dpdk.org

Reported-by: David Marchand <david.marchand@redhat.com>
Signed-off-by: Ruifeng Wang <ruifeng.wang@arm.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2020-07-28 22:09:22 +02:00
Yuval Avnery cf9b3c36e5 regex/mlx5: introduce driver for BlueField 2
This commit introduce the RegEx poll mode drivers class, and
adds Mellanox RegEx PMD.

Signed-off-by: Yuval Avnery <yuvalav@mellanox.com>
Signed-off-by: Ori Kam <orika@mellanox.com>
2020-07-21 19:04:05 +02:00
Peter Spreadborough b2da02480c net/bnxt: support EEM system memory
- Select EEM Host or System memory via config parameter
- Add EEM system memory support for kernel memory
- Dependent on DPDK changes that add support for the HWRM_OEM_CMD.

Signed-off-by: Peter Spreadborough <peter.spreadborough@broadcom.com>
Reviewed-by: Randy Schacher <stuart.schacher@broadcom.com>
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
2020-07-07 23:38:27 +02:00
David Marchand 7762e0139b build: remove special versioning for non stable libraries
Having a special versioning for experimental/internal libraries put a
additional maintenance cost while this status is already announced in
MAINTAINERS and the library headers/documentation.
Following discussions and vote at 05/20 TB meeting [1], use a single
versioning for all libraries in DPDK.

Note: for the ABI check, an exception [2] had been added when tweaking
this special versioning [3].
Prefer explicit libabigail rules (which will be dropped in 20.11).

1: https://mails.dpdk.org/archives/dev/2020-May/168450.html
2: https://git.dpdk.org/dpdk/commit/?id=23d7ad5db41c
3: https://git.dpdk.org/dpdk/commit/?id=ec2b8cd7ed69

Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Ray Kinsella <mdr@ashroe.eu>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
2020-07-07 12:48:25 +02:00
Ori Kam f66967d218 regexdev: implement API functions
This commit implements all the RegEx public API.

Signed-off-by: Ori Kam <orika@mellanox.com>
Acked-by: Guy Kaneti <guyk@marvell.com>
2020-07-07 00:24:52 +02:00
Ori Kam b25246beae regexdev: add core functions
This commit introduce the API that is needed by the RegEx devices in
order to work with the RegEX lib.

During the probe of a RegEx device, the device should configure itself,
and allocate the resources it requires.
On completion of the device init, it should call the
rte_regex_dev_register in order to register itself as a RegEx device.

Signed-off-by: Ori Kam <orika@mellanox.com>
Signed-off-by: Parav Pandit <parav@mellanox.com>
Acked-by: Guy Kaneti <guyk@marvell.com>
2020-07-07 00:24:51 +02:00
Jerin Jacob bab9497ef7 regexdev: introduce API
As RegEx usage become more used by DPDK applications, for example:
* Next Generation Firewalls (NGFW)
* Deep Packet and Flow Inspection (DPI)
* Intrusion Prevention Systems (IPS)
* DDoS Mitigation
* Network Monitoring
* Data Loss Prevention (DLP)
* Smart NICs
* Grammar based content processing
* URL, spam and adware filtering
* Advanced auditing and policing of user/application security policies
* Financial data mining - parsing of streamed financial feeds
* Application recognition.
* Dmemory introspection.
* Natural Language Processing (NLP)
* Sentiment Analysis.
* Big data database acceleration.
* Computational storage.

Number of PMD providers started to work on HW implementation,
along side with SW implementations.

This lib adds the support for those kind of devices.

The RegEx Device API is composed of two parts:
- The application-oriented RegEx API that includes functions to setup
  a RegEx device (configure it, setup its queue pairs and start it),
  update the rule database and so on.

- The driver-oriented RegEx API that exports a function allowing
  a RegEx poll Mode Driver (PMD) to simultaneously register itself as
  a RegEx device driver.

RegEx device components and definitions:

    +-----------------+
    |                 |
    |                 o---------+    rte_regexdev_[en|de]queue_burst()
    |   PCRE based    o------+  |               |
    |  RegEx pattern  |      |  |  +--------+   |
    | matching engine o------+--+--o        |   |    +------+
    |                 |      |  |  | queue  |<==o===>|Core 0|
    |                 o----+ |  |  | pair 0 |        |      |
    |                 |    | |  |  +--------+        +------+
    +-----------------+    | |  |
           ^               | |  |  +--------+
           |               | |  |  |        |        +------+
           |               | +--+--o queue  |<======>|Core 1|
       Rule|Database       |    |  | pair 1 |        |      |
    +------+----------+    |    |  +--------+        +------+
    |     Group 0     |    |    |
    | +-------------+ |    |    |  +--------+        +------+
    | | Rules 0..n  | |    |    |  |        |        |Core 2|
    | +-------------+ |    |    +--o queue  |<======>|      |
    |     Group 1     |    |       | pair 2 |        +------+
    | +-------------+ |    |       +--------+
    | | Rules 0..n  | |    |
    | +-------------+ |    |       +--------+
    |     Group 2     |    |       |        |        +------+
    | +-------------+ |    |       | queue  |<======>|Core n|
    | | Rules 0..n  | |    +-------o pair n |        |      |
    | +-------------+ |            +--------+        +------+
    |     Group n     |
    | +-------------+ |<-------rte_regexdev_rule_db_update()
    | |             | |<-------rte_regexdev_rule_db_compile_activate()
    | | Rules 0..n  | |<-------rte_regexdev_rule_db_import()
    | +-------------+ |------->rte_regexdev_rule_db_export()
    +-----------------+

RegEx: A regular expression is a concise and flexible means for matching
strings of text, such as particular characters, words, or patterns of
characters. A common abbreviation for this is â~@~\RegExâ~@~].

RegEx device: A hardware or software-based implementation of RegEx
device API for PCRE based pattern matching syntax and semantics.

PCRE RegEx syntax and semantics specification:
http://regexkit.sourceforge.net/Documentation/pcre/pcrepattern.html

RegEx queue pair: Each RegEx device should have one or more queue pair to
transmit a burst of pattern matching request and receive a burst of
receive the pattern matching response. The pattern matching
request/response embedded in *rte_regex_ops* structure.

Rule: A pattern matching rule expressed in PCRE RegEx syntax along with
Match ID and Group ID to identify the rule upon the match.

Rule database: The RegEx device accepts regular expressions and converts
them into a compiled rule database that can then be used to scan data.
Compilation allows the device to analyze the given pattern(s) and
pre-determine how to scan for these patterns in an optimized fashion that
would be far too expensive to compute at run-time. A rule database
contains a set of rules that compiled in device specific binary form.

Match ID or Rule ID: A unique identifier provided at the time of rule
creation for the application to identify the rule upon match.

Group ID: Group of rules can be grouped under one group ID to enable
rule isolation and effective pattern matching. A unique group identifier
provided at the time of rule creation for the application to identify
the rule upon match.

Scan: A pattern matching request through *enqueue* API.

It may possible that a given RegEx device may not support all the
features
of PCRE. The application may probe unsupported features through
struct rte_regexdev_info::pcre_unsup_flags

By default, all the functions of the RegEx Device API exported by a PMD
are lock-free functions which assume to not be invoked in parallel on
different logical cores to work on the same target object. For instance,
the dequeue function of a PMD cannot be invoked in parallel on two logical
cores to operates on same RegEx queue pair. Of course, this function
can be invoked in parallel by different logical core on different queue
pair. It is the responsibility of the upper level application to
enforce this rule.

In all functions of the RegEx API, the RegEx device is
designated by an integer >= 0 named the device identifier *dev_id*

At the RegEx driver level, RegEx devices are represented by a generic
data structure of type *rte_regexdev*.
RegEx devices are dynamically registered during the PCI/SoC device
probing phase performed at EAL initialization time.
When a RegEx device is being probed, a *rte_regexdev* structure and
a new device identifier are allocated for that device. Then, the
regexdev_init() function supplied by the RegEx driver matching the
probed device is invoked to properly initialize the device.

The role of the device init function consists of resetting the hardware
or software RegEx driver implementations.

If the device init operation is successful, the correspondence between
the device identifier assigned to the new device and its associated
*rte_regexdev* structure is effectively registered.
Otherwise, both the *rte_regexdev* structure and the device identifier
are freed.

The functions exported by the application RegEx API to setup a device
designated by its device identifier must be invoked in the following
order:
    - rte_regexdev_configure()
    - rte_regexdev_queue_pair_setup()
    - rte_regexdev_start()

Then, the application can invoke, in any order, the functions
exported by the RegEx API to enqueue pattern matching job, dequeue
pattern matching response, get the stats, update the rule database,
get/set device attributes and so on

If the application wants to change the configuration (i.e. call
rte_regexdev_configure() or rte_regexdev_queue_pair_setup()), it must
call rte_regexdev_stop() first to stop the device and then do the
reconfiguration before calling rte_regexdev_start() again. The enqueue and
dequeue functions should not be invoked when the device is stopped.

Finally, an application can close a RegEx device by invoking the
rte_regexdev_close() function.

Each function of the application RegEx API invokes a specific function
of the PMD that controls the target device designated by its device
identifier.

For this purpose, all device-specific functions of a RegEx driver are
supplied through a set of pointers contained in a generic structure of
type *regexdev_ops*.
The address of the *regexdev_ops* structure is stored in the
*rte_regexdev* structure by the device init function of the RegEx driver,
which is invoked during the PCI/SoC device probing phase, as explained
earlier.

In other words, each function of the RegEx API simply retrieves the
*rte_regexdev* structure associated with the device identifier and
performs an indirect invocation of the corresponding driver function
supplied in the *regexdev_ops* structure of the *rte_regexdev*
structure.

For performance reasons, the address of the fast-path functions of the
RegEx driver is not contained in the *regexdev_ops* structure.
Instead, they are directly stored at the beginning of the *rte_regexdev*
structure to avoid an extra indirect memory access during their
invocation.

RTE RegEx device drivers do not use interrupts for enqueue or dequeue
operation. Instead, RegEx drivers export Poll-Mode enqueue and dequeue
functions to applications.

The *enqueue* operation submits a burst of RegEx pattern matching
request to the RegEx device and the *dequeue* operation gets a burst of
pattern matching response for the ones submitted through *enqueue*
operation.

Typical application utilisation of the RegEx device API will follow the
following programming flow.

- rte_regexdev_configure()
- rte_regexdev_queue_pair_setup()
- rte_regexdev_rule_db_update() Needs to invoke if precompiled rule
  database not
  provided in rte_regexdev_config::rule_db for rte_regexdev_configure()
  and/or application needs to update rule database.
- rte_regexdev_rule_db_compile_activate() Needs to invoke if
  rte_regexdev_rule_db_update function was used.
- Create or reuse exiting mempool for *rte_regex_ops* objects.
- rte_regexdev_start()
- rte_regexdev_enqueue_burst()
- rte_regexdev_dequeue_burst()

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Ori Kam <orika@mellanox.com>
2020-07-07 00:24:38 +02:00
Bruce Richardson 68b1f1cda5 build: check AVX512 rather than binutils version
Rather than checking the binutils version number, which can lead to
unnecessary disabling of AVX512 if fixes have been backported to distro
versions, we can instead check the output of "as" from binutils to see if
it is correct.

The check in the script uses the minimal assembly reproduction code posted
to the public bug tracker for gcc/binutils for those issues [1]. If the
binutils bug is present, the instruction parameters - specifically the
displacement parameter - will be different in the disassembled output
compared to the input. Therefore the check involves assembling a single
instruction and disassembling it again, checking that the two match.

[1] https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90028

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Tested-by: Harry van Haaren <harry.van.haaren@intel.com>
2020-07-05 21:32:40 +02:00
Bruce Richardson b29ac33ffc mem: fix 32-bit init config with meson
When building with meson, the default size of virtual address space
reserved for mapping pages was globally set at 512GB, which is too big for
use in 32-bit processes. To match the behaviour with "make", we configure
this to be 512GB for 64-bit and 2GB for 32-bit builds.

Bugzilla ID: 498
Fixes: 66cc45e293 ("mem: replace memseg with memseg lists")
Cc: stable@dpdk.org

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Tested-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-07-05 16:46:35 +02:00
Ruifeng Wang 78bfe1666b net/i40e: support aarch32
Expand vector PMD support to aarch32.
Enable i40e PMD by default for armv7 make build.

Signed-off-by: Ruifeng Wang <ruifeng.wang@arm.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-06-30 14:52:30 +02:00
Ruifeng Wang 50dd63b9bf net/ixgbe: support aarch32
Expand vector PMD support to aarch32.
Enable ixgbe PMD by default for armv7 make build.

Signed-off-by: Ruifeng Wang <ruifeng.wang@arm.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-06-30 14:52:30 +02:00
Harman Kalra 9311beeea4 net/octeontx2: support CN98xx
New cn98xx SOC comes up with two NIX blocks wrt
cn96xx, cn93xx, to achieve higher performance.
Also the no of cores increased to 36 from 24.

Adding support for cn98xx where need a logic to
detect if the LF is attached to NIX0 or NIX1 and
then accordingly use the respective NIX block.

Signed-off-by: Harman Kalra <hkalra@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2020-06-30 14:52:30 +02:00
Thomas Monjalon 3b6431396a devtools: add Windows cross-build test with MinGW
The Meson cross file is renamed from meson_mingw.txt to cross-mingw,
and is added to test-meson-builds.sh.

The only example supported on Windows so far is "helloworld",
that's why the default list of examples is overridden.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
2020-06-30 01:18:35 +02:00
Thomas Monjalon b2b3858a08 devtools: add ppc64 in meson build test
Add cross-compilation support of a PPC target in the build test matrix.
The CPU is defined as Power8, running as little endian.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Reviewed-by: David Christensen <drc@linux.vnet.ibm.com>
2020-06-30 01:18:35 +02:00
Wisam Jaddo 3344cf2e30 app/flow-perf: add flow performance skeleton
Add flow performance application skeleton.

Signed-off-by: Wisam Jaddo <wisamm@mellanox.com>
Reviewed-by: Andrew Rybchenko <arybchenko@solarflare.com>
Acked-by: Xiaoyu Min <jackmin@mellanox.com>
2020-06-29 15:47:36 +02:00
Tal Shnaiderman c91717eb75 eal/windows: support exit and panic
Support the debug functions in eal_common_debug.c for Windows.

Implementation of rte_dump_stack to get a backtrace similarly to Unix
and of rte_eal_cleanup in eal.c.

Signed-off-by: Tal Shnaiderman <talshn@mellanox.com>
Tested-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
2020-06-24 11:02:51 +02:00
Dmitry Kozlyuk a9bdee6ad9 config/x86: remove path for MinGW-w64 cross toolchain
Absolute paths in Meson cross-file impose unnecessary limitation
on build environment, remove them.

Signed-off-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
Acked-by: Pallavi Kadam <pallavi.kadam@intel.com>
2020-06-23 16:40:24 +02:00
Dmitry Kozlyuk 9d8feca542 config: never link with pthread on Windows
Even if pthread is provided by the toolchain, it is not needed for DPDK
on Windows, because internal shim is used. As a side-effect, this
enables cross-build with MinGW configured with non-POSIX thread library,
e.g. mcfgthread, which is the default on some distributions.

Signed-off-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
Acked-by: Pallavi Kadam <pallavi.kadam@intel.com>
2020-06-23 16:38:58 +02:00
Dmitry Kozlyuk 2a5d547a4a eal/windows: implement basic memory management
Basic memory management supports core libraries and PMDs operating in
IOVA as PA mode. It uses a kernel-mode driver, virt2phys, to obtain
IOVAs of hugepages allocated from user-mode. Multi-process mode is not
implemented and is forcefully disabled at startup. Assign myself as a
maintainer for Windows file and memory management implementation.

Signed-off-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
2020-06-15 19:30:54 +02:00
Dmitry Kozlyuk c08bd191b1 eal/windows: initialize hugepage info
Add hugepages discovery ("large pages" in Windows terminology)
and update documentation for required privilege setup. Only 2MB
hugepages are supported and their number is estimated roughly
due to the lack or unstable status of suitable OS APIs.
Assign myself as maintainer for the implementation file.

Signed-off-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
2020-06-15 19:30:32 +02:00
Kevin Traynor cfacbcb5a2 build: disable gcc 10 zero-length-bounds warning
gcc 10 issues warnings about the use of rearm_data marker
from struct rte_mbuf.

e.g.
../drivers/net/enic/enic_rxtx_vec_avx2.c: In function ‘rx_one’:
../drivers/net/enic/enic_rxtx_vec_avx2.c:21:2:
warning:
array subscript 0 is outside the bounds of an interior zero-length array
‘RTE_MARKER64’ {aka ‘long unsigned int[0]’} [-Wzero-length-bounds]
   21 |  *(uint64_t *)&mb->rearm_data = enic->mbuf_initializer;
      |  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~
In file included from ../lib/librte_mbuf/rte_mbuf.h:45,
                 from ../drivers/net/enic/enic_rxtx_vec_avx2.c:6:
../lib/librte_mbuf/rte_mbuf_core.h:484:15:
note: while referencing ‘rearm_data’
  484 |  RTE_MARKER64 rearm_data;
      |

Disable this warning for gcc 10 in order to allow v20.05 to build
without changes to struct rte_mbuf.

Bugzilla ID: 396
Cc: stable@dpdk.org

Signed-off-by: Kevin Traynor <ktraynor@redhat.com>
Reviewed-by: David Marchand <david.marchand@redhat.com>
2020-05-18 13:54:36 +02:00
Ciara Power eeb486f3ba eal: add telemetry as dependency
This patch moves telemetry further down the build, and adds it as a
dependency for EAL. Telemetry V2 is now configured to build by default,
and the legacy support is built when the telemetry config flag is set.

Telemetry now has EAL flags, shown below:
"--telemetry" = Enables telemetry (this is default if no flags given)
"--no-telemetry" = Disables telemetry

When telemetry is enabled, it will attempt to open the new socket
version, and also the legacy support socket (this will depend on Jansson
external dependency and telemetry config flag, as before).

Signed-off-by: Ciara Power <ciara.power@intel.com>
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Reviewed-by: Keith Wiles <keith.wiles@intel.com>
2020-05-11 00:37:16 +02:00
Bruce Richardson 44dfb297af build: add arch-specific header path to global includes
The global include path, which is used by anything built before EAL,
points to the EAL header files so they utility macros etc. can be used
anywhere in DPDK. This path included the OS-specific EAL header files,
but not the architecture-specific ones. This patch moves the selection
of target architecture to the top-level meson.build file so that the
global include can reference that.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Reviewed-by: Keith Wiles <keith.wiles@intel.com>
2020-05-10 23:45:02 +02:00
Nithin Dabilpuram 13fcf8aff7 node: add logging and null node
Add log infra for node specific logging.
Also, add null rte_node that just ignores all the objects
directed to it.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
2020-05-05 23:37:43 +02:00
Jerin Jacob a2da742768 graph: define API
Graph architecture abstracts the data processing functions as
"node" and "link" them together to create a complex "graph" to enable
reusable/modular data processing functions.

These APIs enables graph framework operations such as create, lookup,
dump and destroy on graph and node operations such as clone,
edge update, and edge shrink, etc. The API also allows creating the
stats cluster to monitor per graph and per node stats.

This patch defines the public API for graph support.
This patch also adds support for the build infrastructure and
update the MAINTAINERS file for the graph subsystem.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2020-05-05 23:27:49 +02:00
Alvin Zhang 66fde1b943 net/igc: add skeleton
Implement device detection and loading.
Add igc driver guide docs.

Signed-off-by: Alvin Zhang <alvinx.zhang@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-04-21 13:57:07 +02:00
Jerin Jacob 27db82c709 trace: introduce new subsystem
Define the public API for trace support.
This patch also adds support for the build infrastructure and
update the MAINTAINERS file for the trace subsystem.

The 8 bytes tracepoint object is a global variable, and can be used in
fast path. Created a new __rte_trace_point section to store the
tracepoint objects as,
- It is a mostly read-only data and not to mix with other "write"
  global variables.
- Chances that the same subsystem fast path variables come in the same
  fast path cache line. i.e, it will enable a more predictable
  performance number from build to build.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
Acked-by: David Marchand <david.marchand@redhat.com>
2020-04-23 15:39:06 +02:00
Nicolas Chautru 0b5927cbcb baseband/fpga_5gnr_fec: add PMD for FPGA 5GNR FEC
Add stubs for the FPGA 5GNR FEC PMD

Signed-off-by: Nicolas Chautru <nicolas.chautru@intel.com>
Acked-by: Dave Burley <dave.burley@accelercomm.com>
Acked-by: Niall Power <niall.power@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2020-04-19 22:33:07 +02:00
Pavan Nikhilesh da4eae278b build: add global libatomic dependency for 32-bit clang
Add libatomic as a global dependency when compiling for 32-bit using
clang. As we need libatomic for 64-bit atomic ops.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
2020-04-21 11:34:09 +02:00
Thomas Monjalon a1b6cda16a eal: move arch-specific header files
The arch-specific directories arm, ppc and x86 in common/include/arch/
are moved as include/ sub-directories of respective arch directories:
	- arm/include/
	- ppc/include/
	- x86/include/

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Reviewed-by: Gavin Hu <gavin.hu@arm.com>
Reviewed-by: David Christensen <drc@linux.vnet.ibm.com>
Acked-by: David Marchand <david.marchand@redhat.com>
2020-03-31 13:08:55 +02:00
Thomas Monjalon dd45ed7e74 build: rename ppc sub-directories
The directories ppc_64 are renamed as ppc in
	- config/
	- lib/librte_eal/common/arch/
	- lib/librte_eal/common/include/arch/

The EAL directories are not really renamed, but symbolically linked,
because they will be moved with their new name in the next commits.

If ppc_32 needs to be supported, it can be in the same directory.
The arch directories arm and x86 are already covering both 32 and 64-bit
sub-architectures.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Reviewed-by: David Christensen <drc@linux.vnet.ibm.com>
Acked-by: David Marchand <david.marchand@redhat.com>
2020-03-31 13:08:55 +02:00
Qi Zhang af3f83032b net/ice: remove bulk alloc option
Remove CONFIG_RTE_LIBRTE_ICE_RX_ALLOW_BULK_ALLOC with below
consideration:

1. A default Rx path can always be selected by setting a proper
   rx_free_thresh value at runtime, see
   ice_check_rx_burst_bulk_alloc_preconditions.

2. Its not a big deal to always reserve more space for desc ring.
   "ring_size = (uint16_t)(rxq->nb_rx_desc + ICE_RX_MAX_BURST);"

3. Fixes a potential invalid memory access in ice_reset_rx_queue.
   If CONFIG_RTE_LIBRTE_ICE_RX_ALLOW_BULK_ALLOC is turned on while
   ice_check_rx_burst_bulk_alloc_preconditions return fail.
   Below code will have problem.

   for (i = 0; i < ICE_RX_MAX_BURST; ++i)
   	rxq->sw_ring[rxq->nb_rx_desc + i].mbuf = &rxq->fake_mbuf;

Fixes: 50370662b7 ("net/ice: support device and queue ops")
Cc: stable@dpdk.org

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2020-03-18 10:21:41 +01:00
Dmitry Kozlyuk 716f9bb42e build: fix linker warnings with clang on Windows
Clang on Windows doesn't use pthread for now, while MinGW does. Removing
`-pthread` option with MS linker fixes the following warning:

    clang: warning: argument unused during compilation: '-pthread'
        [-Wunused-command-line-argument]

Option `--no-as-needed` is meaningless for PE output. Disabling it on
Windows fixes the following warning:

    LINK : warning LNK4044: unrecognized option '/-no-as-needed'; ignored

Fixes: 98edcbb5a ("eal/windows: introduce Windows support")

Signed-off-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
Tested-by: William Tu <u9012063@gmail.com>
Tested-by: Pallavi Kadam <pallavi.kadam@intel.com>
Acked-by: Pallavi Kadam <pallavi.kadam@intel.com>
2020-03-18 01:20:57 +01:00
Dmitry Kozlyuk 1d71455306 build: add cross-file for MinGW-w64
Add Meson configuration to cross-compile for Windows using MinGW-w64.
It may require adjustments in some cases, but at least it provides
the foundation.

Signed-off-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
Tested-by: William Tu <u9012063@gmail.com>
Tested-by: Pallavi Kadam <pallavi.kadam@intel.com>
2020-03-18 01:20:48 +01:00
Dmitry Kozlyuk 4816484bab build: support MinGW-w64 with Meson
MinGW-w64 linker does not mimic MS linker options, so the build system
must differentiate between linkers on Windows. Use GNU linker options
with GCC and MS linker options with Clang.

MinGW-w64 by default uses MSVCRT stdio, which does not comply to ANSI,
most notably its formatting and string handling functions. MinGW-w64
support for the Universal CRT (UCRT) is ongoing, but the toolchain
provides its own standard-complying implementation of stdio. The latter
is used in the patch to support formatting in DPDK.

Signed-off-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
Tested-by: William Tu <u9012063@gmail.com>
Tested-by: Pallavi Kadam <pallavi.kadam@intel.com>
2020-03-18 01:20:39 +01:00
Thomas Monjalon ee76bddc76 doc: fix naming of Mellanox devices
The devices of the family ConnectX may have two letters as suffix.
Such suffix is preceded with a space and the second x is lowercase:
    - ConnectX-4 Lx
    - ConnectX-5 Ex
    - ConnectX-6 Dx

Uppercase of the device family name BlueField is also fixed.

The lists of supported devices are fixed.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
2020-02-25 15:55:54 +01:00
Ferruh Yigit ec2b8cd7ed build: fix experimental library versioning
The problem occurred when workaround that makes soname two digits
applied. With this change for the ABI version "20.0.1" the experimental
library version become ".so.2001".
After workaround removed in ABI version 21.0, the experimental library
version will become ".so.210".
"2001" is bigger value than "201" although it is a previous version of
the library version, this can break the version comparisons.

To fix this, introducing a temporary sub level versioning for the
experimental libraries, so that minor version comparison will continue
to work.

After change experimental libraries will follow below versioning:

DPDK version  ABI version  soname       library name
------------  -----------  ------       ------------
DPDK 19.11     20.0        .so.0.200    .so.0.200
DPDK 20.02     20.0.1      .so.0.200.1  .so.0.200.1
DPDK 20.05     20.0.2      .so.0.200.2  .so.0.200.2
DPDK 20.11     21.0        .so.0.210    .so.0.210
DPDK 21.02     21.1        .so.0.211    .so.0.211

Note: After workaround removed in DPDK 20.11 and soname switch back to
single digit this patch won't work and needs to be updated.

Fixes: f26c2b39b2 ("build: fix soname info for 19.11 compatibility")

Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com>
Acked-by: Luca Boccassi <bluca@debian.org>
Acked-by: Ray Kinsella <ray.kinsella@intel.com>
2020-02-21 17:44:02 +01:00
Thomas Monjalon 26ed1b2af7 config: deduplicate options
Some config options are overwritten with the same value
as the one inherited from its template parent.
Such duplicates which have no meaningful comments are removed.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: David Marchand <david.marchand@redhat.com>
2020-02-12 11:32:15 +01:00
Qingmin Liu 3b67a64462 config: add Broadcom Stingray for meson cross-compilation
Broadcom Stingray is armv8 CPU having cortex-a72. The implementor ID is
0x41 (arm) and the primary part number is 0xd08 (cortex-a72).

Signed-off-by: Qingmin Liu <qingmin.liu@broadcom.com>
2020-02-06 15:38:27 +01:00
Liron Himi 39b2bdeee3 config: update Marvell ARMADA
disable more NXP modules that conflict with MUSDK

Signed-off-by: Liron Himi <lironh@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2020-02-06 15:38:24 +01:00
Bruce Richardson 1fe7e6d2d7 build: remove some icc warnings
While icc builds without the "werror" setting build successfully, there are
a lot of warnings. To make the output cleaner, and to allow building with
warnings enabled, we can add a list of warning ids to ignore.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
2020-02-06 09:14:39 +01:00
Matan Azrad 95276abaaf vdpa/mlx5: introduce Mellanox vDPA driver
Add a new driver to support vDPA operations by Mellanox devices.

The first Mellanox devices which support vDPA operations are
ConnectX-6 Dx and Bluefield1 HCA for their PF ports and VF ports.

This driver is depending on rdma-core like the mlx5 PMD, also it is
going to use mlx5 DevX to create HW objects directly by the FW.
Hence, the common/mlx5 library is linked to the mlx5_vdpa driver.

This driver will not be compiled by default due to the above
dependencies.

Register a new log type for this driver.

Signed-off-by: Matan Azrad <matan@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
2020-02-05 09:51:21 +01:00
Alfredo Cardigliano a72cf98cc9 net/ionic: add skeleton
Add makefile and config file options to compile the Pensando ionic PMD.
Add feature and version map file.
Update maintainers file.

Signed-off-by: Alfredo Cardigliano <cardigliano@ntop.org>
Reviewed-by: Shannon Nelson <snelson@pensando.io>
2020-01-20 18:02:17 +01:00
Jerin Jacob 91a861e541 config: disable Linux kernel modules by default
Based on the techboard meeting held on 2019-11-06,
It's been decided to disable all kmods by default from v20.02.

http://mails.dpdk.org/archives/dev/2019-November/151763.html

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
2020-01-20 18:38:44 +01:00
Mahipal Challa 56d46d13f7 raw/octeontx2_ep: add build infra and device probe
Add the OCTEON TX2 SDP EP device probe along with the
build infrastructure for Make and meson builds.

Signed-off-by: Mahipal Challa <mchalla@marvell.com>
Reviewed-by: Gavin Hu <gavin.hu@arm.com>
2020-01-20 09:04:39 +01:00
Reshma Pattan c8f5f2c0b1 net/ixgbe: remove vector config
CONFIG_RTE_IXGBE_INC_VECTOR is enabled by default, so remove
it and use architecture specific flags.

Signed-off-by: Reshma Pattan <reshma.pattan@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2020-01-17 19:59:18 +01:00
Gavin Hu 1be7855d77 eal: add wait until equal API
The rte_wait_until_equal_xx APIs abstract the functionality of
'polling for a memory location to become equal to a given value'.

Add the RTE_ARM_USE_WFE configuration entry for aarch64, disabled
by default. When it is enabled, the above APIs will call WFE instruction
to save CPU cycles and power.

From a VM, when calling this API on aarch64, it may trap in and out to
release vCPUs whereas cause high exit latency. Since kernel 4.18.20 an
adaptive trapping mechanism is introduced to balance the latency and
workload.

Signed-off-by: Gavin Hu <gavin.hu@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Reviewed-by: Steve Capper <steve.capper@arm.com>
Reviewed-by: Ola Liljedahl <ola.liljedahl@arm.com>
Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Reviewed-by: Phil Yang <phil.yang@arm.com>
Acked-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Signed-off-by: David Marchand <david.marchand@redhat.com>
2020-01-17 12:02:21 +01:00