db188ec61e
Add epl serdes include loading spico, controlling pcsl, dma, dfe, ical. Add spico code. Add state machine for epl lane and port, it creates a pthread to handle the state changing event. Add external port management, which will use state machine to handle the event from lane and port. The lane state will change between DOWN, WAIT_PLL_LOCK, WAIT_SIGNAL_OK, WAIT_DFE_ICAL, WAIT_DFE_PCAL, UP. The port state will change between DOWN, WAIT_LANE_UP, UP. Signed-off-by: Xiaojun Liu <xiaojun.liu@silicom.co.il> |
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baseband | ||
bus | ||
common | ||
compress | ||
crypto | ||
event | ||
mempool | ||
net | ||
raw | ||
regex | ||
vdpa | ||
Makefile | ||
meson.build |