fix init_PCIE_EACH_SERDES_SPICO ending
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Enhanced debuggability of assembly and parsing errors
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parent
eefee10ef3
commit
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2
rrcc
2
rrcc
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@ -1 +1 @@
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Subproject commit a51287bceeb4e08072b5b2e59ff8f053466e443d
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Subproject commit 1566c33d5840c88df5ccb591849cda8965ddf628
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12
src/pcie.asm
12
src/pcie.asm
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@ -438,16 +438,14 @@ init_PCIE_EACH_SERDES_SPICO:
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MOV R2, 0x000000d0 ; Current data to write to odd (PCS)
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.do:
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BEQ, R0, 1, 0x1 .commandOddPcs; Is it odd (PCS)?
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BEQ, R0, 1, 0x1 @.commandOddPcs; Is it odd (PCS)?
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FASTCALL @execute_SBus_PCIE_Command, 0xfd, R0, 0, R1 ; Execute command
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BNE RRET, 1, 0x1, @.failCommand ; Command failed
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JUMP .nextItem
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JUMP @.nextItem
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.commandOddPcs:
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; Do odd number init (PCS)
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FASTCALL @execute_SBus_PCIE_Command, 0x24, R0, 0, R2 ; Execute command
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BNE RRET, 1, 0x1, @.failCommand ; Command failed
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.nextItem:
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BNE RRET, 1, 0x1, @.failCommand ; Command failed
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ADD R0, R0, 1 ; Increase index for next spico
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.check0: BNE, R0, 0x0a, 0xFFFFFFFF, @.check1
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@ -479,7 +477,7 @@ init_PCIE_EACH_SERDES_SPICO:
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MOV R1, 0x00e70ff0
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MOV R2, 0x000000d7
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.continue:
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BNE R0, platform_SERDES_SPICO_COUNT + 1, 0xFFFFFFFF, @.do
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BNE R0, platform_SERDES_SPICO_COUNT, 0xFFFFFFFF, @.do
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MOV RRET, 1 ; Success
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MOV api_SERDES_OOR_STATUS_PASS_1, 0
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@ -491,5 +489,5 @@ init_PCIE_EACH_SERDES_SPICO:
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MOV RRET, 0 ; Failure
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SET api_BSM_STATUS, 0x0000fff0, 0x0000fff0
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MOV api_PCIE_SERDES_INIT_STATUS, api_BSM_STATUS
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MOV api_PCIE_SERDES_STATUS, 0x00000001
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MOV api_PCIE_SERDES_STATUS, 1
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RET
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