DataHoarder
c99d942f3e
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131 lines
6.4 KiB
NASM
131 lines
6.4 KiB
NASM
; Copyright (c) 2021, rrc-open-firmware FM10K-Documentation Contributors
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;
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; Redistribution and use in source and binary forms, with or without
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; modification, are permitted provided that the following conditions are met:
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;
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; * Redistributions of source code must retain the above copyright notice,
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; this list of conditions and the following disclaimer.
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; * Redistributions in binary form must reproduce the above copyright
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; notice, this list of conditions and the following disclaimer in the
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; documentation and/or other materials provided with the distribution.
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; * Neither the name of the copyright holder nor the names of its contributors
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; may be used to endorse or promote products derived from this software
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; without specific prior written permission.
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;
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; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
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; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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.constant rrcc_SPI_TRANSFER_MODE, bootCfg_spiTransferMode
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.constant rrcc_SPI_TRANSFER_SPEED, bootCfg_spiTransferSpeed
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.constant rrcc_IMAGE_VERSION, platform_firmware_versionNumber
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entrypoint:
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CALL @init_startClocks
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FASTCALL @init_setClockSource, bootCfg_systimeClockSource
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FASTCALL @init_setPcieSplitMode, bootCfg_pep0_mode, bootCfg_pep2_mode, bootCfg_pep4_mode, bootCfg_pep6_mode
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SET DEVICE_CFG, 0xff80, 0xff80 ; Set PCIeEnable[0-8] to enabled
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CALL @init_markClockStable
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CALL @init_markSbusBooted
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FASTCALL @init_memoryRepairConfig, bootCfg_skipMemRepair
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CALL @init_bistStateCheck
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MOV R0, bootCfg_skipPcieInitialization
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BEQ R0, 1, 1, @.skipPcieInit
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SET SOFT_RESET, 0, 0x6 ; Enable areas, EPLReset = 0, SwitchReset = 0
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WAIT 10 ; Wait 100ns, minimum
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FASTCALL @init_setPciePEPEnabled, bootCfg_pep0_enable, bootCfg_pep1_enable, bootCfg_pep2_enable, bootCfg_pep3_enable, bootCfg_pep4_enable, bootCfg_pep5_enable, bootCfg_pep6_enable, bootCfg_pep7_enable, bootCfg_pep8_enable
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FASTCALL @init_PCIE_setClockOutDiv, 10
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CALL @lock_PCIE_SBUS_take ; Try to take lock for ourselves
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BNE RRET, 1, 0x1, @.skipPcieInit ; We failed to take the lock
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CALL @init_PCIE_MASTER_SPICO
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BNE RRET, 1, 0x1, @.skipPcieInit ; Failed to init properly
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CALL @init_ALL_PCIE_SERDES_SPICO
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BNE RRET, 1, 0x1, @.skipPcieInit ; Failed to init properly
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; Restart PEPs
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MOV api_BSM_STATUS, 0x00000010
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FASTCALL @init_setPciePEPEnabled, bootCfg_pep0_enable, bootCfg_pep1_enable, bootCfg_pep2_enable, bootCfg_pep3_enable, bootCfg_pep4_enable, bootCfg_pep5_enable, bootCfg_pep6_enable, bootCfg_pep7_enable, bootCfg_pep8_enable
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WAIT 5
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MOV api_BSM_STATUS, 0x00010010
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MOV api_PCIE_DE_WARM_RESET_STATUS, api_BSM_STATUS
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FASTCALL @init_PCIE_setClockOutDiv, 6
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CALL @init_PCIE_EACH_SERDES_SPICO
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BNE RRET, 1, 0x1, @.skipPcieInit ; Failed to init properly
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; TODO complete this
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.skipPcieInit:
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BEQ platform_PCIE_SBUS_LOCK_HOLD, 1, 0x1, @.noReleaseLock
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CALL @lock_PCIE_SBUS_release
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.noReleaseLock:
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CALL @config_load_bootCfg_customMac
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MOV api_EEPROM_IMAGE_VERSION, platform_firmware_versionNumber ; Sets the version on memory where a switch manager can read it
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RET
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init_markSbusBooted:
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MOV api_BSM_STATUS, 0x0000b
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MOV SBUS_EPL_CFG, 0 ; Set SBUS_ControllerReset = 0 (Not in reset)
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MOV SBUS_PCIE_CFG, 0 ; Set SBUS_ControllerReset = 0 (Not in reset)
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MOV api_BSM_STATUS, 0x1000b
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MOV api_SBUS_RESET_STATUS, api_BSM_STATUS
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RET
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; FASTCALL void(bool skipMemRepair)
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init_memoryRepairConfig:
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MOV api_BSM_STATUS, 0x00000c ; apparently api_MEMORY_REPAIR_STATUS is not set here
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BEQ P0, 0, 0x1, @.noSkipRepair
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MOV api_BSM_STATUS, 0x41000c
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MOV api_MEMORY_REPAIR_STATUS, api_BSM_STATUS
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RET
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.noSkipRepair:
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MOV REI_CTRL, 0x9; Set RAM EFUSE interface, Reset = 1, Mode = 0, Run = 0, AutoLoadEnable = 1
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MOV REI_CTRL, 0x8; Take it out of reset. Set RAM EFUSE interface, Reset = 0, Mode = 0, Run = 0, AutoLoadEnable = 1
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MOV api_BSM_STATUS, 0x01000c ; apparently api_MEMORY_REPAIR_STATUS is not set here
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MOV R0, 0x3 ; Number of total tries
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.checkMemTest:
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SUB R0, R0, 1 ; Decrease total tries
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PNE REI_STAT, 1, 0x3, 16000, 10, @.failMemCheck ; Check if ReiDonePass = 1, and ReiDoneFail = 0
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MOV api_BSM_STATUS, 0x11000c ; Success!
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MOV api_MEMORY_REPAIR_STATUS, api_BSM_STATUS
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WAIT 10
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RET
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.failMemCheck:
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BEQ REI_STAT, 0x2, 0x2, @.failMem ; Check if ReiDoneFail = 1, and ReiDonePass = 0
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MOV api_BSM_STATUS, 0x31000c ; Retry
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MOV api_MEMORY_REPAIR_STATUS, api_BSM_STATUS
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BNE R0, 0, 0x3, @.checkMemTest ; Jump if total tries != 0
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.failMem: ; Failed or took too many tries
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MOV api_BSM_STATUS, 0x21000c
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MOV api_MEMORY_REPAIR_STATUS, api_BSM_STATUS
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END ; Program Execution finishes after memory check failed
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init_bistStateCheck:
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MOV api_BSM_STATUS, 0x000000d
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WRITE BIST_CTRL_0, 0x00000000, 0x0000ffff ; 64-bit write, regular BIST, BistRun_PCIE[0-8] = 1, BistRun_EPL = 1, BistRun_FABRIC = 1, BistRun_TUNNEL = 1, BistRun_BSM = 1, BistRun_CRM = 1, BistRun_FIBM = 1, BistRun_SBM = 1
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WRITE BIST_CTRL_0, 0x0000ffff, 0x0000ffff ; 64-bit write, BIST memory init, BistRun_PCIE[0-8] = 1, BistRun_EPL = 1, BistRun_FABRIC = 1, BistRun_TUNNEL = 1, BistRun_BSM = 1, BistRun_CRM = 1, BistRun_FIBM = 1, BistRun_SBM = 1
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WAIT 80000
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WRITE BIST_CTRL_0, 0x00000000, 0x0000ffff ; 64-bit write, regular BIST, BistRun_PCIE[0-8] = 1, BistRun_EPL = 1, BistRun_FABRIC = 1, BistRun_TUNNEL = 1, BistRun_BSM = 1, BistRun_CRM = 1, BistRun_FIBM = 1, BistRun_SBM = 1
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WRITE BIST_CTRL_0, 0x00000000, 0x00000000 ; 64-bit write, regular BIST, set all BistRun_* = 0
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MOV api_BSM_STATUS, 0x110000d
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MOV api_MEMORY_INIT_STATUS, api_BSM_STATUS
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RET |