Upstream release 6.0.10.7.30.1
This commit is contained in:
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cb2e20770c
commit
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driver/64/rdifd
BIN
driver/64/rdifd
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@ -19,7 +19,6 @@ install:
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mkdir -p $(INSTALL_MOD_PATH)$(PRDPATH_UTIL)
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install rdif $(INSTALL_MOD_PATH)$(PRDPATH_UTIL)
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mkdir -p /etc/rdi
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install -m 444 fm_platform_attributes.cfg /etc/rdi
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ifeq (,$(en64))
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install ./32/rdifd $(INSTALL_MOD_PATH)$(PRDPATH_UTIL)
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@ -1,380 +0,0 @@
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###########################################################
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# Global configurations
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###########################################################
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#=========================================================#
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#Debug configuration flag
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#Optional Configuration. Default is NONE.
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# CONFIG, MOD_STATE, MOD_INTR, MOD_TYPE, PLAT_LOG
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# Use comma delimited for multiple entries, no spaces.
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# api.platform.config.debug text CONFIG
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#=========================================================#
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# Total number of switches in the system
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# Required configuration.
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api.platform.config.numSwitches int 1
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api.platform.config.switch.0.uioDevName text /dev/uio0
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#=========================================================#
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# Platform name
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# Optional Configuration. Default is libertyTrail.
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api.platform.config.platformName text rubyRapid
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#=========================================================#
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# Interrupt parameters
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api.platform.config.switch.0.msiEnabled bool true
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#####################################################################
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# Switch configurations
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#####################################################################
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#===================================================================#
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# Switch number for the specified switch index
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# Note switch index is also the same as API sw argument.
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# Switch number is the value that will be passed down to the shared
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# library interfaces as well as kernel module driver interfaces.
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# Optional configuration.
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# If not specified then switch number is the same as switch index.
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api.platform.config.switch.0.switchNumber int 0
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#===================================================================#
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# LED polling period, for software driven LED
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# See SW_LED in port capabilities.
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#optional configuration. Default 500 msec.
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api.platform.config.switch.0.ledPollPeriodMsec int 200
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api.platform.config.switch.0.ledBlinkMode text HW_ASSISTED
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api.platform.config.switch.0.portIntrGpio int 6
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api.platform.config.switch.0.i2cResetGpio int 5
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#===================================================================#
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#Transceiver management polling period
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#optional configuration. Default 1000 msec.
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#api.platform.config.switch.0.xcvrPollPeriodMsec int 0
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#===================================================================#
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# Total number of ports on the switch, including CPU port
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# Required configuration
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# This is the number of portIndex below
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api.platform.config.switch.0.numPorts int 5
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###############################################################################
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# Port configurations
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###############################################################################
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# For receiving/transmitting packets to/from API using raw socket
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# Changing pep number also requires swapping associated PCIE portMapping entries
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#api.platform.config.switch.0.netDevName text p1p3
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api.platform.config.switch.0.cpuPort int 4
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api.platform.config.switch.0.bootCfg.mgmtPep int 2
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# CPU port (PEP #8 --> PCIE x1)
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api.platform.config.switch.0.portIndex.0.portMapping text "LOG=0 PCIE=8"
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# SFPP
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# QSFP0
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api.platform.config.switch.0.portIndex.1.lane.0.portMapping text "LOG=1 EPL=0 LANE=0"
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api.platform.config.switch.0.portIndex.1.lane.1.portMapping text "LOG=1 EPL=0 LANE=1"
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api.platform.config.switch.0.portIndex.1.lane.2.portMapping text "LOG=1 EPL=0 LANE=2"
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api.platform.config.switch.0.portIndex.1.lane.3.portMapping text "LOG=1 EPL=0 LANE=3"
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# QSFP1 (with different lane ordering)
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api.platform.config.switch.0.portIndex.2.lane.0.portMapping text "LOG=2 EPL=6 LANE=0"
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api.platform.config.switch.0.portIndex.2.lane.1.portMapping text "LOG=2 EPL=6 LANE=1"
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api.platform.config.switch.0.portIndex.2.lane.2.portMapping text "LOG=2 EPL=6 LANE=2"
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api.platform.config.switch.0.portIndex.2.lane.3.portMapping text "LOG=2 EPL=6 LANE=3"
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api.platform.config.switch.0.portIndex.3.portMapping text "LOG=3 PCIE=0"
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api.platform.config.switch.0.portIndex.4.portMapping text "LOG=4 PCIE=2"
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#=============================================================================#
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# Interface type for the the given switch port
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# Optional configuration. Default is NONE or specified by port.default.
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# NONE, SFPP, QSFP_LANE0, QSFP_LANE1, QSFP_LANE2, QSFP_LANE3
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#api.platform.config.switch.0.port.default.interfaceType text NONE
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api.platform.config.switch.0.portIndex.1.interfaceType text QSFP_LANE0
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api.platform.config.switch.0.portIndex.2.interfaceType text QSFP_LANE0
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#=============================================================================#
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# The maximum port speed at which the port will be operated. This is used
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# to allocate scheduler bandwidth to the ports.
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#
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# Optional configuration. Default is automatically selected per port type
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# EPL -> 2.5G
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# PCIE_X1 -> 10G
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# PCIE_X4 -> 50G
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# PCIE_X8 -> 50G
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# TE -> 100G
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# LOOPBACK -> 25G
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#
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api.platform.config.switch.0.portIndex.0.speed int 10000
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# QSFP0
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api.platform.config.switch.0.portIndex.1.speed int 100000
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api.platform.config.switch.0.portIndex.2.speed int 100000
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#api.platform.config.switch.0.portIndex.3.speed int 1000
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#api.platform.config.switch.0.portIndex.4.speed int 1000
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#api.FM10000.schedMode text static
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#=============================================================================#
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# Ethernet mode for the the given switch port
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# Optional configuration. Default is DISABLED or specified by port.default.
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#
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# EPL ports defaulted to 10G
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api.platform.config.switch.0.port.default.ethernetMode text DISABLED
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#
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#
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#
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api.platform.config.switch.0.portIndex.1.ethernetMode text AUTODETECT
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#api.platform.config.switch.0.portIndex.2.ethernetMode text 10GBase-SR
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api.platform.config.switch.0.portIndex.2.ethernetMode text AUTODETECT
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#api.platform.config.switch.0.portIndex.5.ethernetMode text DISABLED
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#api.platform.config.switch.0.portIndex.6.ethernetMode text DISABLED
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#api.platform.config.switch.0.portIndex.7.ethernetMode text DISABLED
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#api.platform.config.switch.0.portIndex.8.ethernetMode text DISABLED
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#=============================================================================#
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# Port capability for the the given switch port
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# Optional configuration. Default is NONE or specified by port.default.
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# NONE, LAG, ROUTE, 10M, 100M, 1G, 2PT5G, 10G, 25G, 40G, 100G, SW_LED
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# Use comma delimited for multiple entries, no spaces.
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# Backplane ports get default value
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api.platform.config.switch.0.port.default.capability text NONE
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# SFPP ports
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api.platform.config.switch.0.portIndex.1.capability text LAG,ROUTE,10G,40G,100G,SW_LED
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api.platform.config.switch.0.portIndex.2.capability text LAG,ROUTE,10G,40G,100G,SW_LED
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#=============================================================================#
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# Lane polarity for the the given switch port
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# Optional configuration. Default is INVERT_NONE or specified by port.default.
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# INVERT_NONE, INVERT_RX, INVERT_TX, INVERT_RX_TX
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api.platform.config.switch.0.port.default.lanePolarity text INVERT_NONE
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#=============================================================================#
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# SERDES preCursor value for DA cables for the the given switch port
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# Optional configuration. Default is 0 or specified by port.default.
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api.platform.config.switch.0.port.default.preCursorCopper int 0
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#=============================================================================#
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# Unique 32-bit value associated with a port for the shared library
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# If not specified then this value is default to port.default.hwResourceId
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#
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# Select a hwResourceId per port (zero base)
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#
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#api.platform.config.switch.0.port.default.hwResourceId int -1
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#api.platform.config.switch.0.portIndex.1.hwResourceId int 0
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#api.platform.config.switch.0.portIndex.2.hwResourceId int 1
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#api.platform.config.switch.0.portIndex.3.hwResourceId int 2
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api.platform.config.switch.0.portIndex.1.hwResourceId int 0x000
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api.platform.config.switch.0.portIndex.2.hwResourceId int 0x101
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###############################################################################
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# Shared library configurations
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###############################################################################
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#=============================================================================#
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# Shared library name to load switch management function interfaces
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# Optional, all switch management features are disabled if not set.
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api.platform.config.switch.0.sharedLibraryName text libLTStdPlatform.so
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#=============================================================================#
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# Disable loading function interfaces
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# Optional, all function interfaces will be loaded if not set.
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# NONE, fmPlatformLibInitSwitch, fmPlatformLibResetSwitch, fmPlatformLibI2cWriteRead,
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# fmPlatformLibSelectBus, fmPlatformLibGetPortXcvrState, fmPlatformLibSetPortXcvrState,
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# fmPlatformLibSetPortLed, fmPlatformLibEnablePortIntr, fmPlatformLibGetPortIntrPending
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# Use comma delimited for multiple entries, no spaces.
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api.platform.config.switch.0.sharedLibrary.disable text GetPortIntrPending,EnablePortIntr
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#=============================================================================#
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# Specifies what interface is used as I2C master to access
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# the port logic devices.
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api.platform.lib.config.bus0.i2cDevName text switchI2C
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#=============================================================================#
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# PCA mux configuration
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#
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api.platform.lib.config.pcaMux.count int 2
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api.platform.lib.config.pcaMux.0.model text PCA9545
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api.platform.lib.config.pcaMux.0.addr int 0x70
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api.platform.lib.config.pcaMux.0.bus int 0
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api.platform.lib.config.pcaMux.1.model text PCA9545
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api.platform.lib.config.pcaMux.1.addr int 0x71
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api.platform.lib.config.pcaMux.1.parent.index int 0
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api.platform.lib.config.pcaMux.1.parent.value int 0x8
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api.platform.lib.config.pcaMux.1.bus int 0
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#=============================================================================#
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# PCA I/O configuration
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api.platform.lib.config.pcaIo.count int 2
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api.platform.lib.config.pcaIo.0.model text PCA9505
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api.platform.lib.config.pcaIo.0.addr int 0x20
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api.platform.lib.config.pcaIo.0.parent.index int 0
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api.platform.lib.config.pcaIo.0.parent.value int 0x4
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api.platform.lib.config.pcaIo.0.bus int 0
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api.platform.lib.config.pcaIo.1.model text PCA9635
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api.platform.lib.config.pcaIo.1.addr int 0x6a
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api.platform.lib.config.pcaIo.1.parent.index int 0
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api.platform.lib.config.pcaIo.1.parent.value int 0x4
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api.platform.lib.config.pcaIo.1.bus int 0
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#=============================================================================#
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# SFP+ pins offset from basePin
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#api.platform.lib.config.xcvrState.default.modAbs.pin int 0
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#api.platform.lib.config.xcvrState.default.rxLos.pin int 1
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#api.platform.lib.config.xcvrState.default.txDisable.pin int 2
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#api.platform.lib.config.xcvrState.default.txFault.pin int 3
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#api.platform.lib.config.xcvrState.default.modPrsL.pin int 0
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#api.platform.lib.config.xcvrState.default.intL.pin int 1
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#api.platform.lib.config.xcvrState.default.resetL.pin int 2
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#api.platform.lib.config.xcvrState.default.lpMode.pin int 3
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api.platform.lib.config.xcvrState.default.modPrsL.pin int 2
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api.platform.lib.config.xcvrState.default.intL.pin int 1
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api.platform.lib.config.xcvrState.default.resetL.pin int 3
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api.platform.lib.config.xcvrState.default.lpMode.pin int 0
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#=============================================================================#
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# Number of hwResourceId required (4 SFPP ports)
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#
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api.platform.lib.config.hwResourceId.count int 2
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api.platform.config.switch.0.portIndex.1.hwResourceId int 0
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api.platform.config.switch.0.portIndex.2.hwResourceId int 1
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#=============================================================================#
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# Hardware resource configuration
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#
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# zQSFP0
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api.platform.lib.config.hwResourceId.0.interfaceType text QSFP
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api.platform.lib.config.hwResourceId.0.xcvrI2C.busSelType text PCAMUX
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api.platform.lib.config.hwResourceId.0.xcvrI2C.pcaMux.index int 1
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api.platform.lib.config.hwResourceId.0.xcvrI2C.pcaMux.value int 0x4
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api.platform.lib.config.hwResourceId.0.xcvrState.pcaIo.index int 0
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api.platform.lib.config.hwResourceId.0.xcvrState.pcaIo.basePin int 0
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api.platform.lib.config.hwResourceId.0.portLed.0.type text PCA
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api.platform.lib.config.hwResourceId.0.portLed.0.pcaIo.index int 1
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api.platform.lib.config.hwResourceId.0.portLed.0.pcaIo.pin int 0
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api.platform.lib.config.hwResourceId.0.portLed.0.pcaIo.usage text LINK,TRAFFIC,40G,100G
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api.platform.lib.config.hwResourceId.1.interfaceType text QSFP
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api.platform.lib.config.hwResourceId.1.xcvrI2C.busSelType text PCAMUX
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api.platform.lib.config.hwResourceId.1.xcvrI2C.pcaMux.index int 1
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api.platform.lib.config.hwResourceId.1.xcvrI2C.pcaMux.value int 0x8
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api.platform.lib.config.hwResourceId.1.xcvrState.pcaIo.index int 0
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api.platform.lib.config.hwResourceId.1.xcvrState.pcaIo.basePin int 8
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api.platform.lib.config.hwResourceId.1.portLed.0.type text PCA
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api.platform.lib.config.hwResourceId.1.portLed.0.pcaIo.index int 1
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api.platform.lib.config.hwResourceId.1.portLed.0.pcaIo.pin int 1
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api.platform.lib.config.hwResourceId.1.portLed.0.pcaIo.usage text LINK,TRAFFIC,40G,100G
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@ -2,10 +2,11 @@
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case "$1" in
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start)
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rdifd -v
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#rdifd
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;;
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stop)
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rdifd stop
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rdifd stop
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;;
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restart)
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$0 stop && $0 start
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270
include/librdi.h
270
include/librdi.h
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@ -45,6 +45,34 @@ enum rdi_conf {
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RDI_GET_PORT_LINK,
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RDI_GET_TEMP,
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RDI_MIR_QUERY_LIST,
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RDI_MIR_PORT_QUERY_LIST,
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RDI_MIR_REMOVE,
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RDI_MIR_ADD,
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RDI_MIR_PORT_REMOVE,
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RDI_MIR_PORT_ADD,
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RDI_SET_PRIO,
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RDI_MIR_VLAN_ADD,
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RDI_ADD_VLAN_PROMISC,
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RDI_DEL_VLAN_PROMISC,
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RDI_GET_PORT_SPEED,
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RDI_GET_PORT_ETH_MODE,
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RDI_MCG_CREATE,
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RDI_MCG_GET_PORT,
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RDI_MCG_ADD_LISTENER,
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RDI_MCG_REMOVE,
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RDI_SET_PORT_PARSER,
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RDI_GET_PORT_PARSER,
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RDI_SET_RFRAME_UPDATE,
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RDI_GET_RFRAME_UPDATE,
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RDI_SET_TTL_UPDATE,
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RDI_GET_TTL_UPDATE,
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RDI_SET_SW_REMAIN,
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RDI_GET_SW_REMAIN,
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RDI_READ_PHY=100,
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RDI_WRITE_PHY,
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RDI_CPLD_READ,
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@ -57,10 +85,28 @@ enum rdi_conf {
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RDI_SET_GPIO,
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RDI_GET_REG,
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RDI_SET_REG,
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RDI_TEMP_READ,
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RDI_TEMP_WRITE,
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RDI_SET_PRBS,
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RDI_GET_PORT_STATE,
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RDI_SET_LOOPBACK,
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RDI_TEMP1_READ,
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RDI_TEMP1_WRITE,
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RDI_FCI_READ,
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RDI_FCI_WRITE,
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RDI_FCI_RX_READ,
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RDI_FCI_RX_WRITE,
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RDI_GET_VLAN_STAT=200,
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RDI_GET_STAT,
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RDI_GET_PRIO_STAT,
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RDI_RESET_STAT,
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RDI_GET_POWER,
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} ;
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|
@ -69,7 +115,7 @@ enum rdi_action {
|
|||
RDI_ACT_PERMIT=0,
|
||||
RDI_ACT_DROP=1,
|
||||
RDI_ACT_TRAP, //2
|
||||
RDI_ACI_MIRROR, //3
|
||||
RDI_ACT_MIRROR, //3
|
||||
RDI_ACT_LOG, //4
|
||||
RDI_ACT_COUNT, //5
|
||||
RDI_ACT_NOTIFY, //6
|
||||
|
@ -130,13 +176,12 @@ typedef struct rdi_mem {
|
|||
int vlan_mask;
|
||||
int vlan_max;
|
||||
int mirror_port;
|
||||
|
||||
int mpls_type;
|
||||
int mpls_label;
|
||||
short mpls_exp_bits;
|
||||
short mpls_s_bit;
|
||||
int mpls_label_mask;
|
||||
short mpls_exp_bits_mask;
|
||||
short mpls_s_bit_mask;
|
||||
|
||||
uint64_t mpls_header;
|
||||
uint64_t mpls_header_mask;
|
||||
|
||||
int ether_type;
|
||||
rdi_udf_t rdi_udf;
|
||||
rdi_mac_t src_mac;
|
||||
|
@ -159,7 +204,7 @@ typedef struct rdi_query_rule {
|
|||
|
||||
typedef struct rdi_id_list {
|
||||
unsigned int rule_num;
|
||||
unsigned char id_list[2048];
|
||||
unsigned short id_list[4096];
|
||||
} rdi_id_list_t;
|
||||
|
||||
|
||||
|
@ -288,6 +333,11 @@ typedef struct rdif_stat_cnt {
|
|||
unsigned long long cntStatsDropCountRx;
|
||||
} rdif_stat_cnt_t;
|
||||
|
||||
typedef struct rdif_prio_stat_cnt {
|
||||
unsigned long long cntRxPriorityPkts[16];
|
||||
} rdif_prio_stat_cnt_t;
|
||||
|
||||
|
||||
typedef struct _rdi_hashRotationValue {
|
||||
/** The shift amount in the operation is one plus this value. */
|
||||
unsigned char exponent;
|
||||
|
@ -549,6 +599,7 @@ typedef struct rdi_l3_hash {
|
|||
typedef union rdi_stat_cnt {
|
||||
rdib_stat_cnt_t rdib;
|
||||
rdif_stat_cnt_t rdif;
|
||||
rdif_prio_stat_cnt_t prio_rdif;
|
||||
}rdi_stat_cnt_t;
|
||||
|
||||
|
||||
|
@ -623,7 +674,7 @@ typedef struct if_rdi {
|
|||
|
||||
typedef struct rdi_lbg_list {
|
||||
int num;
|
||||
int list[16];
|
||||
int list[32];
|
||||
} rdi_lbg_list_t;
|
||||
|
||||
|
||||
|
@ -645,7 +696,7 @@ typedef struct if_rdi_lbg {
|
|||
|
||||
typedef struct rdi_bp_data_list {
|
||||
unsigned int num;
|
||||
unsigned char list[2048];
|
||||
unsigned char list[4096];
|
||||
} rdi_bp_data_t;
|
||||
|
||||
typedef struct rdi_bp_query_data {
|
||||
|
@ -671,7 +722,146 @@ typedef struct if_rdi_mask {
|
|||
unsigned int rdi_cmd;
|
||||
unsigned int unit;
|
||||
rdi_mask_t mask;
|
||||
} if_rdi_mask_t;
|
||||
} if_rdi_mask_t;
|
||||
|
||||
#define RDI_ETH_MODE_ENABLED_BIT_MASK 0x010000
|
||||
#define RDI_ETH_MODE_4_LANE_BIT_MASK 0x020000
|
||||
#define RDI_ETH_MODE_40G_BIT_MASK 0x040000
|
||||
#define RDI_ETH_MODE_100G_BIT_MASK 0x080000
|
||||
#define RDI_ETH_MODE_LR_BIT_MASK 0x100000
|
||||
#define RDI_ETH_MODE_MULTI_LANE_MASK ( RDI_ETH_MODE_4_LANE_BIT_MASK )
|
||||
|
||||
enum rdi_eth_mode
|
||||
{
|
||||
/** Port is disabled on the specified MAC. No lanes will be used.
|
||||
* A port must be put in this state when another port sharing the
|
||||
* same MAC is using a 4-lane mode. This is the default value
|
||||
* for the ''RDI_PORT_ETHERNET_INTERFACE_MODE'' attribute. */
|
||||
RDI_ETH_MODE_DISABLED = 0,
|
||||
|
||||
/**************************************************
|
||||
* Non-40G, 1-lane modes
|
||||
**************************************************/
|
||||
|
||||
/** SGMII: 1G, 1 lane, 8b/10b encoding. */
|
||||
RDI_ETH_MODE_SGMII = RDI_ETH_MODE_ENABLED_BIT_MASK,
|
||||
|
||||
/** 1000BASE-X: 1G, 1 lane, 8b/10b encoding. */
|
||||
RDI_ETH_MODE_1000BASE_X,
|
||||
|
||||
/** 1000BASE-KX: 1G, 1 lane, 8b/10b encoding. */
|
||||
RDI_ETH_MODE_1000BASE_KX,
|
||||
|
||||
/** 2500BASE-X: 1G, 1 lane, 8b/10b encoding.
|
||||
* This is experimental and to be used for internal purposes only. */
|
||||
RDI_ETH_MODE_2500BASE_X,
|
||||
|
||||
/** 6GBASE-KR: 6G, 1 lane, 64b/66b encoding.
|
||||
* This is experimental and to be used for internal purposes only. */
|
||||
RDI_ETH_MODE_6GBASE_KR,
|
||||
|
||||
/** 6GBASE-CR: 6G, 1 lane, 64b/66b encoding.
|
||||
* This is experimental and to be used for internal purposes only. */
|
||||
RDI_ETH_MODE_6GBASE_CR,
|
||||
|
||||
/** 10GBASE-KR: 10G, 1 lane, 64b/66b encoding.
|
||||
* This mode is read-only, i.e., it can be set only through Clause-73
|
||||
* autonegotiation. */
|
||||
RDI_ETH_MODE_10GBASE_KR,
|
||||
|
||||
/** 10GBASE-CR (SFP+): 10G, 1 lane, 64b/66b encoding. */
|
||||
RDI_ETH_MODE_10GBASE_CR,
|
||||
|
||||
/** 10GBASE-SR (SFP+, SFI): 10G, 1 lane, 64b/66b encoding. */
|
||||
RDI_ETH_MODE_10GBASE_SR,
|
||||
|
||||
/** 25GBASE-SR (SFP+, SFI): 25G, 1 lane, 64/66b encoding. */
|
||||
RDI_ETH_MODE_25GBASE_SR,
|
||||
|
||||
/** 25GBASE-KR: 25G, 1 lane, 64/66b encoding.
|
||||
* This mode is read-only, i.e., it can be set only through Clause-73
|
||||
* autonegotiation. */
|
||||
RDI_ETH_MODE_25GBASE_KR
|
||||
,
|
||||
/** 25GBASE-CR: 25G, 1 lane, 64/66b encoding.
|
||||
* This mode is read-only, i.e., it can be set only through Clause-73
|
||||
* autonegotiation. */
|
||||
RDI_ETH_MODE_25GBASE_CR,
|
||||
|
||||
/** AN-73: Auto-negotiation Clause 73. */
|
||||
RDI_ETH_MODE_AN_73,
|
||||
|
||||
|
||||
/**************************************************
|
||||
* Non-40G, 4-lane modes
|
||||
**************************************************/
|
||||
|
||||
/** XAUI: 10G, 4 lanes, 8b/10b encoding.
|
||||
* \lb\lb
|
||||
* Note: After configuring this mode on the second port (P1) of the
|
||||
* set of four ports sharing a MAC, before setting the port to another
|
||||
* mode, you must first set the mode to ''RDI_ETH_MODE_DISABLED''. */
|
||||
RDI_ETH_MODE_XAUI = (RDI_ETH_MODE_4_LANE_BIT_MASK |
|
||||
RDI_ETH_MODE_ENABLED_BIT_MASK),
|
||||
|
||||
/** 10GBASE-KX4: 10G, 4 lanes, 8b/10b encoding. */
|
||||
RDI_ETH_MODE_10GBASE_KX4,
|
||||
|
||||
/** 10GBASE-CX4: 10G, 4 lanes, 8b/10b encoding. */
|
||||
RDI_ETH_MODE_10GBASE_CX4,
|
||||
|
||||
/**************************************************
|
||||
* 40G, 4-lane modes (treat 24GBASE as 40G)
|
||||
**************************************************/
|
||||
|
||||
/** 24GBASE-KR4: 24G, 4 lanes, 64b/66b encoding.
|
||||
* This is experimental and to be used for internal purposes only. */
|
||||
RDI_ETH_MODE_24GBASE_KR4 = (RDI_ETH_MODE_40G_BIT_MASK |
|
||||
RDI_ETH_MODE_4_LANE_BIT_MASK |
|
||||
RDI_ETH_MODE_ENABLED_BIT_MASK),
|
||||
|
||||
/** 24GBASE-CR4: 24G, 4 lanes, 64b/66b encoding.
|
||||
* This is experimental and to be used for internal purposes only. */
|
||||
RDI_ETH_MODE_24GBASE_CR4,
|
||||
|
||||
/** 40GBASE-KR4: 40G, 4 lane, 64b/66b encoding.
|
||||
* This mode is read-only, i.e., it can be set only through Clause-73
|
||||
* autonegotiation. */
|
||||
RDI_ETH_MODE_40GBASE_KR4,
|
||||
|
||||
/** XLAUI: 40G, 4 lane, 64b/66b encoding. */
|
||||
RDI_ETH_MODE_XLAUI,
|
||||
|
||||
/** 40GBASE-CR4 (QSFP 5M Direct Attach): 40G, 4 lane, 64b/66b encoding.
|
||||
* This mode is read-only, i.e., it can be set only through Clause-73
|
||||
* autonegotiation. */
|
||||
RDI_ETH_MODE_40GBASE_CR4,
|
||||
|
||||
/** 40GBASE-SR4 (QSFP PMD Service Interface): 40G, 4 lane, 64b/66b
|
||||
* encoding. */
|
||||
RDI_ETH_MODE_40GBASE_SR4,
|
||||
|
||||
/** 100GBASE-SR4 (QSFP PMD Service Interface): 100G, 4 lane, 64b/66b
|
||||
* encoding. */
|
||||
RDI_ETH_MODE_100GBASE_SR4 = ( RDI_ETH_MODE_100G_BIT_MASK |
|
||||
RDI_ETH_MODE_4_LANE_BIT_MASK |
|
||||
RDI_ETH_MODE_ENABLED_BIT_MASK ),
|
||||
|
||||
/** 40GBASE-CR4: 100G, 4 lanes, 64b/66b encoding. This mode is read-only,
|
||||
* i.e., it can be set only through Clause-73 autonegotiation. */
|
||||
RDI_ETH_MODE_100GBASE_CR4,
|
||||
|
||||
|
||||
/** 40GBASE-KR4: 100G, 4 lanes, 64b/66b encoding. This mode is read-only,
|
||||
* i.e., it can be set only through Clause-73 autonegotiation. */
|
||||
RDI_ETH_MODE_100GBASE_KR4,
|
||||
|
||||
RDI_ETH_MODE_40GBASE_LR4 = (RDI_ETH_MODE_40GBASE_SR4 | RDI_ETH_MODE_LR_BIT_MASK),
|
||||
|
||||
RDI_ETH_MODE_100GBASE_LR4 = (RDI_ETH_MODE_100GBASE_SR4 | RDI_ETH_MODE_LR_BIT_MASK),
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
||||
|
||||
|
@ -705,6 +895,8 @@ int rdi_get_rule_counters(int unit, int rule_id, int group, void *val, rdi_type_
|
|||
int rdi_entry_query_list(int unit, int group, rdi_query_list_t *rdi_query_list, rdi_type_t rdi_type);
|
||||
int rdi_get_vlan_stat(int unit, int port, rdi_vlan_stat_cnt_t *rdi_vlan_stat_cnt, rdi_type_t rdi_type);
|
||||
int rdi_get_stat(int unit, int port, rdi_stat_cnt_t *val, rdi_type_t rdi_type);
|
||||
int rdi_get_prio_stat(int unit, int port, rdi_stat_cnt_t *val, rdi_type_t rdi_type);
|
||||
int rdi_reset_stat(int unit, int port, rdi_type_t rdi_type);
|
||||
int rdi_get_rule_stat(int unit, int rule_id, int group, rdi_rule_stat_cnt_t *rdi_rule_stat_cnt, rdi_type_t rdi_type);
|
||||
int rdi_read_phy(int unit, int phy_addr, int dev, int addr, rdi_type_t rdi_type);
|
||||
int rdi_write_phy(int unit, int phy_addr, int dev, int addr, int val, rdi_type_t rdi_type);
|
||||
|
@ -712,9 +904,15 @@ int rdi_write_phy(int unit, int phy_addr, int dev, int addr, int val, rdi_type_t
|
|||
int rdi_get_gpio_dir(int unit, int gpio, rdi_type_t rdi_type);
|
||||
int rdi_set_gpio_dir(int unit, int gpio, int dir, int val, rdi_type_t rdi_type);
|
||||
|
||||
int rdi_set_prbs(int unit, int prbs, int dir, int port, rdi_type_t rdi_type);
|
||||
|
||||
|
||||
int rdi_get_gpio(int unit, int gpio, rdi_type_t rdi_type);
|
||||
int rdi_set_gpio(int unit, int gpio, int val, rdi_type_t rdi_type);
|
||||
|
||||
int rdi_set_loopback(int unit, int val, int port, rdi_type_t rdi_type);
|
||||
|
||||
|
||||
int rdi_get_reg(int unit, unsigned int addr, unsigned int *val, rdi_type_t rdi_type);
|
||||
int rdi_set_reg(int unit, unsigned int addr, unsigned int val, rdi_type_t rdi_type);
|
||||
|
||||
|
@ -742,15 +940,63 @@ int rdi_get_l3_hash(int unit, rdi_l3_hash_t *l3_hash, rdi_type_t rdi_type);
|
|||
int rdi_lbg_query_entry_list(int unit, struct rdi_lbg_query_list *rdi_lbg_query_list, rdi_type_t rdi_type);
|
||||
int rdi_lbg_port_query_entry_list(int unit, int lbg, rdi_lbg_query_list_t *rdi_lbg_query_list, rdi_type_t rdi_type);
|
||||
int rdi_lbg_remove(int unit, int lbg, rdi_type_t rdi_type);
|
||||
int rdi_lbg_add(int unit, int *lbg, rdi_type_t rdi_type);
|
||||
int rdi_lbg_add_fn(int unit, int *lbg, rdi_lbg_list_t *rdi_lbg_list, rdi_type_t rdi_type);
|
||||
int rdi_lbg_port_remove(int unit, int lbg, int port, rdi_type_t rdi_type);
|
||||
int rdi_lbg_port_add(int unit, int lbg, int port, rdi_type_t rdi_type);
|
||||
|
||||
int rdi_mir_query_entry_list(int unit, struct rdi_lbg_query_list *rdi_lbg_query_list, rdi_type_t rdi_type);
|
||||
int rdi_mir_port_query_entry_list(int unit, int lbg, rdi_lbg_query_list_t *rdi_lbg_query_list, rdi_type_t rdi_type);
|
||||
int rdi_mir_remove(int unit, int lbg, rdi_type_t rdi_type);
|
||||
int rdi_mir_add_fn(int unit, int lbg, rdi_lbg_list_t *rdi_lbg_list, rdi_type_t rdi_type);
|
||||
int rdi_mir_port_remove(int unit, int lbg, int port, rdi_type_t rdi_type);
|
||||
int rdi_mir_port_add(int unit, int lbg, int port, rdi_type_t rdi_type);
|
||||
int rdi_mir_vlan_add(int unit, int lbg, int vlan_id, rdi_type_t rdi_type);
|
||||
int rdi_add_vlan_promisc(int unit, int port, rdi_type_t rdi_type);
|
||||
int rdi_del_vlan_promisc(int unit, int port, rdi_type_t rdi_type);
|
||||
|
||||
int rdi_mcg_create(int unit, rdi_type_t rdi_type);
|
||||
int rdi_mcg_get_port(int unit, int mcg, rdi_type_t rdi_type);
|
||||
int rdi_mcg_add_listener(int unit, int mcg, int port, int vlan, rdi_type_t type);
|
||||
int rdi_mcg_remove(int unit, int mcg, rdi_type_t rdi_type);
|
||||
|
||||
int rdi_get_rframe_update(int unit, int port, rdi_type_t rdi_type);
|
||||
int rdi_set_rframe_update(int unit, int port, int val, rdi_type_t rdi_type);
|
||||
|
||||
int rdi_get_ttl_update(int unit, int port, rdi_type_t rdi_type);
|
||||
int rdi_set_ttl_update(int unit, int port, int val, rdi_type_t rdi_type);
|
||||
|
||||
int rdi_get_port_parser(int unit, int port, rdi_type_t rdi_type);
|
||||
int rdi_set_port_parser(int unit, int port, int val, rdi_type_t rdi_type);
|
||||
|
||||
int rdi_get_port_link(int unit, int port, rdi_type_t rdi_type);
|
||||
int rdi_get_port_speed(int unit, int port, rdi_type_t rdi_type);
|
||||
|
||||
int rdi_get_eth_mode(int unit, int port, rdi_type_t rdi_type);
|
||||
|
||||
int rdi_get_port_state(int unit, int port, int *mode, int *state, int *info, rdi_type_t rdi_type);
|
||||
|
||||
|
||||
int rdi_bp_read(int unit,int dev, rdi_bp_query_data_t *rdi_bp_query_data, rdi_type_t rdi_type);
|
||||
int rdi_bp_write(int unit,int dev, rdi_bp_query_data_t *rdi_bp_query_data, rdi_type_t rdi_type);
|
||||
|
||||
int rdi_fci_read(int unit, int fci_num, int offset, int page, rdi_bp_query_data_t *rdi_bp_query_data,
|
||||
rdi_type_t rdi_type);
|
||||
int rdi_fci_write(int unit, int fci_num, int offset, int page, rdi_bp_query_data_t *rdi_bp_query_data,
|
||||
rdi_type_t rdi_type);
|
||||
|
||||
int rdi_fci_rx_read(int unit, int fci_num, int offset, int page, rdi_bp_query_data_t *rdi_bp_query_data,
|
||||
rdi_type_t rdi_type);
|
||||
int rdi_fci_rx_write(int unit, int fci_num, int offset, int page, rdi_bp_query_data_t *rdi_bp_query_data,
|
||||
rdi_type_t rdi_type);
|
||||
|
||||
int rdi_temp_read(int unit,int dev, rdi_bp_query_data_t *rdi_bp_query_data, rdi_type_t rdi_type);
|
||||
int rdi_temp_write(int unit,int dev, rdi_bp_query_data_t *rdi_bp_query_data, rdi_type_t rdi_type);
|
||||
|
||||
int rdi_temp1_read(int unit,int dev, rdi_bp_query_data_t *rdi_bp_query_data, rdi_type_t rdi_type);
|
||||
int rdi_temp1_write(int unit,int dev, rdi_bp_query_data_t *rdi_bp_query_data, rdi_type_t rdi_type);
|
||||
|
||||
int rdi_get_sw_remain(rdi_type_t rdi_type);
|
||||
int rdi_set_sw_remain(int val, rdi_type_t rdi_type);
|
||||
|
||||
|
||||
#endif /* _RDD_LIB_H_ */
|
||||
|
|
812
lib/librdi.c
812
lib/librdi.c
|
@ -12,6 +12,7 @@
|
|||
/* librdi.c */
|
||||
/* */
|
||||
/******************************************************************************/
|
||||
#include <unistd.h>
|
||||
#include <stdio.h>
|
||||
#include <stdlib.h>
|
||||
#include <errno.h>
|
||||
|
@ -20,6 +21,20 @@
|
|||
#include <sys/socket.h>
|
||||
#include <sys/un.h>
|
||||
#include <unistd.h>
|
||||
#include <netinet/in.h>
|
||||
#include <arpa/inet.h>
|
||||
#include <sys/stat.h>
|
||||
#include <fcntl.h>
|
||||
#include <ctype.h>
|
||||
#include <byteswap.h>
|
||||
|
||||
#include <time.h>
|
||||
#include <sys/syslog.h>
|
||||
#include <signal.h>
|
||||
#include <net/if.h>
|
||||
|
||||
#include <sys/socket.h>
|
||||
|
||||
#include "../include/librdi.h"
|
||||
|
||||
|
||||
|
@ -165,6 +180,7 @@ static int send_cmd_query_list(if_rdi_t *if_rdi, struct rdi_query_list *rdi_quer
|
|||
return -1;
|
||||
}
|
||||
|
||||
|
||||
if (send(s, if_rdi, sizeof(if_rdi_t), 0) == -1) {
|
||||
perror("librdi send");
|
||||
close(s);
|
||||
|
@ -181,6 +197,45 @@ static int send_cmd_query_list(if_rdi_t *if_rdi, struct rdi_query_list *rdi_quer
|
|||
|
||||
}
|
||||
|
||||
|
||||
static int send_cmd_query_data(if_rdi_t *if_rdi, rdi_bp_query_data_t *rdi_query_list,rdi_type_t rdi_type){
|
||||
int s, t, len;
|
||||
struct sockaddr_un remote;
|
||||
|
||||
|
||||
if ((s = socket(AF_UNIX, SOCK_STREAM, 0)) == -1) {
|
||||
perror("librdi socket");
|
||||
return -1;
|
||||
}
|
||||
remote.sun_family = AF_UNIX;
|
||||
if (rdi_type==RDI_FLCM_DEV)
|
||||
strcpy(remote.sun_path, RDIF_SOCK_PATH);
|
||||
else
|
||||
strcpy(remote.sun_path, RDI_SOCK_PATH);
|
||||
len = strlen(remote.sun_path) + sizeof(remote.sun_family);
|
||||
if (connect(s, (struct sockaddr *)&remote, len) == -1) {
|
||||
perror("librdi connect");
|
||||
close(s);
|
||||
return -1;
|
||||
}
|
||||
|
||||
|
||||
if (send(s, if_rdi, sizeof(if_rdi_t), 0) == -1) {
|
||||
perror("librdi send");
|
||||
close(s);
|
||||
return -1;
|
||||
|
||||
}
|
||||
if ((t=recv(s, rdi_query_list, sizeof(rdi_bp_query_data_t), 0)) < 0) {
|
||||
perror("librdi recv");
|
||||
close(s);
|
||||
return -1;
|
||||
}
|
||||
close(s);
|
||||
return 0;
|
||||
|
||||
}
|
||||
|
||||
static int send_cmd_lbg_query_list(if_rdi_t *if_rdi, struct rdi_lbg_query_list *rdi_lbg_query_list,rdi_type_t rdi_type){
|
||||
int s, t, len;
|
||||
struct sockaddr_un remote;
|
||||
|
@ -255,17 +310,35 @@ int rdi_get_cfg(int unit, rdi_type_t rdi_type){
|
|||
}
|
||||
|
||||
int rdi_get_temp(int unit, rdi_type_t rdi_type){
|
||||
int ret=0;
|
||||
unsigned int val;
|
||||
unsigned int subdevice;
|
||||
unsigned int dev_addr=0;
|
||||
rdi_bp_query_data_t rdi_bp_query_data;
|
||||
|
||||
if_rdi_t if_rdi;
|
||||
int ret=0;
|
||||
memset(&if_rdi,0,sizeof(if_rdi_t));
|
||||
return -1;
|
||||
|
||||
if_rdi.rdi_cmd=RDI_GET_TEMP;
|
||||
if_rdi.unit=unit;
|
||||
memset(&rdi_bp_query_data, 0, sizeof(rdi_bp_query_data_t));
|
||||
|
||||
if (!(send_cmd(&if_rdi, &ret, sizeof(ret) , rdi_type)))
|
||||
return ret;
|
||||
return -1;
|
||||
if ((ret = rdi_get_reg(unit, 0x12000b, (unsigned int *)&val, RDI_FLCM_DEV))<0) {
|
||||
return -1;
|
||||
}
|
||||
subdevice = (val >> 16) & 0xffff;
|
||||
if(((subdevice & 0xff0) == 0x01B0) ||
|
||||
(subdevice == 0))
|
||||
dev_addr = 0x2c;
|
||||
else
|
||||
dev_addr = 0x2e;
|
||||
|
||||
if (!rdi_type)
|
||||
rdi_type=RDI_FLCM_DEV;
|
||||
|
||||
rdi_bp_query_data.data.num = 1;
|
||||
|
||||
if ((rdi_temp_read(unit, dev_addr, &rdi_bp_query_data, rdi_type))<0)
|
||||
return -1;
|
||||
else
|
||||
return rdi_bp_query_data.data.list[0];
|
||||
|
||||
}
|
||||
|
||||
|
@ -286,6 +359,71 @@ int rdi_get_port_link(int unit, int port, rdi_type_t rdi_type){
|
|||
|
||||
}
|
||||
|
||||
int rdi_get_port_speed(int unit, int port, rdi_type_t rdi_type){
|
||||
|
||||
if_rdi_t if_rdi;
|
||||
int ret=0;
|
||||
memset(&if_rdi,0,sizeof(if_rdi_t));
|
||||
|
||||
if_rdi.rdi_cmd=RDI_GET_PORT_SPEED;
|
||||
if_rdi.unit=unit;
|
||||
if_rdi.port=port;
|
||||
|
||||
if (!(send_cmd(&if_rdi, &ret, sizeof(ret) , rdi_type)))
|
||||
return ret;
|
||||
return -1;
|
||||
|
||||
}
|
||||
|
||||
int rdi_get_eth_mode(int unit, int port, rdi_type_t rdi_type){
|
||||
|
||||
if_rdi_t if_rdi;
|
||||
int ret=0;
|
||||
memset(&if_rdi,0,sizeof(if_rdi_t));
|
||||
|
||||
if_rdi.rdi_cmd=RDI_GET_PORT_ETH_MODE;
|
||||
if_rdi.unit=unit;
|
||||
if_rdi.port=port;
|
||||
|
||||
if (!(send_cmd(&if_rdi, &ret, sizeof(ret) , rdi_type)))
|
||||
return ret;
|
||||
return -1;
|
||||
|
||||
}
|
||||
|
||||
|
||||
int rdi_add_vlan_promisc(int unit, int port, rdi_type_t rdi_type){
|
||||
|
||||
if_rdi_t if_rdi;
|
||||
int ret=0;
|
||||
memset(&if_rdi,0,sizeof(if_rdi_t));
|
||||
|
||||
if_rdi.rdi_cmd=RDI_ADD_VLAN_PROMISC;
|
||||
if_rdi.unit=unit;
|
||||
if_rdi.port=port;
|
||||
|
||||
if (!(send_cmd(&if_rdi, &ret, sizeof(ret) , rdi_type)))
|
||||
return ret;
|
||||
return -1;
|
||||
|
||||
}
|
||||
|
||||
int rdi_del_vlan_promisc(int unit, int port, rdi_type_t rdi_type){
|
||||
|
||||
if_rdi_t if_rdi;
|
||||
int ret=0;
|
||||
memset(&if_rdi,0,sizeof(if_rdi_t));
|
||||
|
||||
if_rdi.rdi_cmd=RDI_DEL_VLAN_PROMISC;
|
||||
if_rdi.unit=unit;
|
||||
if_rdi.port=port;
|
||||
|
||||
if (!(send_cmd(&if_rdi, &ret, sizeof(ret) , rdi_type)))
|
||||
return ret;
|
||||
return -1;
|
||||
|
||||
}
|
||||
|
||||
|
||||
int rdi_install_rules(int unit, rdi_type_t rdi_type){
|
||||
|
||||
|
@ -512,6 +650,53 @@ int rdi_lbg_query_entry_list(int unit, rdi_lbg_query_list_t *rdi_lbg_query_list,
|
|||
|
||||
}
|
||||
|
||||
int rdi_mir_query_entry_list(int unit, rdi_lbg_query_list_t *rdi_lbg_query_list, rdi_type_t rdi_type){
|
||||
if_rdi_t if_rdi;
|
||||
if_rdi_lbg_t *if_rdi_lbg;
|
||||
memset(&if_rdi,0,sizeof(if_rdi_t));
|
||||
if_rdi_lbg=(if_rdi_lbg_t *)&if_rdi;
|
||||
|
||||
|
||||
if_rdi.rdi_cmd=RDI_MIR_QUERY_LIST;
|
||||
if_rdi_lbg->unit=unit;
|
||||
|
||||
if (!rdi_lbg_query_list)
|
||||
return -1;
|
||||
|
||||
if (!(send_cmd_lbg_query_list(&if_rdi, rdi_lbg_query_list, rdi_type))) {
|
||||
|
||||
return rdi_lbg_query_list->ret;
|
||||
} else return -1;
|
||||
|
||||
}
|
||||
|
||||
int rdi_get_port_state(int unit, int port, int *mode, int *state, int *info, rdi_type_t rdi_type){
|
||||
if_rdi_t if_rdi;
|
||||
if_rdi_lbg_t *if_rdi_lbg;
|
||||
rdi_lbg_query_list_t rdi_lbg_query_list;
|
||||
|
||||
memset(&if_rdi,0,sizeof(if_rdi_t));
|
||||
memset(&rdi_lbg_query_list,0,sizeof(rdi_lbg_query_list_t));
|
||||
if_rdi_lbg = (if_rdi_lbg_t *)&if_rdi;
|
||||
|
||||
if_rdi.rdi_cmd = RDI_GET_PORT_STATE;
|
||||
if_rdi_lbg->unit = unit;
|
||||
if_rdi_lbg->lbg = port;
|
||||
|
||||
if (!(send_cmd_lbg_query_list(&if_rdi, &rdi_lbg_query_list, rdi_type))) {
|
||||
|
||||
*mode = rdi_lbg_query_list.rdi_lbg_list.list[0];
|
||||
*state = rdi_lbg_query_list.rdi_lbg_list.list[1];
|
||||
*info = rdi_lbg_query_list.rdi_lbg_list.list[2];
|
||||
*(info+1) = rdi_lbg_query_list.rdi_lbg_list.list[3];
|
||||
*(info+2) = rdi_lbg_query_list.rdi_lbg_list.list[4];
|
||||
*(info+3) = rdi_lbg_query_list.rdi_lbg_list.list[5];
|
||||
return rdi_lbg_query_list.ret;
|
||||
} else return -1;
|
||||
|
||||
}
|
||||
|
||||
|
||||
|
||||
int rdi_bp_read(int unit, int dev, rdi_bp_query_data_t *rdi_bp_query_data, rdi_type_t rdi_type){
|
||||
if_rdi_t if_rdi;
|
||||
|
@ -530,7 +715,7 @@ int rdi_bp_read(int unit, int dev, rdi_bp_query_data_t *rdi_bp_query_data, rdi_t
|
|||
|
||||
memcpy(&if_rdi.rdi_query_list, rdi_bp_query_data, sizeof(rdi_bp_query_data_t));
|
||||
|
||||
if (!(send_cmd_query_list(&if_rdi, (struct rdi_query_list *) rdi_bp_query_data, rdi_type))) {
|
||||
if (!(send_cmd_query_data(&if_rdi, rdi_bp_query_data, rdi_type))) {
|
||||
|
||||
return rdi_bp_query_data->ret;
|
||||
} else return -1;
|
||||
|
@ -551,13 +736,188 @@ int rdi_bp_write(int unit,int dev, rdi_bp_query_data_t *rdi_bp_query_data, rdi_t
|
|||
return -1;
|
||||
|
||||
memcpy(&if_rdi.rdi_query_list, rdi_bp_query_data, sizeof(rdi_bp_query_data_t));
|
||||
if (!(send_cmd_query_list(&if_rdi, (struct rdi_query_list *) rdi_bp_query_data, rdi_type))) {
|
||||
if (!(send_cmd_query_data(&if_rdi, rdi_bp_query_data, rdi_type))) {
|
||||
|
||||
return rdi_bp_query_data->ret;
|
||||
} else return -1;
|
||||
|
||||
}
|
||||
|
||||
int rdi_fci_read(int unit, int dev, int offset, int page, rdi_bp_query_data_t *rdi_bp_query_data, rdi_type_t rdi_type){
|
||||
if_rdi_t if_rdi;
|
||||
|
||||
memset(&if_rdi,0,sizeof(if_rdi_t));
|
||||
|
||||
if_rdi.rdi_cmd = RDI_FCI_READ;
|
||||
if_rdi.unit = unit;
|
||||
if_rdi.phy_addr = dev;
|
||||
if_rdi.addr = offset;
|
||||
if_rdi.dev = page;
|
||||
|
||||
if (!rdi_bp_query_data)
|
||||
return -1;
|
||||
|
||||
memcpy(&if_rdi.rdi_query_list, rdi_bp_query_data, sizeof(rdi_bp_query_data_t));
|
||||
|
||||
if (!(send_cmd_query_data(&if_rdi, rdi_bp_query_data, rdi_type))) {
|
||||
|
||||
return rdi_bp_query_data->ret;
|
||||
} else return -1;
|
||||
|
||||
}
|
||||
|
||||
|
||||
int rdi_fci_write(int unit, int dev, int offset, int page, rdi_bp_query_data_t *rdi_bp_query_data, rdi_type_t rdi_type){
|
||||
if_rdi_t if_rdi;
|
||||
|
||||
memset(&if_rdi,0,sizeof(if_rdi_t));
|
||||
|
||||
if_rdi.rdi_cmd = RDI_FCI_WRITE;
|
||||
if_rdi.unit = unit;
|
||||
if_rdi.phy_addr = dev;
|
||||
if_rdi.addr = offset;
|
||||
if_rdi.dev = page;
|
||||
|
||||
if (!rdi_bp_query_data)
|
||||
return -1;
|
||||
|
||||
memcpy(&if_rdi.rdi_query_list, rdi_bp_query_data, sizeof(rdi_bp_query_data_t));
|
||||
if (!(send_cmd_query_data(&if_rdi, rdi_bp_query_data, rdi_type))) {
|
||||
|
||||
return rdi_bp_query_data->ret;
|
||||
} else return -1;
|
||||
|
||||
}
|
||||
|
||||
int rdi_fci_rx_read(int unit, int dev, int offset, int page, rdi_bp_query_data_t *rdi_bp_query_data, rdi_type_t rdi_type){
|
||||
if_rdi_t if_rdi;
|
||||
|
||||
memset(&if_rdi,0,sizeof(if_rdi_t));
|
||||
|
||||
if_rdi.rdi_cmd = RDI_FCI_RX_READ;
|
||||
if_rdi.unit = unit;
|
||||
if_rdi.phy_addr = dev;
|
||||
if_rdi.addr = offset;
|
||||
if_rdi.dev = page;
|
||||
|
||||
if (!rdi_bp_query_data)
|
||||
return -1;
|
||||
|
||||
memcpy(&if_rdi.rdi_query_list, rdi_bp_query_data, sizeof(rdi_bp_query_data_t));
|
||||
|
||||
if (!(send_cmd_query_data(&if_rdi, rdi_bp_query_data, rdi_type))) {
|
||||
|
||||
return rdi_bp_query_data->ret;
|
||||
} else return -1;
|
||||
|
||||
}
|
||||
|
||||
|
||||
int rdi_fci_rx_write(int unit, int dev, int offset, int page, rdi_bp_query_data_t *rdi_bp_query_data, rdi_type_t rdi_type){
|
||||
if_rdi_t if_rdi;
|
||||
|
||||
memset(&if_rdi,0,sizeof(if_rdi_t));
|
||||
|
||||
if_rdi.rdi_cmd = RDI_FCI_RX_WRITE;
|
||||
if_rdi.unit = unit;
|
||||
if_rdi.phy_addr = dev;
|
||||
if_rdi.addr = offset;
|
||||
if_rdi.dev = page;
|
||||
|
||||
if (!rdi_bp_query_data)
|
||||
return -1;
|
||||
|
||||
memcpy(&if_rdi.rdi_query_list, rdi_bp_query_data, sizeof(rdi_bp_query_data_t));
|
||||
if (!(send_cmd_query_data(&if_rdi, rdi_bp_query_data, rdi_type))) {
|
||||
|
||||
return rdi_bp_query_data->ret;
|
||||
} else return -1;
|
||||
|
||||
}
|
||||
|
||||
|
||||
|
||||
int rdi_temp_read(int unit, int dev, rdi_bp_query_data_t *rdi_bp_query_data, rdi_type_t rdi_type){
|
||||
if_rdi_t if_rdi;
|
||||
|
||||
memset(&if_rdi,0,sizeof(if_rdi_t));
|
||||
|
||||
if_rdi.rdi_cmd=RDI_TEMP_READ;
|
||||
if_rdi.unit=unit;
|
||||
if_rdi.dev=dev;
|
||||
|
||||
if (!rdi_bp_query_data)
|
||||
return -1;
|
||||
|
||||
memcpy(&if_rdi.rdi_query_list, rdi_bp_query_data, sizeof(rdi_bp_query_data_t));
|
||||
|
||||
if (!(send_cmd_query_data(&if_rdi, rdi_bp_query_data, rdi_type)))
|
||||
return rdi_bp_query_data->ret;
|
||||
else
|
||||
return -1;
|
||||
}
|
||||
|
||||
|
||||
int rdi_temp_write(int unit,int dev, rdi_bp_query_data_t *rdi_bp_query_data, rdi_type_t rdi_type){
|
||||
if_rdi_t if_rdi;
|
||||
|
||||
memset(&if_rdi,0,sizeof(if_rdi_t));
|
||||
|
||||
if_rdi.rdi_cmd=RDI_TEMP_WRITE;
|
||||
if_rdi.unit=unit;
|
||||
if_rdi.dev=dev;
|
||||
|
||||
if (!rdi_bp_query_data)
|
||||
return -1;
|
||||
memcpy(&if_rdi.rdi_query_list, rdi_bp_query_data, sizeof(rdi_bp_query_data_t));
|
||||
if (!(send_cmd_query_data(&if_rdi, rdi_bp_query_data, rdi_type))) {
|
||||
|
||||
return rdi_bp_query_data->ret;
|
||||
} else return -1;
|
||||
|
||||
}
|
||||
|
||||
int rdi_temp1_read(int unit, int dev, rdi_bp_query_data_t *rdi_bp_query_data, rdi_type_t rdi_type){
|
||||
if_rdi_t if_rdi;
|
||||
|
||||
memset(&if_rdi,0,sizeof(if_rdi_t));
|
||||
|
||||
if_rdi.rdi_cmd=RDI_TEMP1_READ;
|
||||
if_rdi.unit=unit;
|
||||
if_rdi.dev=dev;
|
||||
|
||||
if (!rdi_bp_query_data)
|
||||
return -1;
|
||||
|
||||
memcpy(&if_rdi.rdi_query_list, rdi_bp_query_data, sizeof(rdi_bp_query_data_t));
|
||||
|
||||
if (!(send_cmd_query_data(&if_rdi, rdi_bp_query_data, rdi_type)))
|
||||
return rdi_bp_query_data->ret;
|
||||
else
|
||||
return -1;
|
||||
}
|
||||
|
||||
|
||||
int rdi_temp1_write(int unit,int dev, rdi_bp_query_data_t *rdi_bp_query_data, rdi_type_t rdi_type){
|
||||
if_rdi_t if_rdi;
|
||||
|
||||
memset(&if_rdi,0,sizeof(if_rdi_t));
|
||||
|
||||
if_rdi.rdi_cmd=RDI_TEMP1_WRITE;
|
||||
if_rdi.unit=unit;
|
||||
if_rdi.dev=dev;
|
||||
|
||||
if (!rdi_bp_query_data)
|
||||
return -1;
|
||||
memcpy(&if_rdi.rdi_query_list, rdi_bp_query_data, sizeof(rdi_bp_query_data_t));
|
||||
if (!(send_cmd_query_data(&if_rdi, rdi_bp_query_data, rdi_type))) {
|
||||
|
||||
return rdi_bp_query_data->ret;
|
||||
} else return -1;
|
||||
|
||||
}
|
||||
|
||||
|
||||
int rdi_lbg_port_query_entry_list(int unit, int lbg, rdi_lbg_query_list_t *rdi_lbg_query_list, rdi_type_t rdi_type){
|
||||
if_rdi_t if_rdi;
|
||||
if_rdi_lbg_t *if_rdi_lbg;
|
||||
|
@ -589,32 +949,34 @@ int rdi_lbg_remove(int unit, int lbg, rdi_type_t rdi_type){
|
|||
if_rdi_lbg=(if_rdi_lbg_t *)&if_rdi;
|
||||
if_rdi.rdi_cmd=RDI_LBG_REMOVE;
|
||||
if_rdi_lbg->lbg=lbg;
|
||||
if_rdi_lbg->unit = unit;
|
||||
|
||||
if (!(send_cmd(&if_rdi, &ret, sizeof(ret), rdi_type)))
|
||||
return ret;
|
||||
else return -1;
|
||||
|
||||
}
|
||||
int rdi_lbg_add_fn(int unit, int *lbg, rdi_lbg_list_t *rdi_lbg_list, rdi_type_t rdi_type)
|
||||
{
|
||||
int ret=0;
|
||||
if_rdi_lbg_t if_rdi_lbg;
|
||||
if_rdi_t *if_rdi = (if_rdi_t *)&if_rdi_lbg;
|
||||
memset(&if_rdi_lbg, 0, sizeof(if_rdi_lbg_t));
|
||||
|
||||
int rdi_lbg_add(int unit, int *lbg, rdi_type_t rdi_type){
|
||||
if_rdi_lbg.rdi_cmd = RDI_LBG_ADD;
|
||||
if_rdi_lbg.unit = unit;
|
||||
memcpy(&if_rdi_lbg.rdi_query_list.rdi_lbg_list, rdi_lbg_list, sizeof(rdi_lbg_list_t));
|
||||
|
||||
|
||||
if_rdi_t if_rdi;
|
||||
int ret=0;
|
||||
|
||||
memset(&if_rdi,0,sizeof(if_rdi_t));
|
||||
if_rdi.rdi_cmd=RDI_LBG_ADD;
|
||||
|
||||
if (!(send_cmd(&if_rdi, &ret, sizeof(ret), rdi_type))) {
|
||||
|
||||
if (ret<=0)
|
||||
if (!(send_cmd(if_rdi, &ret, sizeof(ret), rdi_type))) {
|
||||
|
||||
if (ret < 0)
|
||||
return -1;
|
||||
*lbg= ret;
|
||||
*lbg = ret;
|
||||
return 0;
|
||||
} else return -1;
|
||||
|
||||
}
|
||||
|
||||
|
||||
int rdi_lbg_port_remove(int unit, int lbg, int port, rdi_type_t rdi_type){
|
||||
|
||||
|
||||
|
@ -626,6 +988,7 @@ int rdi_lbg_port_remove(int unit, int lbg, int port, rdi_type_t rdi_type){
|
|||
if_rdi.rdi_cmd=RDI_LBG_PORT_REMOVE;
|
||||
if_rdi_lbg->lbg=lbg;
|
||||
if_rdi_lbg->port=port;
|
||||
if_rdi_lbg->unit=unit;
|
||||
|
||||
if (!(send_cmd(&if_rdi, &ret, sizeof(ret), rdi_type)))
|
||||
return ret;
|
||||
|
@ -645,6 +1008,7 @@ int rdi_lbg_port_add(int unit, int lbg, int port, rdi_type_t rdi_type){
|
|||
if_rdi.rdi_cmd=RDI_LBG_PORT_ADD;
|
||||
if_rdi_lbg->lbg=lbg;
|
||||
if_rdi_lbg->port=port;
|
||||
if_rdi_lbg->unit=unit;
|
||||
|
||||
if (!(send_cmd(&if_rdi, &ret, sizeof(ret), rdi_type))) {
|
||||
return ret;
|
||||
|
@ -652,9 +1016,307 @@ int rdi_lbg_port_add(int unit, int lbg, int port, rdi_type_t rdi_type){
|
|||
|
||||
}
|
||||
|
||||
int rdi_mir_port_query_entry_list(int unit, int lbg, rdi_lbg_query_list_t *rdi_lbg_query_list, rdi_type_t rdi_type){
|
||||
if_rdi_t if_rdi;
|
||||
if_rdi_lbg_t *if_rdi_lbg;
|
||||
|
||||
memset(&if_rdi,0,sizeof(if_rdi_t));
|
||||
if_rdi_lbg=(if_rdi_lbg_t *)&if_rdi;
|
||||
|
||||
if_rdi.rdi_cmd = RDI_MIR_PORT_QUERY_LIST;
|
||||
if_rdi_lbg->unit = unit;
|
||||
if_rdi_lbg->lbg = lbg;
|
||||
|
||||
if (!rdi_lbg_query_list)
|
||||
return -1;
|
||||
|
||||
if (!(send_cmd_lbg_query_list(&if_rdi, rdi_lbg_query_list, rdi_type))) {
|
||||
|
||||
return rdi_lbg_query_list->ret;
|
||||
} else return -1;
|
||||
|
||||
}
|
||||
|
||||
int rdi_mir_remove(int unit, int lbg, rdi_type_t rdi_type){
|
||||
|
||||
|
||||
if_rdi_t if_rdi;
|
||||
int ret = 0;
|
||||
if_rdi_lbg_t *if_rdi_lbg;
|
||||
memset(&if_rdi,0,sizeof(if_rdi_t));
|
||||
if_rdi_lbg = (if_rdi_lbg_t *)&if_rdi;
|
||||
if_rdi.rdi_cmd = RDI_MIR_REMOVE;
|
||||
if_rdi_lbg->lbg = lbg;
|
||||
if_rdi_lbg->unit = unit;
|
||||
|
||||
if (!(send_cmd(&if_rdi, &ret, sizeof(ret), rdi_type)))
|
||||
return ret;
|
||||
else return -1;
|
||||
|
||||
}
|
||||
|
||||
|
||||
int rdi_mir_add_fn(int unit, int lbg, rdi_lbg_list_t *rdi_lbg_list, rdi_type_t rdi_type)
|
||||
{
|
||||
int ret=0;
|
||||
if_rdi_lbg_t if_rdi_lbg;
|
||||
if_rdi_t *if_rdi = (if_rdi_t *)&if_rdi_lbg;
|
||||
memset(&if_rdi_lbg, 0, sizeof(if_rdi_lbg_t));
|
||||
|
||||
if_rdi_lbg.rdi_cmd = RDI_MIR_ADD;
|
||||
if_rdi_lbg.unit = unit;
|
||||
if_rdi_lbg.lbg = lbg;
|
||||
|
||||
memcpy(&if_rdi_lbg.rdi_query_list.rdi_lbg_list, rdi_lbg_list, sizeof(rdi_lbg_list_t));
|
||||
|
||||
if (!(send_cmd(if_rdi, &ret, sizeof(ret), rdi_type))) {
|
||||
|
||||
if (ret < 0)
|
||||
return -1;
|
||||
return 0;
|
||||
} else return -1;
|
||||
}
|
||||
|
||||
|
||||
int rdi_mir_port_remove(int unit, int lbg, int port, rdi_type_t rdi_type){
|
||||
|
||||
|
||||
if_rdi_t if_rdi;
|
||||
int ret=0;
|
||||
if_rdi_lbg_t *if_rdi_lbg;
|
||||
memset(&if_rdi,0,sizeof(if_rdi_t));
|
||||
if_rdi_lbg=(if_rdi_lbg_t *)&if_rdi;
|
||||
if_rdi.rdi_cmd=RDI_MIR_PORT_REMOVE;
|
||||
if_rdi_lbg->lbg=lbg;
|
||||
if_rdi_lbg->port=port;
|
||||
if_rdi_lbg->unit=unit;
|
||||
|
||||
if (!(send_cmd(&if_rdi, &ret, sizeof(ret), rdi_type)))
|
||||
return ret;
|
||||
else return -1;
|
||||
|
||||
}
|
||||
|
||||
int rdi_mir_port_add(int unit, int lbg, int port, rdi_type_t rdi_type){
|
||||
|
||||
|
||||
if_rdi_t if_rdi;
|
||||
int ret=0;
|
||||
if_rdi_lbg_t *if_rdi_lbg;
|
||||
|
||||
memset(&if_rdi,0,sizeof(if_rdi_t));
|
||||
if_rdi_lbg=(if_rdi_lbg_t *)&if_rdi;
|
||||
if_rdi.rdi_cmd=RDI_MIR_PORT_ADD;
|
||||
if_rdi_lbg->lbg=lbg;
|
||||
if_rdi_lbg->port=port;
|
||||
if_rdi_lbg->unit=unit;
|
||||
|
||||
if (!(send_cmd(&if_rdi, &ret, sizeof(ret), rdi_type))) {
|
||||
return ret;
|
||||
} else return -1;
|
||||
|
||||
}
|
||||
|
||||
int rdi_mir_vlan_add(int unit, int lbg, int vlan, rdi_type_t rdi_type){
|
||||
|
||||
|
||||
if_rdi_t if_rdi;
|
||||
int ret=0;
|
||||
|
||||
memset(&if_rdi,0,sizeof(if_rdi_t));
|
||||
if_rdi.rdi_cmd=RDI_MIR_VLAN_ADD;
|
||||
if_rdi.unit=unit;
|
||||
if_rdi.port=lbg;
|
||||
if_rdi.group=vlan;
|
||||
|
||||
if (!(send_cmd(&if_rdi, &ret, sizeof(ret), rdi_type))) {
|
||||
return ret;
|
||||
} else return -1;
|
||||
|
||||
}
|
||||
|
||||
int rdi_mcg_create(int unit, rdi_type_t rdi_type){
|
||||
|
||||
|
||||
if_rdi_t if_rdi;
|
||||
int ret = 0;
|
||||
memset(&if_rdi,0,sizeof(if_rdi_t));
|
||||
if_rdi.rdi_cmd = RDI_MCG_CREATE;
|
||||
if_rdi.unit = unit;
|
||||
|
||||
if (!(send_cmd(&if_rdi, &ret, sizeof(ret), rdi_type)))
|
||||
return ret;
|
||||
else return -1;
|
||||
|
||||
}
|
||||
|
||||
|
||||
int rdi_mcg_get_port(int unit, int mcg, rdi_type_t rdi_type){
|
||||
|
||||
|
||||
if_rdi_t if_rdi;
|
||||
int ret = 0;
|
||||
memset(&if_rdi,0,sizeof(if_rdi_t));
|
||||
if_rdi.rdi_cmd = RDI_MCG_GET_PORT;
|
||||
if_rdi.group = mcg;
|
||||
if_rdi.unit = unit;
|
||||
|
||||
if (!(send_cmd(&if_rdi, &ret, sizeof(ret), rdi_type)))
|
||||
return ret;
|
||||
else return -1;
|
||||
|
||||
}
|
||||
|
||||
int rdi_mcg_add_listener(int unit, int mcg, int port, int vlan, rdi_type_t rdi_type){
|
||||
|
||||
|
||||
if_rdi_t if_rdi;
|
||||
int ret = 0;
|
||||
memset(&if_rdi,0,sizeof(if_rdi_t));
|
||||
if_rdi.rdi_cmd = RDI_MCG_ADD_LISTENER;
|
||||
if_rdi.group = mcg;
|
||||
if_rdi.port = port;
|
||||
if_rdi.val = vlan;
|
||||
if_rdi.unit = unit;
|
||||
|
||||
if (!(send_cmd(&if_rdi, &ret, sizeof(ret), rdi_type)))
|
||||
return ret;
|
||||
else return -1;
|
||||
|
||||
}
|
||||
|
||||
int rdi_mcg_remove(int unit, int mcg, rdi_type_t rdi_type){
|
||||
|
||||
|
||||
if_rdi_t if_rdi;
|
||||
int ret = 0;
|
||||
memset(&if_rdi,0,sizeof(if_rdi_t));
|
||||
if_rdi.rdi_cmd = RDI_MIR_REMOVE;
|
||||
if_rdi.group = mcg;
|
||||
if_rdi.unit = unit;
|
||||
|
||||
if (!(send_cmd(&if_rdi, &ret, sizeof(ret), rdi_type)))
|
||||
return ret;
|
||||
else return -1;
|
||||
|
||||
}
|
||||
|
||||
int rdi_set_port_parser(int unit, int port, int val, rdi_type_t rdi_type){
|
||||
|
||||
|
||||
if_rdi_t if_rdi;
|
||||
int ret = 0;
|
||||
memset(&if_rdi,0,sizeof(if_rdi_t));
|
||||
if_rdi.rdi_cmd = RDI_SET_PORT_PARSER;
|
||||
if_rdi.port = port;
|
||||
if_rdi.val = val;
|
||||
if_rdi.unit = unit;
|
||||
|
||||
if (!(send_cmd(&if_rdi, &ret, sizeof(ret), rdi_type)))
|
||||
return ret;
|
||||
else return -1;
|
||||
}
|
||||
|
||||
int rdi_get_port_parser(int unit, int port, rdi_type_t rdi_type){
|
||||
|
||||
|
||||
if_rdi_t if_rdi;
|
||||
int ret = 0;
|
||||
memset(&if_rdi,0,sizeof(if_rdi_t));
|
||||
if_rdi.rdi_cmd = RDI_GET_PORT_PARSER;
|
||||
if_rdi.port = port;
|
||||
if_rdi.unit = unit;
|
||||
|
||||
if (!(send_cmd(&if_rdi, &ret, sizeof(ret), rdi_type)))
|
||||
return ret;
|
||||
else return -1;
|
||||
}
|
||||
|
||||
int rdi_set_rframe_update(int unit, int port, int val, rdi_type_t rdi_type){
|
||||
|
||||
|
||||
if_rdi_t if_rdi;
|
||||
int ret = 0;
|
||||
memset(&if_rdi,0,sizeof(if_rdi_t));
|
||||
if_rdi.rdi_cmd = RDI_SET_RFRAME_UPDATE;
|
||||
if_rdi.port = port;
|
||||
if_rdi.val = val;
|
||||
if_rdi.unit = unit;
|
||||
|
||||
if (!(send_cmd(&if_rdi, &ret, sizeof(ret), rdi_type)))
|
||||
return ret;
|
||||
else return -1;
|
||||
}
|
||||
|
||||
int rdi_get_rframe_update(int unit, int port, rdi_type_t rdi_type){
|
||||
|
||||
|
||||
if_rdi_t if_rdi;
|
||||
int ret = 0;
|
||||
memset(&if_rdi,0,sizeof(if_rdi_t));
|
||||
if_rdi.rdi_cmd = RDI_GET_RFRAME_UPDATE;
|
||||
if_rdi.port = port;
|
||||
if_rdi.unit = unit;
|
||||
|
||||
if (!(send_cmd(&if_rdi, &ret, sizeof(ret), rdi_type)))
|
||||
return ret;
|
||||
else return -1;
|
||||
}
|
||||
|
||||
int rdi_set_ttl_update(int unit, int port, int val, rdi_type_t rdi_type){
|
||||
|
||||
|
||||
if_rdi_t if_rdi;
|
||||
int ret = 0;
|
||||
memset(&if_rdi,0,sizeof(if_rdi_t));
|
||||
if_rdi.rdi_cmd = RDI_SET_TTL_UPDATE;
|
||||
if_rdi.port = port;
|
||||
if_rdi.val = val;
|
||||
if_rdi.unit = unit;
|
||||
|
||||
if (!(send_cmd(&if_rdi, &ret, sizeof(ret), rdi_type)))
|
||||
return ret;
|
||||
else return -1;
|
||||
}
|
||||
|
||||
int rdi_get_ttl_update(int unit, int port, rdi_type_t rdi_type){
|
||||
if_rdi_t if_rdi;
|
||||
int ret = 0;
|
||||
|
||||
memset(&if_rdi,0,sizeof(if_rdi_t));
|
||||
if_rdi.rdi_cmd = RDI_GET_TTL_UPDATE;
|
||||
if_rdi.port = port;
|
||||
if_rdi.unit = unit;
|
||||
|
||||
if (!(send_cmd(&if_rdi, &ret, sizeof(ret), rdi_type)))
|
||||
return ret;
|
||||
else return -1;
|
||||
}
|
||||
|
||||
int rdi_set_sw_remain(int val, rdi_type_t rdi_type){
|
||||
if_rdi_t if_rdi;
|
||||
int ret = 0;
|
||||
|
||||
memset(&if_rdi,0,sizeof(if_rdi_t));
|
||||
if_rdi.rdi_cmd = RDI_SET_SW_REMAIN;
|
||||
if_rdi.val = val;
|
||||
|
||||
if (!(send_cmd(&if_rdi, &ret, sizeof(ret), rdi_type)))
|
||||
return ret;
|
||||
else return -1;
|
||||
}
|
||||
|
||||
int rdi_get_sw_remain(rdi_type_t rdi_type){
|
||||
if_rdi_t if_rdi;
|
||||
int ret = 0;
|
||||
|
||||
memset(&if_rdi,0,sizeof(if_rdi_t));
|
||||
if_rdi.rdi_cmd = RDI_GET_SW_REMAIN;
|
||||
|
||||
if (!(send_cmd(&if_rdi, &ret, sizeof(ret), rdi_type)))
|
||||
return ret;
|
||||
else return -1;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
@ -1049,7 +1711,75 @@ int rdi_get_stat(int unit, int port, rdi_stat_cnt_t *rdi_stat_cnt, rdi_type_t rd
|
|||
if_rdi.rdi_mem.port=port;
|
||||
|
||||
|
||||
if ((s = socket(AF_UNIX, SOCK_STREAM, 0)) == -1) {
|
||||
perror("librdi socket");
|
||||
return -1;
|
||||
}
|
||||
remote.sun_family = AF_UNIX;
|
||||
if (rdi_type==RDI_FLCM_DEV)
|
||||
strcpy(remote.sun_path, RDIF_SOCK_PATH);
|
||||
else
|
||||
strcpy(remote.sun_path, RDI_SOCK_PATH);
|
||||
len = strlen(remote.sun_path) + sizeof(remote.sun_family);
|
||||
if (connect(s, (struct sockaddr *)&remote, len) == -1) {
|
||||
perror("librdi connect");
|
||||
close(s);
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (send(s, &if_rdi, sizeof(if_rdi_t), 0) == -1) {
|
||||
perror("librdi send");
|
||||
close(s);
|
||||
return -1;
|
||||
|
||||
}
|
||||
if ((t=recv(s, &rdi_stat, sizeof(rdi_stat_t), 0)) < 0) {
|
||||
perror("librdi recv");
|
||||
close(s);
|
||||
return -1;
|
||||
}
|
||||
ret= rdi_stat.ret_val;
|
||||
memcpy(rdi_stat_cnt, &rdi_stat.rdi_stat_cnt, sizeof(rdi_stat_cnt_t));
|
||||
close(s);
|
||||
return ret;
|
||||
}
|
||||
|
||||
int rdi_reset_stat(int unit, int port, rdi_type_t rdi_type){
|
||||
|
||||
|
||||
if_rdi_t if_rdi;
|
||||
int ret=0;
|
||||
int dev_num=rdi_get_dev_num(rdi_type);
|
||||
|
||||
if ((dev_num < 0)||(unit >= dev_num))
|
||||
return -1;
|
||||
memset(&if_rdi, 0, sizeof(if_rdi_t));
|
||||
if_rdi.rdi_cmd = RDI_RESET_STAT;
|
||||
if_rdi.rdi_mem.port = port;
|
||||
if_rdi.unit = unit;
|
||||
if (!(send_cmd(&if_rdi, &ret, sizeof(ret), rdi_type)))
|
||||
return ret;
|
||||
else return -1;
|
||||
|
||||
}
|
||||
|
||||
int rdi_get_prio_stat(int unit, int port, rdi_stat_cnt_t *rdi_stat_cnt, rdi_type_t rdi_type){
|
||||
if_rdi_t if_rdi;
|
||||
int s, t, len, ret=0;
|
||||
struct sockaddr_un remote;
|
||||
int dev_num=rdi_get_dev_num(rdi_type);
|
||||
rdi_stat_t rdi_stat;
|
||||
|
||||
|
||||
if ((dev_num<0)||(unit>=dev_num))
|
||||
return -1;
|
||||
|
||||
memset(&if_rdi,0,sizeof(if_rdi_t));
|
||||
memset(&rdi_stat,0,sizeof(rdi_stat_t));
|
||||
|
||||
if_rdi.rdi_cmd=RDI_GET_PRIO_STAT;
|
||||
if_rdi.unit=unit;
|
||||
if_rdi.rdi_mem.port=port;
|
||||
|
||||
|
||||
if ((s = socket(AF_UNIX, SOCK_STREAM, 0)) == -1) {
|
||||
|
@ -1086,6 +1816,7 @@ int rdi_get_stat(int unit, int port, rdi_stat_cnt_t *rdi_stat_cnt, rdi_type_t rd
|
|||
}
|
||||
|
||||
|
||||
|
||||
int rdi_get_rule_stat(int unit, int rule_id, int group, rdi_rule_stat_cnt_t *rdi_rule_stat_cnt, rdi_type_t rdi_type){
|
||||
if_rdi_t if_rdi;
|
||||
int s, t, len;
|
||||
|
@ -1147,7 +1878,6 @@ int rdi_read_phy(int unit, int phy_addr, int dev, int addr, rdi_type_t rdi_type
|
|||
if_rdi_t if_rdi;
|
||||
int ret=0;
|
||||
memset(&if_rdi,0,sizeof(if_rdi_t));
|
||||
printf("read_phy!\n");
|
||||
/*if_rdi.unit=unit;*/
|
||||
if_rdi.rdi_cmd=RDI_READ_PHY;
|
||||
if_rdi.addr=addr;
|
||||
|
@ -1211,6 +1941,23 @@ int rdi_set_gpio_dir(int unit, int gpio, int dir, int val, rdi_type_t rdi_type){
|
|||
else return -1;
|
||||
}
|
||||
|
||||
int rdi_set_prbs(int unit, int prbs, int dir, int port, rdi_type_t rdi_type){
|
||||
if_rdi_t if_rdi;
|
||||
int ret = 0;
|
||||
memset(&if_rdi,0,sizeof(if_rdi_t));
|
||||
|
||||
if_rdi.unit = unit;
|
||||
if_rdi.rdi_cmd = RDI_SET_PRBS;
|
||||
if_rdi.addr = dir;
|
||||
if_rdi.dev = prbs;
|
||||
if_rdi.val = port;
|
||||
|
||||
if (!(send_cmd(&if_rdi, &ret, sizeof(ret), rdi_type)))
|
||||
return ret;
|
||||
else return -1;
|
||||
}
|
||||
|
||||
|
||||
int rdi_get_gpio(int unit, int gpio, rdi_type_t rdi_type){
|
||||
if_rdi_t if_rdi;
|
||||
int ret=0;
|
||||
|
@ -1245,6 +1992,23 @@ int rdi_set_gpio(int unit, int gpio, int val, rdi_type_t rdi_type){
|
|||
}
|
||||
|
||||
|
||||
int rdi_set_loopback(int unit, int val, int port, rdi_type_t rdi_type){
|
||||
if_rdi_t if_rdi;
|
||||
int ret = 0;
|
||||
memset(&if_rdi,0,sizeof(if_rdi_t));
|
||||
|
||||
if_rdi.unit = unit;
|
||||
if_rdi.rdi_cmd = RDI_SET_LOOPBACK;
|
||||
if_rdi.dev = port;
|
||||
if_rdi.val = val;
|
||||
|
||||
if (!(send_cmd(&if_rdi, &ret, sizeof(ret), rdi_type)))
|
||||
return ret;
|
||||
else return -1;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
int rdi_get_reg(int unit, unsigned int addr, unsigned int *val, rdi_type_t rdi_type){
|
||||
if_rdi_t if_rdi;
|
||||
|
|
|
@ -7,8 +7,8 @@ else
|
|||
PRDPATH= .
|
||||
endif
|
||||
|
||||
MAJOR_VERSION= 11
|
||||
MINOR_VERSION= 0
|
||||
MAJOR_VERSION= 1
|
||||
MINOR_VERSION= 3
|
||||
RELEASE_VERSION= 0
|
||||
|
||||
SO_NAME= $(TARGET).so.$(MAJOR_VERSION)
|
||||
|
|
111
readme.txt
111
readme.txt
|
@ -5,8 +5,8 @@
|
|||
|
||||
Compiling and installing fm10k driver
|
||||
|
||||
tar xzvf fm10k-0.19.3.tar.gz
|
||||
cd fm10k-0.19.3/src
|
||||
tar xzvf fm10k-0.XX.X.tar.gz
|
||||
cd fm10k-0.XX.X/src
|
||||
make
|
||||
make install
|
||||
|
||||
|
@ -26,66 +26,103 @@
|
|||
========================================================================
|
||||
NOTE: Use local=1 parameter for local build if needed:
|
||||
#./install local=1
|
||||
NOTE: in case of user defined installation, please check that navl.txt
|
||||
will be at the same folder that rdifd.
|
||||
|
||||
========================================================================
|
||||
|
||||
2. Software loading:
|
||||
# rdif start
|
||||
==========================================================================
|
||||
NOTE: The command above performs rdifd daemon start in verbose mode;
|
||||
in order to run in non-verbose mode, please edit rdif script as below:
|
||||
|
||||
# rdifd -v
|
||||
rdifd
|
||||
|
||||
==========================================================================
|
||||
|
||||
4. Using the software.
|
||||
|
||||
Default mode is MON2 - egress disable for all ports.
|
||||
|
||||
Please use set_port_mask command to permit egress ports list for specific
|
||||
ingress port, according to desired configuration.
|
||||
Example:
|
||||
Example (for 4 ports adapter):
|
||||
rdifctl set_port_mask 5 1,2,3,4
|
||||
|
||||
==========================================================================
|
||||
NOTE: ports 5 - Host Side;
|
||||
ports 1...4 - Network Side
|
||||
|
||||
Please refer to RDIF Programmer Guide for more info.
|
||||
==========================================================================
|
||||
|
||||
============================================================================
|
||||
NOTE: lbg_create returns logical port number starting from 73; need to use
|
||||
this number for all LBG operation as lbg parameter and in rule assigment.
|
||||
Example:
|
||||
# rdifctl dir port 1 redir_port 73
|
||||
============================================================================
|
||||
|
||||
Usage: rdifctl <command> [parameters]
|
||||
Commands List:
|
||||
set_cfg - set the device to predefined configuration
|
||||
get_dev_num - get total number of rdi devices.
|
||||
set_sw_remain <val> - enable/disable (1/0) remain switch configuration after rdif stop
|
||||
get_sw_remain
|
||||
get_cfg - get current configuration mode
|
||||
get_temp - get temperature
|
||||
get_port_link <port> - get link status
|
||||
get_port_speed <port> - get port speed
|
||||
set_port_parser <port> <val> - set parser level (2,3,4)
|
||||
get_port_parser <port> - get parser level
|
||||
set_rframe_update <port> <val> - set bitmask indicating the fields
|
||||
that will be updated on a routed frame
|
||||
dmac - bit 0, smac - bit 1, vlan - bit 2
|
||||
get_rframe_update <port> - get routed frame fields that will be updated
|
||||
set_ttl_update <port> <val> - enable/disable (1/0) decrement TTL field on routed frames
|
||||
get_ttl_update <port>
|
||||
temp_write <addr> <length (1)> <reg>
|
||||
temp_read <addr> <length>
|
||||
temp1_write <addr> <length (1)> <reg> - use only for 0x4c address
|
||||
temp1_read <addr> <length> - use only for 0x4c address
|
||||
dir - add the rule of a port with direction matching packets to another port
|
||||
mir - add the rule of a port with mirror matching packets to another port
|
||||
lb - add the rule of a port with send matching packets to load balance group (LBG)
|
||||
drop - drop matching packets
|
||||
permit - permit matching packets
|
||||
set_vlan <vlan_act> - set vlan
|
||||
set_vlan_pri <vlan_pri_act> - set vlan priority
|
||||
stat port <port> - get statistic for specific port (port is mandatory)
|
||||
mir - copy matching frame to mirror_port (mirror must be created previously, see mir_create)
|
||||
set_prio - set switch priority for the packet
|
||||
set_vlan vlan_act <vlan_act> - set vlan1 rule
|
||||
add_vlan_promisc <port> - add the port to all 2...4095 VLANs
|
||||
rem_vlan_promisc <port> - remove the port from all 2...4095 VLANs
|
||||
stat port <port> - get statistic for specific port (port is mandatory)
|
||||
prio_stat port <port> - get priority statistic for specific port (port is mandatory)
|
||||
reset_stat port <port> - reset statistic for specific port (port is mandatory)
|
||||
rule_stat <rule_id> <group>- get statistic (pkts counter) for specific rule (rule_id is mandatory)
|
||||
query_list <group> - query rule_id list
|
||||
clear - clear rule stack
|
||||
clear_group <group> - clear rule stack for specific group
|
||||
set_port_mask <ingress_port> <egress_port_list example: 1,2,3> - set egress port mask
|
||||
set_port_mask <ingress_port> <egress_port_list example: 1,5,7> - set egress port mask
|
||||
get_port_mask <ingress_port> - get egress port list
|
||||
set_reg <addr> <val> - write to RRC register
|
||||
get_reg <addr> - read from RRC register
|
||||
bp_write <dev_addr> <len> <data1,data2,data3...>
|
||||
bp_read <dev_addr> <len>
|
||||
sfp_write <port num> <offset> <page> <len> <data1,data2,data3...>
|
||||
sfp_read <port num> <offset> <page> <len>
|
||||
set_gpio_dir <gpio> <dir> <value> - set GPIO direction & value
|
||||
gpio: gpio num; dir: 0 - input; 1 - output; 2 - open drain
|
||||
get_gpio_dir <gpio> - get GPIO direction
|
||||
set_gpio <gpio> <value> - set GPIO value
|
||||
get_gpio <gpio> - get GPIO value
|
||||
prbs <prbs> <dir> <port> - prbs test prbs supp. 7,15,23,31,11,9
|
||||
get_port_state <port>
|
||||
loopback <txrx/rxtx/off (1/2/0)> <port>
|
||||
remove <rule_id> <group> remove rule
|
||||
query <rule_id> <group> query rule
|
||||
lbg_query_list - query LBG list
|
||||
lbg_query_port_list <lbg> - query LBG ports list
|
||||
lbg_create - create LBG
|
||||
lbg_add_port <lbg> <port> - add port to LBG
|
||||
lbg_del_port <lbg> <port> - delete port from LBG
|
||||
lbg_create <port list, example: 1,2> - create LBG
|
||||
lbg_del <lbg> - delete LBG
|
||||
mcg_create - create multicast group, return mcast group number
|
||||
mcg_get_port <mcast group number> - get mcast group's port
|
||||
mcg_add_listener <mcast_num> <port> <vlan> - add listener
|
||||
mcg_del <mcast group number> - delete mcast group
|
||||
mir_query_list - query mirror list
|
||||
mir_query_port_list <mirrror_port> - query mirror ports list
|
||||
mir_create <mirror_port example: 1> <mirror_ports_list example: 2,3> - create mirror
|
||||
mir_add_port <mirror_port> <port> - add port to mirror
|
||||
mir_del_port <mirror_port> <port> - delete port from mirror
|
||||
mir_add_vlan <mirror_port> <vlan_id> - specifies the mirrored frame encapsulation vlan id.
|
||||
Valid range 1...4095; 0 for no vlan encapsulation
|
||||
mir_del <mirror_port> - delete mirror
|
||||
l3_hash <hash params> - set l3 hash
|
||||
l2_hash <hash params> - set l2 hash
|
||||
get_l3_hash - get l3 hash
|
||||
|
@ -93,7 +130,7 @@ get_l2_hash - get l2 hash
|
|||
info - print Program Information.
|
||||
help - print this message.
|
||||
[parameters] :
|
||||
for 'permit', 'dir', 'mir' and 'drop' commands:
|
||||
for 'permit', 'dir', 'set_prio' and 'drop' commands:
|
||||
rule_id <rule_id>
|
||||
src_ip <src_ip>
|
||||
dst_ip <dst_ip>
|
||||
|
@ -112,15 +149,20 @@ help - print this message.
|
|||
vlan <vlan>
|
||||
vlan_tag <vlan_tag> 1, 2, 3 ,4 for none, standard, user A, user B
|
||||
vlan_mask <vlan_mask>
|
||||
prio <0...15>
|
||||
mpls_type <multi | uni; mandatory for MPLS>
|
||||
mpls_header <MPLS headers, one or two headers (up to 8 byte)>
|
||||
mpls_header_mask <MPLS headers mask>
|
||||
ether_type <ether_type>
|
||||
src_mac <Source MAC address>
|
||||
dst_mac <Destination MAC address>
|
||||
port <1...68>
|
||||
port <1...>
|
||||
group - ACL number <0...15>
|
||||
redir_port <1...5> (mandatory for dir command)
|
||||
mir_port <1...5> (mandatory for mir command)
|
||||
redir_port <1...> (mandatory for dir command)
|
||||
mir_port (mandatory for mir command)
|
||||
lbg_num Load Balance Group (LBG) number (for lb command)
|
||||
for 'set_cfg':
|
||||
<5> for MON2 (default mode) - egress disabled for all ports
|
||||
<5> for MON2 (default mode) - egress disabled
|
||||
for l3_hash:
|
||||
src_ip_hash, mask of src ip
|
||||
dst_ip_hash, mask of dst ip
|
||||
|
@ -150,7 +192,16 @@ Entire numerical paramters are in decimal format (123) or hex format (0xabc),
|
|||
MAC is in aa:bb:cc:dd:ee:ff format.
|
||||
Example:
|
||||
rdifctl drop port 1 src_ip 196.0.0.126
|
||||
rdifctl mir mir_port 5 dst_ip 10.10.10.184
|
||||
rdifctl set_port_mask 5 1,2,3,4
|
||||
rdifctl temp1_write 0x4c 1 1
|
||||
rdifctl temp1_read 0x4c 1
|
||||
rdifctl set_vlan vlan_act 9 port 1
|
||||
rdifctl mir_add_vlan 1 11
|
||||
Two MPLS example:
|
||||
rdifctl drop port 1 mpls_type uni mpls_header 0x0000104000001140 mpls_header_mask 0xffffffffffffffff
|
||||
Single MPLS lable example:
|
||||
rdifctl drop port 1 mpls_type uni mpls_header 0x1140 mpls_header_mask 0xffffffff
|
||||
|
||||
|
||||
5. Software unloading.
|
||||
|
|
278
release.txt
278
release.txt
|
@ -1,6 +1,280 @@
|
|||
6.0.10.7.30.1
|
||||
- 01:80:C2:00:00:00
|
||||
01:80:C2:00:00:02
|
||||
01:80:C2:00:00:0E
|
||||
01:80:C2:00:00:03
|
||||
changed to DROP
|
||||
|
||||
v.3.0.5.3
|
||||
- Added support for 2x40G.
|
||||
6.0.10.7.30
|
||||
- get/set_sw_remain
|
||||
- Defaulted to remain switch configuration
|
||||
(sw_remain enabled)
|
||||
|
||||
6.0.10.7.29
|
||||
- Changed fefault ports attributes to
|
||||
loopback suppresion disable
|
||||
- Changed VLAN's attributes to
|
||||
reflect enable
|
||||
- Changed mcg attribute to
|
||||
L3 switching only mode.
|
||||
|
||||
6.0.10.7.28
|
||||
- Added commands
|
||||
set_rframe_update
|
||||
get_rframe_update <port>
|
||||
set_ttl_update <port> <val>
|
||||
get_ttl_update <port>
|
||||
- Changed "routed frame changed field" to VLAN only
|
||||
- ttl decrement defaulted to disable.
|
||||
|
||||
6.0.10.7.27
|
||||
- Changes in CPS CISCO init (timing).
|
||||
|
||||
6.0.10.7.26
|
||||
- Changes in CPS CISCO init.
|
||||
|
||||
6.0.10.7.25
|
||||
- Added support for set/get_port_parser
|
||||
|
||||
6.0.10.7.24
|
||||
- Added mcast group commands (preliminary)
|
||||
|
||||
6.0.10.7.23
|
||||
- Added support fo SPC CISCO
|
||||
|
||||
6.0.10.7.22.1
|
||||
- Fixed recv for fci_read
|
||||
|
||||
6.0.10.7.22
|
||||
- Added support for get_port_speed
|
||||
|
||||
6.0.10.7.21
|
||||
- Removed debug snapshot (rdifd)
|
||||
|
||||
6.0.10.7.20
|
||||
- Added support for 100G-LR/40G-LR
|
||||
detection printout.
|
||||
|
||||
6.0.10.7.19
|
||||
- Configure dfe mode for lane 1...3
|
||||
after transceiver insertion.
|
||||
|
||||
6.0.10.7.18
|
||||
- Fixed interrupts issue.
|
||||
|
||||
6.0.10.7.17.1
|
||||
- Fixed mpls_header_mask parameter (rdifctl only).
|
||||
|
||||
6.0.10.7.17
|
||||
- Added support for mpls_header field.
|
||||
|
||||
6.0.10.7.16
|
||||
- Added support for fixed VF ports for all PEPs.
|
||||
|
||||
6.0.10.7.15
|
||||
- Added add_vlan_promisc/rem_vlan_promisc command.
|
||||
|
||||
6.0.10.7.14
|
||||
- Added mir_add_vlan command.
|
||||
- Added set_vlan rule.
|
||||
|
||||
6.0.10.7.13
|
||||
- EPL VLAN strip disabled.
|
||||
6.0.10.7.12
|
||||
- Fixed per-port sfp read.
|
||||
- Added mir rule.
|
||||
|
||||
6.0.10.7.11
|
||||
- Added support for multi-host.
|
||||
|
||||
6.0.10.7.11
|
||||
- Added support for multi-host.
|
||||
|
||||
6.0.10.7.10
|
||||
- Moved to class-base flow control.
|
||||
|
||||
6.0.10.7.9
|
||||
- Added support for 1G x557.
|
||||
|
||||
6.0.10.7.7
|
||||
- Fixed issues with non-verbose mode.
|
||||
- Fixed issue with mir & multiple devices.
|
||||
|
||||
6.0.10.7.6
|
||||
- Fixed double vlan tag(tag 0 issue).
|
||||
|
||||
6.0.10.7.5
|
||||
- Fixed rule query entry.
|
||||
|
||||
6.0.10.7.4
|
||||
- Fixed problem with LBG and zero port list
|
||||
- Removed unsupported for mapped LBG
|
||||
lbg_query_port_list
|
||||
- Increased up to 32 LBG group members.
|
||||
|
||||
6.0.10.7.3
|
||||
- Fixed LBG distribution table
|
||||
- Fixed lbg_del command
|
||||
- Added load balance rule (lb)
|
||||
|
||||
6.0.10.7
|
||||
- Fixed stop for non-verbose mode
|
||||
|
||||
6.0.10.6
|
||||
- Fixed getPortState for PEP (focalpoint lib)
|
||||
- Fixed port stat command
|
||||
- Demonize after full Swith init
|
||||
|
||||
6.0.10.5
|
||||
- Disable tag strip for vlan tags 2..4095
|
||||
(for ingress PEP interfaces)
|
||||
- Fixed acl for ingress PEP interfaces
|
||||
- Added fixed VF for PEP2
|
||||
- Removed ACL compile printout
|
||||
|
||||
6.0.10.4.10
|
||||
- Added FCI init sequence support in config file on/off(default is off):
|
||||
Example:
|
||||
api.platform.config.switch.0.fci text on
|
||||
|
||||
|
||||
6.0.10.4.9ti
|
||||
- Removed FCI init
|
||||
|
||||
6.0.10.4.9i
|
||||
- Setted to optical mode
|
||||
- Removed debug printout on link down event
|
||||
- Moved FCI settings before port setting
|
||||
|
||||
6.0.10.4.8i
|
||||
- Added support for fci settings
|
||||
- Changes in i2c handler (cpld ver.5)
|
||||
|
||||
6.0.10.4.7i
|
||||
- Remove I2C LOG printout on non-debug mode.
|
||||
|
||||
6.0.10.4.6i
|
||||
- Added PORT_STATUS, IP_LINK, MAC_ERROR_COUNTER
|
||||
on Link Down event
|
||||
|
||||
6.0.10.4.5i
|
||||
- Removed accept... printout
|
||||
- Added date & time printout on link change event
|
||||
|
||||
6.0.10.4.4i
|
||||
- Added vrm delta support (cfg file, mVolt)
|
||||
example:
|
||||
api.platform.lib.config.hwResourceId.7.vrm.delta int 6
|
||||
- Added eee_mode support (cfg file, on/off)
|
||||
example:
|
||||
api.platform.config.switch.0.portIndex.2.eeeMode text on
|
||||
-Added link_optim_mode support (cfg file, balance(default)/speed/quality/none)
|
||||
example:
|
||||
api.platform.config.switch.0.portIndex.1.linkOptimMode text quality
|
||||
|
||||
|
||||
############################################################################
|
||||
4.4
|
||||
-Added link_optim_mode support (cfg file, balance(default)/speed/quality/none)
|
||||
example:
|
||||
api.platform.config.switch.0.portIndex.1.linkOptimMode text quality
|
||||
|
||||
4.3
|
||||
- Added vrm delta support (cfg file, mVolt)
|
||||
example:
|
||||
api.platform.lib.config.hwResourceId.7.vrm.delta int 6
|
||||
|
||||
4.2
|
||||
- Added vrm IR support (some changes)
|
||||
|
||||
4.1
|
||||
- Added vrm IR support
|
||||
|
||||
4.0
|
||||
- Added eee_mode support (cfg file, on/off)
|
||||
example:
|
||||
api.platform.config.switch.0.portIndex.2.eeeMode text on
|
||||
##########################################################################
|
||||
|
||||
|
||||
6.0.10.4i
|
||||
- Added IR vrm support
|
||||
|
||||
6.0.10i
|
||||
- Added fci_rx_read/write
|
||||
|
||||
6.0.9i
|
||||
- Added access to temp. sensor1
|
||||
- Added fci_read/write
|
||||
|
||||
6.0.8i
|
||||
- IBM
|
||||
- Added readme for write/read_temp
|
||||
|
||||
6.0.7
|
||||
- Fixed problem with entering abnormal dev parameter
|
||||
in query command (rifd).
|
||||
- Removed debug printout on mirror command (rdifctl, librdi).
|
||||
- Removed fatal printout connected to bprdctl_mod (fm lib).
|
||||
- Fixed VF port numbering for 2nd port GLORT.
|
||||
|
||||
6.0.5
|
||||
-Fixed clear command (rdifd)
|
||||
|
||||
6.0.4
|
||||
- Fixed clear on deleted egress VF (allowed)
|
||||
- Fixed remove on deleted egress VF (not allowed)
|
||||
- Fixed return from get_port_state -
|
||||
now return fail for non-exist interface
|
||||
|
||||
6.0.3
|
||||
- LLDP allowed
|
||||
|
||||
v6.0.2
|
||||
- Added support for 8x25/8x10 port mask.
|
||||
|
||||
v6.0.1
|
||||
- Added mir_query_list, mir_query_port_list, mir_create,
|
||||
mir_add_port, mir_del_port, mir_del.
|
||||
- Added set_prio support to query rule printout.
|
||||
|
||||
v6.0.0
|
||||
- Added set priority rule.
|
||||
- Added frame priority statistics.
|
||||
- Added reset statistis counter.
|
||||
|
||||
v5.0.8
|
||||
- Fixed query_list.
|
||||
- Added LBG support.
|
||||
|
||||
v5.0.7.1
|
||||
- Fixed wrong start script.
|
||||
|
||||
v5.0.7
|
||||
- Added mux semaphore support.
|
||||
|
||||
v5.0.6
|
||||
- Added link prop. (system side).
|
||||
|
||||
v5.0.4
|
||||
- Added support for PRBS test.
|
||||
- Fixed vlan issue on PEP.
|
||||
|
||||
v5.0.2
|
||||
- Max Frame Size increased to 15360.
|
||||
|
||||
v5.0.1
|
||||
- Added support for get_temp.
|
||||
|
||||
v5.0.0
|
||||
- Added support for simultaneous work 2x40 & 4x10
|
||||
Bypass adapters.
|
||||
|
||||
v4.0.2
|
||||
- Fixed rule count issues.
|
||||
|
||||
v.3.0.4
|
||||
- Added support for vir interfaces.
|
||||
|
||||
v.3.0.1
|
||||
- Added support for multi switch mode
|
||||
|
|
1697
util/rdictl.c
1697
util/rdictl.c
File diff suppressed because it is too large
Load diff
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Reference in a new issue